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* arm: mach-imx: tzasc: convert to cpu_is_mx8xyz macrosStefan Kerkmann2024-03-131-1/+1
| | | | | | | | | | | | | Instead of passing in configuration parameters at runtime we can utilize the `cpu_is_mx8xyz` macro family to determine which bits should be set. As the tzasc driver is imx specific, all functions are prefixed with `imx8m_` as well. Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Stefan Kerkmann <s.kerkmann@pengutronix.de> Link: https://lore.barebox.org/20240228-v2024-02-0-topic-imx8m-n-p-tzac-v2-3-ee1ae48dc399@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8M: convert the machine init to the soc driverMarco Felsch2024-01-292-0/+297
| | | | | | | | | | | | | | | | | | | | | | | | | Convert the i.MX8M machine init code to the previously introduced soc framework. The soc driver was mostly copied from Linux with slightly adaptions for barebox. To the soc driver is called during the postcore_initcall to keep the level aligned with the previous imx_init(). The ocotp clock must keept running else the ARM-SMCCC stuck for calls where the TF-A tries to access the ocotp. A sample output of the new introduced soc0 device: | | barebox@FSL i.MX8MM EVKB:/ devinfo soc0 | Bus: soc | Parameters: | family: Freescale i.MX (type: string) | machine: FSL i.MX8MM EVKB (type: string) | revision: 1.0 (type: string) | serial_number: 15182A09DAB5B3C9 (type: string) | soc_id: i.MX8MM (type: string) Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20240125133856.3792552-2-m.felsch@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-hsio-blk-ctrl'Sascha Hauer2024-01-233-1322/+0
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| * drivers: soc: split off powerdomains into new pmdomain directoryAhmad Fatoum2024-01-223-1322/+0
| | | | | | | | | | | | | | | | | | Linux v6.6 has moved the pmdomain drivers from drivers/soc to drivers/pmdomain. Follow its lead in barebox too. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240119162610.1014870-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: featctrl: finalize support for i.MX8MPAhmad Fatoum2024-01-221-5/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We only had preliminary feature controller support for i.MX8MP and support for detecting missing VPU, DSP, NPU, LVDS and CPUs was missing. Add support for them, so barebox may fix up the kernel device tree to disable these nodes. This is especially important for the VPU and NPU as the kernel's blk-ctrl power domain driver may try to power them down as they are unused, which would make the SoC hang. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240119224522.1399213-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | nvmem: ocotp: prepare adding tester3 supportAhmad Fatoum2024-01-221-13/+19
|/ | | | | | | | | | | | The tester fuses are written to the OCOTP by NXP during production. So far, we only evaluated tester4 to determine which peripherals are missing from the SoC. On the i.MX8MP, VPU and CPUs existence is instead encoded into the tester3 fuse word. In preparation for adding support for tester4, rename the existing masks to be tester4-specific. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20240119224522.1399213-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: switch regmap.h include to linux/regmap.hAhmad Fatoum2023-10-261-1/+1
| | | | | | | | | | | | | | | Now that there are no longer any users of regmap.h in headers, let's switch all users in the source files to linux/regmap.h. That way, the only users of regmap.h whether directly or indirectly will be out-of-tree code, which will fail with an error if they are dependent on the old semantics of regmap_bulk_read and regmap_bulk_write. After a transitory period, we can then drop regmap.h. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20231020071853.2826528-12-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* imx: Fix Kconfig dependencyAlexander Shiyan2023-09-041-0/+1
| | | | | | | | | | | | | | | | WARNING: unmet direct dependencies detected for IMX_OCOTP Depends on [n]: NVMEM [=n] && (ARCH_IMX6 [=n] || ARCH_VF610 [=n] || ARCH_IMX8M[=y] || ARCH_IMX7 [=n]) && OFDEVICE [=y] Selected by [y]: - IMX8M_FEATCTRL [=y] && ARCH_IMX8M [=y] WARNING: unmet direct dependencies detected for IMX_OCOTP Depends on [n]: NVMEM [=n] && (ARCH_IMX6 [=n] || ARCH_VF610 [=n] || ARCH_IMX8M[=y] || ARCH_IMX7 [=n]) && OFDEVICE [=y] Selected by [y]: - IMX8M_FEATCTRL [=y] && ARCH_IMX8M [=y] Signed-off-by: Alexander Shiyan <eagle.alexander923@gmail.com> Link: https://lore.barebox.org/20230824153933.817192-1-eagle.alexander923@gmail.com Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: have IMX8M_FEATCTRL select IMX_OCOTPAhmad Fatoum2023-07-041-0/+1
| | | | | | | | | | | | | | IMX8M_FEATCTRL selects FEATURE_CONTROLLER, so of_feature_controller_check() will return an error if the feature controller driver is missing. Given that the default for IMX_OCOTP is n, but for IMX8M_FEATCTRL is y, this error case is easily hit. Resolve this by selecting IMX_OCOTP when IMX8M_FEATCTRL is enabled. Reported-by: Bastian Krause <bst@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230703172054.536931-2-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: featctrl: add help text for CONFIG_IMX8M_FEATCTRLAhmad Fatoum2023-07-041-1/+4
| | | | | | | | | There's no equivalent Linux driver, so a short help text is certainly in order. While at it, replace spaces with tabs for the prompt line. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230703172054.536931-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* treewide: add MODULE_DEVICE_TABLE markersAhmad Fatoum2023-06-131-0/+1
| | | | | | | | | | | | | | | | Syncing device trees with Linux upstream can lead to breakage, when the device trees are switched to newer bindings, which are not yet supported in barebox. To make it easier to spot such issues, we want to start applying some heuristics to flag possibly problematic DT changes. One step towards being able to do that is to know what nodes barebox actually consumes. Most of the nodes have a compatible entry, which is matched by an array of of_device_id, so let's have MODULE_DEVICE_TABLE point at it for future extraction. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20230612125908.1087340-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct driver_d to driverSascha Hauer2023-01-101-2/+2
| | | | | | | | | | | The '_d' suffix was originally meant to distinguish barebox struct names from Linux struct names. struct driver doesn't exist in Linux, so we can rename it and remove the meaningless suffix. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename struct device_d to deviceSascha Hauer2023-01-102-5/+5
| | | | | | | | | | | | | The '_d' suffix was originally introduced in case we want to import Linux struct device as a separate struct into barebox. Over time it became clear that this won't happen, instead barebox struct device_d is basically the same as Linux struct device. Rename the struct name accordingly to make porting Linux code easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Rename device_d::device_node to device_d::of_nodeSascha Hauer2023-01-101-4/+4
| | | | | | | | | | | | | | | | | | | | Linux struct device has the member of_node for the device_node pointer. Rename this in barebox accordingly to minimize the necessary changes when porting Linux code. This was done with the semantic patch: @@ struct device_d E; @@ - E.device_node + E.of_node @@ struct device_d *E; @@ - E->device_node + E->of_node Plus some manual adjustments. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.barebox.org/20221214123512.189688-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX8MP: add feature controller support for PlusAhmad Fatoum2022-10-181-7/+13
| | | | | | | | | | | | | | Plus has lots of peripherals that need be disabled, depending on fusebox settings. Some of these are already described in the upstream device tree, so reference them in the barebox DT and add the necessary glue for disabling them like we already do on i.MX8MM/N. We omit CPU fusing for now. These are handled by tester3 and would need a bit more rework. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221017134929.622022-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: imx8m-featctrl: check if all bits are setAhmad Fatoum2022-10-181-2/+7
| | | | | | | | | | | | | The bits are not documented in the reference manual, so the bit masks were taken from NXP code written for U-Boot. There, checking is done for whether any bit is set. For 8MP however, all-bits-set is checked. Testing on i.MX8MM shows that all bits are set though, so switch to that for uniformity. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20221017134929.622022-3-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2022-09-143-0/+71
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| * soc: imx: add i.MX8M feature controller driverAhmad Fatoum2022-09-013-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The tester4 fuse bank of the i.MX8M is a 32-bit collection of fuses, apaprently fused during test, which contains information about the available IPs: How many cores are available and whether a VPU and GPU is available an usable. Add a imx8m_feat_ctrl_init() function that initializes a bitmap of supported features using tester4's value and registers a feature controller with a check callback that just looks up the relevant bit. This function can then be called from a standalone driver or from the fuse bank (ocotp) driver itself. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220818051955.2088238-6-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: gpcv2: make available to all i.MX8MAhmad Fatoum2022-09-131-3/+3
| | | | | | | | | | | | | | | | | | Now that the driver supports i.MX8M Mini, Nano and Plus, we should no longer restrict it to just i.MX7 and i.MX8MQ. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220905070406.539244-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: gpcv2: extend for i.MX8M Mini/Nano/Plus supportAhmad Fatoum2022-09-011-90/+864
| | | | | | | | | | | | | | | | | | | | Add suppport for i.MX8MM, i.MX8MN and i.MX8MP, taken directly from the kernel driver. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20220831125248.2105893-5-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: gpcv2: align with upstream Linux driverAhmad Fatoum2022-09-011-80/+29
| | | | | | | | | | | | | | | | | | | | Bring the code closer to the upstream Linux driver to make it better comparable to that code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20220831125248.2105893-4-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: gpcv2: split power_up/power_offAhmad Fatoum2022-09-011-13/+79
| | | | | | | | | | | | | | | | | | | | | | | | Splitting a single power function into power_up/power_off makes the code easier to follow. The kernel uses the same approach, so do it for barebox as well. This only splits up the functions into two without functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20220831125248.2105893-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | soc: imx: gpcv2: switch to regmapAhmad Fatoum2022-09-011-23/+32
|/ | | | | | | | | | The Kernel driver uses regmap, so switch to regmap as well to get the code closer to the kernel code. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.barebox.org/20220831125248.2105893-2-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: associate PGC device tree node with platform deviceAhmad Fatoum2022-08-091-1/+1
| | | | | | | | | | We aren't using of_platform_device_create, but instead create our own platform devices which lack a reference from the device tree node to the newly created device. Add this reference to support of_device_ensure_probed. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20220808140035.1672733-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: split PGC domain probe in two passesLucas Stach2022-01-181-2/+20
| | | | | | | | | | | | | | | | | | Currently it is possible that the platform device for a nested PGC domain is added before the parent PGC device is there, which leads to -EPROBE_DEFER when probing the driver. With normal probe this isn't an issue, as the probe will be retried. With deep-probe this is fatal, as the PGC domain devices aren't probed from DT, but via registration of platform devices from the GPC driver, so the usual deep-probe approach to ensure the devices are probed before the lookup isn't working in this case. Make sure to register the PGC domain platform devices in the correct order to avoid the EPROBE_DEFER altogether. Signed-off-by: Lucas Stach <dev@lynxeye.de> Link: https://lore.barebox.org/20220116213221.3466936-2-dev@lynxeye.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: migrate "GPL-2.0+" license identifiers to SPDX 2.0Roland Hieber2021-11-221-1/+1
| | | | | | | | | "GPL-2.0-or-later" was introduced in SPDX 2.0, and the old identifier "GPL-2.0+" is now deprecated; see <https://spdx.org/licenses>. Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-3-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: migrate "GPL-2.0" license identifiers to SPDX 2.0Roland Hieber2021-11-222-2/+2
| | | | | | | | | | "GPL-2.0-only" was introduced in SPDX 2.0, and the old identifier "GPL-2.0" is now considered deprecated; see <https://spdx.org/licenses>. Fixes: 28f4a6a4df76f0f1581d (2021-10-30, "drivers: add missing SPDX-License-Identifier") Signed-off-by: Roland Hieber <rhi@pengutronix.de> Link: https://lore.barebox.org/20211117113851.2022669-2-rhi@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers: add missing SPDX-License-IdentifierAhmad Fatoum2021-11-012-0/+2
| | | | | | | | | | | | | | | | | | | | This adds the suitable SPDX-License-Identifier to all files in drivers/ that previously lacked one. To aid manual inspection, following heuristics can be used: * No changes outside of comments/whitespace: git show -U0 HEAD | rg -v '^(@@|diff|index)|[-+]([-+]|//|#|[\s/]\*)' * -or-later come in pairs: git show --inter-hunk-context=19 HEAD | \ perl -0777 -F'/^@/gm' -ne 'for (@F) { @m = /later/g; print if @m & 1 }' Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Link: https://lore.barebox.org/20211030175632.2276077-4-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: add support for i.MX8MQ SoCAndrey Smirnov2019-02-113-5/+180
| | | | | | | | | | | | | | | Port of a Linux commit 685efffe37c921cf1d56dd3c8617dc67bc343a99 The GPCv2 on the Freescale i.MX8MQ SoC works in the same way as the GPCv2 on the i.MX7, but only controls more power domains with a different mapping. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: prefix i.MX7 specific definesAndrey Smirnov2019-02-111-22/+22
| | | | | | | | | | | | Port of a Linux commit a800f418420d37f60fa471665a156c45d2702437 So we can add i.MX8M support without introducing name clashes. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: Switch to SPDX identifierAndrey Smirnov2019-02-111-7/+1
| | | | | | | | | | | | | Port of a Linux commit 8d8e3b7d8f06f69005d829d4a195b00ef976004b Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: make pgc driver more generic for other i.MX platformsAndrey Smirnov2019-02-111-27/+41
| | | | | | | | | | | | | | | | | | | Port of a Linux commit 73f59712a1a3e532a2cbfe582ecfdbf56c33297d i.MX8MQ and i.MX8MM share same gpc module with i.MX7D, they can reuse gpcv2 pgc driver for power domain control, this patch renames all functions and structure definitions started with "imx7" to "imx", and use .data in imx_gpcv2_dt_ids[] to pass platform specific power domain data for power domain driver, thus make gpcv2 pgc driver more generic for i.MX platforms. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: gpcv2: use A_CORE instread of A7 for more i.MX platformsAndrey Smirnov2019-02-111-9/+9
| | | | | | | | | | | | | | | Port of a Linux commit fea88b2b80ab7a01982a6494ea8e8099cddc7b38 gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7 cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53 cores, so let's use A_CORE instread of A7 to avoid confusion. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* soc: imx: Add GPCv2 power gating driverAndrey Smirnov2019-01-183-0/+325
Port of a Linux commit 03aa12629fc4f73acf28e519c9ee9cb1f5dd3706 Add code allowing for control of various power domains managed by GPCv2 IP block found in i.MX7 series of SoCs. Power domains covered by this patch are: - PCIE PHY - MIPI PHY - USB HSIC PHY - USB OTG1/2 PHY Support for any other power domain controlled by GPC is not present, and can be added at some later point. Testing of this code was done against a PCIe driver. Cc: yurovsky@gmail.com Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Dong Aisheng <dongas86@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Linux commit 9e01e2d56db23485a75864b6aeee8e443f024ddb was squashed here as well: soc: imx: gpcv2: fix regulator deferred probe If a regulator requests a deferred probe, the power domain gets initialized twice. This leads to a list double add (without list debugging the kernel hangs due to the double add later): WARNING: CPU: 0 PID: 19 at lib/list_debug.c:31 __list_add_valid+0xbc/0xc4 list_add double add: new=c1229754, prev=c12383b4, next=c1229754. Initialize the power domain after we get the regulator. Also do not print an error in case the regulator defers probing. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver") Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Tested-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Linux commit 3637f12faf507b0a4b8ac1e7115fc99583ab1db3 was squashed here as well soc: imx: gpcv2: correct PGC offset Correct MIPI/PCIe/USB_HSIC's PGC offset based on design RTL, the values in the Reference Manual (Rev. 1, 01/2018 and the older ones) are incorrect. The correct offset values should be as below: 0x800 ~ 0x83F: PGC for core0 of A7 platform; 0x840 ~ 0x87F: PGC for core1 of A7 platform; 0x880 ~ 0x8BF: PGC for SCU of A7 platform; 0xA00 ~ 0xA3F: PGC for fastmix/megamix; 0xC00 ~ 0xC3F: PGC for MIPI PHY; 0xC40 ~ 0xC7F: PGC for PCIe_PHY; 0xC80 ~ 0xCBF: PGC for USB OTG1 PHY; 0xCC0 ~ 0xCFF: PGC for USB OTG2 PHY; 0xD00 ~ 0xD3F: PGC for USB HSIC PHY; Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Fixes: 03aa12629fc4 ("soc: imx: Add GPCv2 power gating driver") Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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