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* spi: add atmel-quadspi supportOleksij Rempel2019-08-213-0/+551
| | | | | | | This adds support for the Atmel quadspi device. Ported from Linux-5.2. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: at91: replace __raw_{readl, writel} of peripherals with readl, writelAhmad Fatoum2019-05-241-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Use the potentially endianness-changing readl, writel and siblings directly. They looks prettier and are the correct thing to do, as even if the CPU is in big-endian mode, the peripherals are little-endian. Unlike Linux, barebox readl,writel are the same Linux' {readl,writel}_relaxed (they don't imply memory barriers) and thus there shouldn't be any functional change. Patch was generated by a mass search and replace. I looked it over, adjust some whitespace and further verified by reviewing the output of git diff HEAD~1 --word-diff | \ perl -pe 's/\[-(.*?)__raw_/{+$1/; s/-\]\{\+/+}{+/;' \ -e 's/(\{\+.*?\+\})\1/__ALL_IS_WELL__/' | grep '+}{+' which filters out the common case of lines where a single __raw_{readT,writeT} had its __raw_ prefix stripped without any further changes. Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: Kconfig: remove dependency list from Freescale QSPI controllerSascha Hauer2019-05-151-1/+0
| | | | | | | | The dependency list for the Freescale QSPI controller doesn't match the SoCs the hardware is in at all. Remove the dependency entirely as the driver builds on all machines. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: add driver for Freescale QSPI controllerSteffen Trumtrar2019-05-083-0/+881
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is based on the Linux v5.1-rc1 driver introduced with the commit: commit 84d043185dbe0d1b4f6db575bd91c834d37e2f78 Refs: v5.0-rc1-1-g84d043185dbe Author: Frieder Schrempf <frieder.schrempf@kontron.de> AuthorDate: Mon Jan 7 09:29:47 2019 +0000 Commit: Mark Brown <broonie@kernel.org> CommitDate: Mon Jan 7 16:56:24 2019 +0000 spi: Add a driver for the Freescale/NXP QuadSPI controller This driver is derived from the SPI NOR driver at mtd/spi-nor/fsl-quadspi.c. It uses the new SPI memory interface of the SPI framework to issue flash memory operations to up to four connected flash chips (2 buses with 2 CS each). The controller does not support generic SPI messages. This patch also disables the build of the "old" driver and reuses its Kconfig option CONFIG_SPI_FSL_QUADSPI to replace it. Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de> Acked-by: Han Xu <han.xu@nxp.com> Reviewed-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Tested-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Tested-by: Han Xu <han.xu@nxp.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: Extend the core to ease integration of SPI memory controllersSteffen Trumtrar2019-05-084-0/+571
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync with Linux v5.1-rc1. This is the barebox adoption of the commit commit c36ff266dc82f4ae797a6f3513c6ffa344f7f1c7 Author: Boris Brezillon <boris.brezillon@bootlin.com> Date: Thu Apr 26 18:18:14 2018 +0200 spi: Extend the core to ease integration of SPI memory controllers Some controllers are exposing high-level interfaces to access various kind of SPI memories. Unfortunately they do not fit in the current spi_controller model and usually have drivers placed in drivers/mtd/spi-nor which are only supporting SPI NORs and not SPI memories in general. This is an attempt at defining a SPI memory interface which works for all kinds of SPI memories (NORs, NANDs, SRAMs). Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@exceet.de> Tested-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: Generalize SPI "master" to "controller"Steffen Trumtrar2019-05-081-35/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync with Linux v5.1-rc1. This is the barebox adoption of the commit commit 8caab75fd2c2a92667cbb1cd315720bede3feaa9 Author: Geert Uytterhoeven <geert+renesas@glider.be> Date: Tue Jun 13 13:23:52 2017 +0200 spi: Generalize SPI "master" to "controller" Now struct spi_master is used for both SPI master and slave controllers, it makes sense to rename it to struct spi_controller, and replace "master" by "controller" where appropriate. For now this conversion is done for SPI core infrastructure only. Wrappers are provided for backwards compatibility, until all SPI drivers have been converted. Noteworthy details: - SPI_MASTER_GPIO_SS is retained, as it only makes sense for SPI master controllers, - spi_busnum_to_master() is retained, as it looks up masters only, - A new field spi_device.controller is added, but spi_device.master is retained for compatibility (both are always initialized by spi_alloc_device()), - spi_flash_read() is used by SPI masters only. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: i.MX: Fix wrong bus nubering with devicetreeAlexander Shiyan2018-12-141-4/+7
| | | | | Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: omap: make locally used functions staticSascha Hauer2018-11-191-4/+4
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/net-switch-mv88e6xxx'Sascha Hauer2018-11-091-1/+1
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| * drivers: Introduce dev_set_name()Andrey Smirnov2018-10-181-1/+1
| | | | | | | | | | | | | | | | Introduce dev_set_name() in order to hide implementation details of setting device's name so it'd be easier to change it. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: at91: remove mach/io.hSascha Hauer2018-11-061-1/+0
|/ | | | | | | Remove at91_sys_read() and at91_sys_write() since these are no longer used. This makes mach/io.h empty so remove that aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: atmel_spi: fix duplicate const warningLadislav Michl2018-09-261-1/+1
| | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: Select DRIVER_SPI_IMX_2_3 for i.MX8MQAndrey Smirnov2018-08-131-1/+1
| | | | | | | | Select DRIVER_SPI_IMX_2_3 for i.MX8MQ since that is the variant that's being used Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: Select DRIVER_SPI_IMX_2_3 for i.MX7Andrey Smirnov2018-01-111-1/+1
| | | | | | | | Select DRIVER_SPI_IMX_2_3 for i.MX7 since that is the variant that's being used. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: ecspi: Enable imx->clk as a part of initializationAndrey Smirnov2018-01-111-0/+7
| | | | | | | | Some SoCs (e. g. i.MX7) do not enable this clock by default, so add code to take care of that in the driver. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: imx: make xchg_single timeout value compatible for older boardsAlexander Kurz2017-12-151-2/+5
| | | | | | | | | | | A call of xchg_single will issue the transfer of 24 data bits with a given maximum frequency. Since there exist some i.MX based boards with spi-max-frequency = <100000>, change the xchg_single timeout to still support those boards. Fixes: 1439cdf7c6fc ("spi: imx: add timeout to xchg_single") Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: imx: add timeout to xchg_singleUwe Kleine-König2017-08-151-4/+24
| | | | | | | | If there is a problem STAT_RR might never be set which results in an endless loop. Break out after 10 µs with -ETIMEOUT instead. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* spi: imx: add error checkingUwe Kleine-König2017-08-151-29/+48
| | | | | | | | | This makes it possible that the xchg_single callbacks return an error code that is then passed to the caller of spi_transfer. There is no change in behaviour intended as up to now the callbacks always return 0. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
* of: use of_property_read_bool where appropriateSascha Hauer2017-04-121-4/+4
| | | | | | Use of_property_read_bool where boolean properties are read. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: atmel_spi: Add DT supportAndrey Smirnov2017-03-301-3/+26
| | | | | | Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: atmel_spi: Use VERSION register instead of CPU typeAndrey Smirnov2017-03-092-6/+30
| | | | | | | | Use VERSION register instead of CPU type to determine IP block's version and capabilities. This what corresponding Linux kernel driver does. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: atmel_spi: Configure CS GPIO as outputAndrey Smirnov2017-03-091-1/+5
| | | | | | | | On AT91 GPIOs default to being inputs, so we need to explicitly configure CS gpio to being an output. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: i.MX: Add driver for DSPIAndrey Smirnov2017-01-303-0/+423
| | | | | | | | Add driver for DSPI - SPI IP core found on various Freescale/NXP products (including Vybrid/VF610). Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/mvebu'Sascha Hauer2017-01-111-31/+56
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| * spi: mvebu: improve error reportingUwe Kleine-König2017-01-101-3/+11
| | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: add LSB supportUwe Kleine-König2017-01-101-4/+24
| | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: use wait_on_timeout instead of a loop with udelay.Uwe Kleine-König2017-01-101-7/+5
| | | | | | | | | | | | | | | | This looks nicer and reduces the time to transfer 40 MB at 50 MHz from 203 seconds to 87 seconds. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: only read from bus when data is neededUwe Kleine-König2017-01-101-5/+5
| | | | | | | | | | | | | | | | This optimization reduced the time to transfer 40 MB at 50 MHz from 214 seconds to 203 seconds. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: various non-critical improvements to armada_370_xp_spi_set_baudrateUwe Kleine-König2017-01-101-4/+3
| | | | | | | | | | | | | | | | | | - Initialize pdiv in declaration - fix format specifiers - simplify range check, pdiv can never be > 7 Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: make sure the value calculated for PSCL is also usedUwe Kleine-König2017-01-101-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | The function used a separate variable to hold the value calculated and only used it for range checking but then didn't use it. This fixes calculation for slow baud rate that require a divider > 15. Additionally fix the rounding. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: fix register macros for Armada 370/XP clock dividerUwe Kleine-König2017-01-101-2/+2
| | | | | | | | | | Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: mvebu: fix error handling for transfer problemsUwe Kleine-König2017-01-101-4/+4
| | | | | | | | | | | | | | | | | | When a message transfer fails no further messages are transferred, but the error value was not propagated to the caller. Fixes: 5db1a578d6ed ("spi: add Marvell MVEBU SoC SPI driver") Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | spi: i.MX: reset controller on initSascha Hauer2017-01-101-0/+8
|/ | | | | | | | | | | | In rare cases the controller is does not work right after probe. When this happens the registers show that the TXFIFO contains words, but the transfer is never started. We observed that on some boards which boot from SPI NOR. The xload SPI code leaves the controller enabled, so the SPI controller is enabled during probe(). Disabling it before usage (and thus resetting it) helps. We haven't found out why exactly this happens. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: mvebu: fix baudrate selection for Armada 370/XPUwe Kleine-König2016-12-071-3/+5
| | | | | | | | | | | | | | | | | | There are two problems that made the driver choose the wrong baudrate calculation algorithm: a) The compatible used on 370/XP isn't marvell,armada-370-xp-spi but marvell,armada-370-spi or marvell,armada-xp-spi respectively. b) The probe function uses match = of_match_node(mvebu_spi_dt_ids, dev->device_node); to determine the right algorithm. As the devices are also compatible to marvell,orion-spi and this comes first in mvebu_spi_dt_ids[] it's always the older Orion algorithm that is used. This patch fixes both problems. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: mvebu: make more than one device on a bus workUwe Kleine-König2016-10-191-1/+1
| | | | | | | The mvebu socs support up to 8 chip selects. Make use of them. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX drivers: enable i.MX50 where already supportedAlexander Kurz2016-09-121-2/+2
| | | | | | | | The i.MX50 SOC includes one ESDHCv3, three ESDHCv2, one cspi and two ecspi instances which are supported by existing drivers. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM i.MX31: add SPI supportAlexander Kurz2016-08-032-4/+13
| | | | | | | | | | | | | | | | | The i.MX31 SPI interface was refered by freescale as spi_ver_0_4 in one of their older vendor extended linux releases. spi_ver_0_4 differs only in minor aspects to spi_ver_0_7 (i.MX35) which is already supported by barebox. Regarding barebox, the differences boil down to the location and length of the CHIP SELECT and BIT COUNT/BURST LENGTH elements of CONREG. The spi_ver_0_4 variant is limited to single word bursts with a maximum of 32 bits_per_word. Add support for the i.MX31 SPI interface to the barebox spi_ver_0_7 implementation. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: imx: Remove the use of property "fsl, spi-num-chipselects"Alexander Shiyan2016-06-271-12/+5
| | | | | | | | The "fsl,spi-num-chipselects" property will be marked obsolete soon. This patch updates the driver to be ready to such changes. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* MIPS: ath79: dts: sync spi stuff with linux v4.7-rc2Antony Pavlov2016-06-141-1/+1
| | | | | Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2016-05-091-1/+1
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| * whole tree: remove trailing whitespacesDu Huanpeng2016-04-211-1/+1
| | | | | | | | | | Signed-off-by: Du Huanpeng <u74147@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | string: Fix (v)asprintf prototypesSascha Hauer2016-04-151-1/+1
|/ | | | | | | | | | Our asprintf and vasprintf have different prototypes than the glibc functions. This causes trouble when we want to share barebox code with userspace code. Change the prototypes for (v)asprintf to match the glibc prototypes. Since the current (v)asprintf are convenient to use change the existing functions to b(v)asprintf. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* driver: replace dev_request_mem_region with dev_request_mem_resourceSascha Hauer2016-03-077-13/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: i.MX: optimize transfers for ECSPI v2.3Sascha Hauer2015-11-301-1/+72
| | | | | | | | | | | | | | Instead of writing one word to the txfifo and then wait until one is received in the rxfifo we can write while the txfifos are not full and read as long the rxfifos contain data. This makes transfers for the m25p80 driver around 7 times faster here. Unlike the last version this time we only optimize the common case with 8 bits per word and SPI_LSB_FIRST cleared. The other cases would require more bit shuffling of the data. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Revert "spi: i.MX: optimize transfers for ECSPI v2.3"Sascha Hauer2015-10-051-72/+1
| | | | | | | This does not work on the Efika MX Smartbook which uses SPI to connect the MC13892. Needs some rework. This reverts commit 746a5530bee37c8d2ffc75609447641b3f3cb55b.
* spi: i.MX: optimize transfers for ECSPI v2.3Sascha Hauer2015-08-311-1/+72
| | | | | | | | | | Instead of writing one word to the txfifo and then wait until one is received in the rxfifo we can write until the txfifos are not full and read as long the rxfifos contain data. This makes transfers for the m25p80 driver around 7 times faster here. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: i.MX: create SoC specific transfer functionsSascha Hauer2015-08-311-14/+31
| | | | | | | There are SoC specific ways to optimize transfers. Make the way free to implement these by creating SoC specific transfer functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* spi: i.MX: use start mode control bitSascha Hauer2015-08-311-6/+2
| | | | | | | | The i.MX SPI controller in version 2.3 can immediately start a transfer when the txfifo is written to. In this mode we no longer have to trigger the transfer with the xch bit which makes the code a bit simpler. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/misc'Sascha Hauer2015-08-061-1/+1
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| * spi: only register enabled child nodesJan Luebbe2015-07-091-1/+1
| | | | | | | | | | Signed-off-by: Jan Luebbe <jluebbe@debian.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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