| Commit message (Collapse) | Author | Age | Files | Lines |
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Check for the return value of devfs_add_partition with IS_ERR.
Otherwise we dereference a NULL pointer when devfs_add_partition
fails.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also drop redundant xzalloc() result check
as xzalloc() does not return in case of memory allocation error.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some mtd device does not support lock and unlock functions. Adding this check
avoids crashing when mtd_part_lock/unlock are called for such devices.
Signed-off-by: Zahari Doychev <zahari.doychev@linux.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ENC28J60 is a stand-alone Ethernet controller with SPI Interface
and integrated 10BASE-T PHY.
This driver was ported from linux-3.15.
The most notable barebox driver version changes:
* add device tree support;
* drop netif_msg_*() debug level checking;
* use IF_ENABLED for checking CONFIG_ENC28J60_WRITEVERIFY;
* add mii_bus support.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds initial support for Marvell PHY specific drivers. As a first
PHY, a driver for MV88E1121R is ported over from Linux.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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RGMII PHY modes include delayed interface modes RGMII_ID, RGMII_TXID,
and RGMII_RXID. Also check for those modes when setup RGMII mode in
port serial ctrl register.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Marvell Orion ethernet IP originally is multi-port capable, but SoCs
using the IP usually have multiple single-port controllers built in.
Currently, orion-gbe driver registers each port device with a constant
name, which causes a name conflict with multiple controller instances.
This patch uniquifies port device name generation by prepending
controller's base register address to resolve the name conflict.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ePAPR defines phy-connection-type as standard property for PHY interface
between Ethernet device and PHY device. Add corresponding property check
to of_get_phy_mode.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This driver is based on Linux 2.6.39 8139too driver.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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used shorten version of linux-2.6.39 pci_ids.h
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This driver provides common support for accessing
the CBUS FPGA I2C lines through the gpio library.
Additional i2c bitbang driver must be enabled
in order to use the functionality of the i2c controller.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Conflicts:
arch/arm/boards/Makefile
arch/arm/dts/Makefile
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This adds pinctrl drivers for Marvell Dove and Kirkwood SoCs based
on a common driver stub. This design is based on the corresponding
Linux driver and should ease additional drivers for Marvell Armada
SoCs.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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DT PCI address translation needs a special handling. This imports
the corresponding translator into of/address.c but makes it selectable
through Kconfig. Compared to the Linux version, we don't check for
struct device_node's type which does not exist on Barebox but directly
for device_type property set to "pci".
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Timers found on Marvell Armada 370 and XP require different setup.
While timer clock on Armada 370 can be derived from a divided
reference clocks, Armada XP always uses a 25MHz reference.
This also updates compatibles to destinguish timers for both SoCs
and fixes some whitespace issues on defines.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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This fixes Armada 370 TCLK frequencies that are off by
a factor of 10.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Delete the partition erase size initialisation to let the code
that follows determine the biggest partition erase size.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The FSF address has changed; The FSF site says that
address is
Free Software Foundation
51 Franklin Street, Fifth Floor
Boston, MA 02110-1301
USA
(see http://www.fsf.org/about/contact/)
Instead of updating it each time the address changes,
just drop it completely treewide.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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CFI Nor flashes need lock/unlock which is not implemented for partitions.
Fix this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The current code counts the eraseregions a new partition spans and
sets the partitions number of eraseregions accordingly, but the code
forgets to allocate and fill in the eraseregions for the partition
mtd device. This makes the erase operation crash with a NULL pointer
exception.
This patch fixes this with the same approach the kernel uses: Set
the number of eraseregions to 1 unconditionally and the eraseregion
size to the maximum of the eraseregions found in the partition.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Set mtd erasize using max erasesize from erase regions
Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Herve Codina <Herve.CODINA@celad.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The controller is similar enough to the ones found
on earlier generation SoCs to not need any additional
changes.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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As the real value is 2^p a input value of 0 is
actually valid.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Tegra124 extended the mux by 1bit to allow for
more PLL sources.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We can reuse the Tegra30 pinctrl driver, as the bit
layout is the same. Just add the pin and drivegroups
and some compile-time magic to avoid bloat.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Access pin and drivegroups through a drvdata pointer.
This allows to insert other groups for SoCs with a
similar bit layout easily.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some USB ports only have one possiblitly for the phy_type and
the type is not specified in the devicetree in this case.
Rely on the reset default instead of failing.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There is no need to check the card-detect status
for non-removable devices.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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These are special groups to configure pad properties
such as drive strength and slew rate for a group of
pads.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Those flags should be set from the DT parsing code.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Needed for SD cards connected to sdmmc1 or sdmmc3
to work properly.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some peripherals have a double wide divider in front
of them.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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