summaryrefslogtreecommitdiffstats
path: root/drivers
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-next/imx'Sascha Hauer2017-02-1329-152/+2324
|\
| * pinctrl: i.MX7: Fix LPSR sel_imput settingSascha Hauer2017-02-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX7 has two pinmux controllers, the regular and the LPSR controller. The LPSR pinmux controller doesn't have any sel_input registers, instead they can be found in the regular pinmux controller. This means whenever we want to apply the the sel_input setting for the LPSR controller, we have to apply them to the regular controller instead. In barebox take the easy way out and just add the difference of the two base addresses to the register offset. The same issue is present in the Kernel aswell, but when the bootloader already configured the pins correctly nobody notices when the Kernel sel_input setup effectively is a no-op. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX7: setup ethernet clocksSascha Hauer2017-02-061-0/+11
| | | | | | | | | | | | | | Reparent ethernet clocks so that they can be used by the fec driver. The values are the same as U-Boot uses. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX7: do not register PLL bypass clocks as separate clocksSascha Hauer2017-02-061-119/+85
| | | | | | | | | | | | | | | | | | | | | | | | | | In the Kernel the bypass bits in the PLLs are now registered as separate clocks and are no longer handled in the PLL code. In barebox we haven't made this step and there currently seems to be no reason to do so. This means that the bypass bits are currently modified in both the PLL driver and in the separate clocks which does not work properly. Drop all the bypass clocks to let the bypass bits be handled in the PLL driver exclusively. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX7: Fix ethernet clocksSascha Hauer2017-02-062-4/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | The original clock code from Linux registers some gates at base + 0x44e0, 0x44f0, 0x4500, 0x4510. These are not in the reference manual and do not seem to have any effect on the hardware. The reference manual lists clocks at 0x4700 and 0x4710 which Linux does not control at all. These clocks really do have an effect on the hardware and are needed for ethernet support. Register the existing clocks rather than the made up clocks to support ethernet. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: Add support for shared gatesSascha Hauer2017-02-062-1/+125
| | | | | | | | | | | | | | | | | | | | | | Sometimes a single software control knob controls multiple gates in hardware. This patch adds support for shared gates which help coping this situation. The first gate is registered with the hardware gate as usual, the others are registered as shared gates which does not have hardware control itself, but only switches the real hardware gate. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX7: do clock reparenting when all clocks are initializedSascha Hauer2017-02-061-8/+23
| | | | | | | | | | | | | | | | | | By the time the i.MX7 clock driver probes the fixed clocks which are the roots of the clock tree are not yet present, so reparenting especially to one of the fixed clocks does not work. Move the tree setup to a later initcall when the fixed clocks are there. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX: Pass CLK_OPS_PARENT_ENABLE where necessarySascha Hauer2017-02-061-4/+4
| | | | | | | | | | | | CLK_OPS_PARENT_ENABLE was missing on some i.MX7 specific clocks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX: clk-gate2: Allow to pass flagsSascha Hauer2017-02-062-9/+10
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: implement CLK_OPS_PARENT_ENABLESascha Hauer2017-02-061-4/+27
| | | | | | | | | | | | | | | | Some clocks may only be modified when their parent clocks are enabled. The kernel has the CLK_OPS_PARENT_ENABLE flag for this purpose. Implement it for barebox aswell. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: Keep enable count consistent over reparentSascha Hauer2017-02-061-6/+15
| | | | | | | | | | | | | | | | When reparenting a clock we have to make sure the new parent is enabled when the clock was enabled on the old parent. Also we have to decrease the old parents use counter when the clock was enabled. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX: Add i.MX6SL supportAlexander Kurz2017-02-022-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Most i.MX6SL infrastructure is already covered in barebox by general i.MX6 support. Missing infrastructure provided in separate commits are * SoC type detection * Clock infrastructure Add the missing fsl,imx6sl-mmdc, so it will not be catched by fsl,imx6q-mmdc and the remaining bits and pieces to provide barebox i.MX6SL SoC support. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX6SL: import clock infrastructure from linuxAlexander Kurz2017-02-021-0/+329
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Import i.MX6SL clock infrastructure from linux clk-imx6sl.c To save space, clocks beeing unlikely usefull for bootloader purposes (SSI, SPDIF, EXTERN_AUDIO) were not imported. Further, the fixup code from linux mainline commits a49e6c4b8204 ("ARM: imx: add common clock support for fixup mux") cbe7fc8aaeef ("ARM: imx: add common clock support for fixup div") was ignored for this commit. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM i.MX31 clk: add pll_ref_clk and MCU PLL bypass selectAlexander Kurz2017-01-261-5/+23
| | | | | | | | | | | | | | | | | | | | | | The three MX31 PLL may be clocked from either CKIH or a frequency-multiplied derivate of CKIL generated by the Frequency Pre Multiplier FPM. Add the pll_ref_clk selection infrastructure and support for MCU PLL bypass to support clock switching and boards not clocked CKIH. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * video: tc358767: add copyright linesAndrey Gusakov2017-01-201-0/+2
| | | | | | | | | | | | | | Add copyright lines for Zodiac who paid for driver development. Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * regulator: Add pfuze driverSascha Hauer2017-01-203-0/+174
| | | | | | | | | | | | | | | | This is not yet a regulator driver, only the register map is exported as /dev/pfuze* so the registers can be accessed for debugging purposes. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * pinmmux: i.MX: add pin mux support for i.MX7Juergen Borleis2017-01-201-8/+32
| | | | | | | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * watchdog: i.MX: Fix internal/external resetSascha Hauer2017-01-201-2/+14
| | | | | | | | | | | | | | | | | | | | | | The watchdog can either reset only the SoC or assert the WDOG_B output signal instead. On some boards it's necessary to use the external WDOG_B output to make sure that external devices like the PMIC are also properly resetted. This has been fixed in the Linux driver which honours a fsl,ext-reset-output device tree property to select between both ways. Do the same in the barebox driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * watchdog: i.MX: add soc_reset operationSascha Hauer2017-01-201-15/+25
| | | | | | | | | | | | | | | | On i.MX21 watchdog type the reset operation is really different from the watchdog enable/set timeout operation, so create an extra callback for this instead of folding both things together. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * serial: i.MX: add i.MX7 supportJuergen Borleis2017-01-191-0/+3
| | | | | | | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX7: Add missing USB clocksSascha Hauer2017-01-191-0/+3
| | | | | | | | | | | | The USB clocks are missing in the Kernel clock code. Add them here. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX: Add clock support for i.MX7Juergen Borleis2017-01-193-0/+908
| | | | | | | | | | Signed-off-by Juergen Borleis <jbe@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: Add clk-cpu supportSascha Hauer2017-01-193-0/+114
| | | | | | | | | | | | Taken from the kernel as of 4.10-rc3. Needed for i.MX7 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: i.MX: pllv3: Add support for the i.MX7 enet pllSascha Hauer2017-01-192-5/+19
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * mci: imx-esdhci: remove wrong write protection testSascha Hauer2017-01-191-12/+2
| | | | | | | | | | | | | | | | | | | | | | Testing for the write protection bit to determine if a card is write protected or not is wrong. The bit may have the wrong value for permanently plugged cards (eMMC) or for boards using a GPIO for write protection detection. Since the core will test for write protection before actually calling into the driver this test can just be removed. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * mci: Allow to partition eMMC boot partitionsSascha Hauer2017-01-191-23/+55
| | | | | | | | | | | | | | | | | | So far the eMMC boot partitions cannot be partitioned from the device tree. Since they are often 4MiB in size they are big enough to hold a barebox image and the environment. Add partition parsing to the boot partitions to allow this usecase. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * of: partitions: force "partitions" subnodeSascha Hauer2017-01-191-6/+6
| | | | | | | | | | | | | | | | | | The binding states that a subnode containing partition subnodes should have the name "partitions". Enforce this so that we do not parse nodes with other names which may have partition descriptions for other disks. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * phy: usb-nop-xceiv: Add clock supportSascha Hauer2017-01-191-3/+15
| | | | | | | | | | | | | | As stated in the FIXME comment this is needed. Get and enable a "main_clk" just like the kernel does. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: imx: Add clock supportSascha Hauer2017-01-191-0/+13
| | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: imx: Add usbmisc support for i.MX7Sascha Hauer2017-01-191-0/+53
| | | | | | | | | | | | Taken directly from Linux-4.10-rc3 Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: imx: Make usb-misc multi instance safeSascha Hauer2017-01-192-15/+28
| | | | | | | | | | | | | | i.MX7 has two usbmisc devices, so we cannot use global instance variables anymore. Create a driver private data struct for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * serial: i.MX: Enable clockSascha Hauer2017-01-191-0/+1
| | | | | | | | | | | | For architectures which do not enable all clocks during initialization. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * mci: imx-esdhc: Enable clockSascha Hauer2017-01-191-0/+1
| | | | | | | | | | | | For architectures which do not enable all clocks during initialization. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i2c: i.MX: Enable clockSascha Hauer2017-01-191-0/+1
| | | | | | | | | | | | For architectures which do not enable all clocks during initialization. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: imx-usb-misc: Add Vybrid supportAndrey Smirnov2017-01-121-0/+28
| | | | | | | | | | | | | | | | Add code to do usbmisc initialization on VF610 family of SoCs. Based on analogous code from Linux kernel. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: Default CONFIG_USB_IMX_PHY to 'y' on VybridAndrey Smirnov2017-01-121-1/+1
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: imx-usb-phy: Add VF610 OF compatiblity stringAndrey Smirnov2017-01-121-0/+2
| | | | | | | | | | | | | | | | | | | | From looking at analogous Linux driver code it seems that all of the differences between code "imx23-usbphy" and "vf610-usbphy" pertain to suspend/resume functionality, which shouldn't affetct Barebox. As a result this commit just adds a compatiblity string and no other code. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: vf610: Add low-level pin configuration helperAndrey Smirnov2017-01-121-5/+6
| | | | | | | | | | | | | | | | Add low-level pin configuration helper for early boot code, and convert pinctrl driver to use that code as well. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: iomuxv3: Use helper functions in iomux-v3.hAndrey Smirnov2017-01-121-34/+4
| | | | | | | | | | | | | | Avoid code duplication by using helper functions from iomux-v3.h Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: vf610: Ramp CPU clock to maximum frequencyAndrey Smirnov2017-01-121-2/+161
| | | | | | | | | | | | | | | | | | | | Mask ROM leaves the CPU running at 264Mhz, so configure the clock tree such that CPU runs at maximum supported frequency. Maximum supported frequncy is determined from speed grading burned into OCOTP fusebox by the vendor. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: clk: Add IMX_PLLV3_SYS_VF610 subtypeAndrey Smirnov2017-01-122-0/+113
| | | | | | | | | | | | | | | | | | | | Add IMX_PLLV3_SYS_VF610 subtype to pllv3 code to be able to control and re-clock PLL1 and PLL2 on Vybrid SoC. This commit also introduces imx_clk_pllv3_locked which allows the user to create PLLv3 and specify how it should be polled for "locked" status (used in .set_rate callback) Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * i.MX: esdhc: Enable host->clk during initializationAndrey Smirnov2017-01-121-0/+7
| | | | | | | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/efi'Sascha Hauer2017-02-131-1/+2
|\ \
| * | serial: efi: improve input handlingMichael Olbrich2017-01-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | 0x08 is the scan-code for 'backspace' not 'delete'. 0x17 indicates the start of an escape sequence, such as "[3~" for 'delete'. Signed-off-by: Michael Olbrich <m.olbrich@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/arm'Sascha Hauer2017-02-132-1/+20
|\ \ \ | |/ / |/| |
| * | serial: ns16550: Set read/write functions depending on reg-io-widthWadim Egorov2017-02-101-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | Set proper register read/write functions depending on reg-io-width device tree property. Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | ARM: start: Fix image size calculationSascha Hauer2017-02-081-1/+1
| |/ | | | | | | | | | | | | | | | | | | In barebox_non_pbl_start() we do not run at the address we are linked at, so we must read linker variables using ld_var(). Since ld_var() current is not available on arm64 we create two zero sized arrays, one at the begin of the image and one at the end. The difference between both is the image size we are looking for. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ata: ide-sff: don't call free for ide_port in error pathUwe Kleine-König2017-01-181-5/+4
| | | | | | | | | | | | | | | | | | The ide_port is provided by the caller so it's not in the responsibility of this function to free this memory in case of error. Actually all callers do the free themselves, too. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | usb: gadget: disable AT91 driver on SAMA5D4Lucas Stach2017-01-171-0/+1
| | | | | | | | | | | | | | | | | | | | | | This architecture is missing the right defines for the system peripherals, that are needed for this driver to build successfully. Disable it for now until someone with a clue about this architecture can fill in the gap. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | of_path: only handle no driver for device if it is on a busIan Abbott2017-01-131-1/+1
|/ | | | | | | | | | This fixes a regression in __of_find_path() for flash devices created by the cadence-quadspi driver, which do not have 'dev->driver' set. Such devices do not have 'dev->bus' set either, so we can use that to qualify the existing test. Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
generated by cgit v1.2.3 (git 2.39.1) at 2024-04-27 02:12:52 +0000