| Commit message (Collapse) | Author | Age | Files | Lines |
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With serdev device support added there's now a corner case where:
1. There is a DT node for a serdev device on one of the UARTs
2. There is no driver that binds against serdev device's compatibility
string
with 1 and 2 being true it is possible to end up in a situation where
a particualr UART has not been initalized to any baudrate when
clock_notifier_call_chain() gets called. This effectively translates
to
set_baudrate(uart, 0);
which for LPUART driver result in a division by zero.
To avoid this problem, convert lpuart_serial_setbaudrate() to treat
zero baudrate as a request to disable the UART. While we are at it add
a BUG_ON() to lpuart_setbrg() to simplify finding any future bugs.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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When sparse support was (intended to be) made optional it was
effectively unconditionally disabled because
IS_ENABLED(USB_GADGET_FASTBOOT_SPARSE)
always evaluates to 0. To actually make use of the introduced kconfig
symbol the CONFIG_ prefix must not be skipped.
Fixes: f4b5d3eeb607 ("usb: gadget: fastboot: Make sparse support optional")
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tested-by: Gavin Schenk <g.schenk@eckelmann.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Halt is not automatically executed if we start the kernel.
So, we may have potentially memory corruptions.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Currently the backlight implementation stretches a brightness change over
a period of 100ms. While this is a fine default for PWM backlights, a user
might wish to change this slew time to meet other constraints or even
completely disable it for some backlight devices.
Add a parameter and provide the default value from the backlight device.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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If an attached bb device was removed before the actual mtd device
the code would try due to a missing pointer reset to access
the no more present bb device handle which leads to a page fault.
This bug was made visible by commit "7649473 mtd: nand: remove
automatically created bb devices" which relys on a correct
mtd->cdev_bb handling.
Signed-off-by: Heinrich Toews <heinrich.toews@wago.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Provide missing .format_mac for i.MX8MQ to prevent driver from
crashing on start.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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On i.MX6 GPMI Nand controller the clock must be disabled during
a rate change. Otherwise glitches on the clock line may occur
which result in errors like:
MXS NAND: Error sending command
MXS NAND: DMA read error
There were previous attempts to fix this. One is in:
54961378f0 imx6: clk: Gate off ENFC clock before setting clock rate
This patch added a clk_disable() right before the rate change. Since
a clk_disable() on a disabled clk is a no-op, the patch added a
clk_enable() to the i.MX6 clk driver in the hope that the clk is
enabled in the nand driver probe and the clk_disable() really takes
place.
This patch doesn't work. First of all it enabled the enfc_podf clk
which was not the one that was actually disabled in the nand driver,
resulting in the nand drivers call to clk_disable() still being a
no-op. Then this patch also only works only on the classic i.MX6 which
was the only one supported at that time, but not on the i.MX6UL, i.MX6SX
and i.MX6SL which have a separate clk driver.
Instead of adding more quirks to the other i.MX6 clk drivers, fix this
in the GPMI driver. We no longer call clk_disable() on a disabled clk,
but instead do a clk_enable() first which makes sure the hardware state
is synchronized to the usage count and the following clk_disable()
is really effective. At the same time we can (and actually must) remove
the quirk in the i.MX6 clk driver.
Also add clk_disable()/clk_enable() around another rate change in the
GPMI driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Upstream kernel driver allows specifying EEPROM name via
"zii,eeprom-name" property. Add code to support that in Barebox as
well.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a backport of patch [1] by Kees Cook
[1] https://lkml.kernel.org/r/20180620182600.GA24297@beast
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Call to dev_dbg in dataflash_read() is located to early, before
command[] is initialize to correct values, so it end up printing
values from previous invocation. Move it such that it prints current
call's values.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Introduce nvmem_cell_get_and_read() that combines getting a NVMEM cell
by name and reading its contents.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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RAVE SP firmware versions found on RDU2 provide decicated bootsource
manipulation commands, which, under the hood, are just thin wrappers
around write/read to a particular location in EEPROM.
Unfortunately, RAVE SP firmware found on RDU1, does not provide any
dedicated bootsource commands and its users are expected to access
EEPROM directly.
In order to avoid having separate code paths for handling those two
cases, convert the code to access EEPROM directly via NVMEM API.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This code should've been removed when the driver was rebased against
latest watchdog plumbing in Barebox.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is needed when host is known to not work properly in high speed
mode.
In linux, chipidea driver supports 'maximum-speed' device tree property.
When that is set to "full-speed", driver sets PFSC bit in PORTSC
register, which disallows use of high speed mode.
This patch implements same support for barebox.
Important technical detail is that PFSC bit is cleared by port reset,
thus setting it has to be done in ehci->init() callback which is called
after ehci_reset().
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a minimal port of a kernel commit 6552d3141064 ("backlight:
Add RAVE SP backlight driver"). All of the changes were kept to a
minimum and limited to impedance matching between Barebox/Linux driver
API.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is a minimal port of a kernel commit 3b51f47be171 ("nvmem: Add
RAVE SP EEPROM driver"). All of the changes were kept to a minimum and
limited to impedance matching between Barebox/Linux driver API.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Make of_property_get_value() public, so it can be used in other part
of the system.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Remove an erroneous bch4 string leftover that
leads to a false ecc mode mapping.
BCH4 support was previously removed by Teresa Remmet:
d316cda 'mtd: nand: omap_gpmc: Remove BCH4 support'
Signed-off-by: Heinrich Toews <heinrich.toews@wago.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The eccsteps where set wrong for OMAP_ECC_BCH8_CODE_HW_ROMCODE.
So the ECC was only corrected for the first 512 bytes chunk of a 2k page.
Moved out the ecc step iteration out of the correcting loop to make
it more alike the generic nand functions. And made sure that
the ECC is caclulated for all chunks.
This patch is based on work of Sascha Hauer.
Fixes commit dec7b4d2bf9c ("mtd: nand_omap_gpmc: fix BCH error correction").
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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get_drv_data(..., &data->type) overwrites memory beyond data->type member due
to mismatch of sizeof(enum pca_type) and sizeof(void *) on 64 bit systems.
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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write_buff() uses ~(flash_info.portwidth - 1) to mask lower bits of addr. This
causes higher 32 bits of addr to be discarded on a 64 bit system, since
flash_info.portwidth is 32 bits long (unsigned int) and addr is 64 bits long
(unsigned long).
Signed-off-by: Peter Mamonov <pmamonov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[andrew.smirnov@gmail.com: Rebased to account for move to nvmem]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Not that barebox has a proper NVMEM subsystem, convert OCOTP driver to
use that to both make things more consistent with Linux and also allow
accessing OCOTP fields without the need for
imx_ocotp_read_field()/imx_ocotp_write_field().
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Original name, 'nvmemN', doesn't really give any hint about which
physical HW it may represent, so change the code to either pick up an
DT alias or use the name passed via 'struct nvmem_config'.
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move OCOTP driver to drivers/nvmem to be consistent with Linux
kerenel.
Cc: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Tested-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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There are no users of that function outside of the driver itself, so
re-declare it as static.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move inline assembly related to querying and counter value as well as
getting and setting counter frequency register into asm/system.h as
well as converting it inot helper functions. This is done to make the
code availible to other parts of the system.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This is based on Lucas' patch sent as "[PATCH v2 4/4] clk: imx: add
clock driver for i.MX8MQ CCM" to the mailing list.
It will likely need some rework before it is finally merged, so apply
the reworks here before merging into barebox.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[andrew.smirnov@gmail.com: Fix pll type for IMX8MQ_VIDEO2_PLL1]
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Rather than doing DMA on the input buffer address get a proper DMA
address from the mapping functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The fec receive buffers are coherently mapped, no need to dma_sync on
them.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Rather than relying on the fact that addresses can be just casted
into DMA addresses use proper DMA mapping functions.
This fixes compiler warnings when we do DMA on this 32bit only device
on aarch64 SoCs.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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