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* Merge branch 'for-next/imx' into masterSascha Hauer2020-09-2511-418/+532
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| * serial: imx: set CTS if DT property "linux, rs485-enabled-at-boot-time" is ↵Oleksij Rempel2020-09-231-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | present If we have a "linux,rs485-enabled-at-boot-time" DT property, we should set CTS flag as soon as possible to the active state. This will set an RS485 transmitter to receive-enable mode. Otherwise the RS485 bus will be blocked for entire system boot time and other bus participants will not be able to communicate. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ddr: imx: Cleanup debug messagesSascha Hauer2020-08-215-11/+21
| | | | | | | | | | | | | | Use pr_debug and pr_fmt to get a unified prefix for all messages. Also, remove #define DEBUG at the beginning. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx8mp: update clk driver from Linux kernelSascha Hauer2020-08-201-392/+397
| | | | | | | | | | | | | | | | | | | | This updates the clock driver to the Linux driver as of v5.9-rc1. The patch is bigger than it needs to be, but this time care has been taken to minimize the diff against the Linux driver to make future updates easier. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: Add Linux function namesSascha Hauer2020-08-201-0/+22
| | | | | | | | | | | | | | | | | | Add some function names used in Linux as define to the corresponding functions in barebox. This is done to be able to use the Linux function names in barebox in order to reduce the diff size between the barebox and Linux clock drivers. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: Add imx_clk_gate4_flagsSascha Hauer2020-08-201-0/+6
| | | | | | | | | | | | Needed for further clock driver updates, taken from Linux Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx. clk-composite-8m: Update from Linux KernelSascha Hauer2020-08-202-4/+68
| | | | | | | | | | | | | | | | | | | | | | Update clk-composite-8m to Linux as of v5.9-rc2. This is a combination of Linux commits: 0e40198dc28b6 ("clk: imx: add imx8m_clk_hw_composite_bus") f90b68d6c8b00 ("clk: imx: add mux ops for i.MX8M composite clk") 62668b68dc8e7 ("clk: imx: composite-8m: add imx8m_clk_hw_composite_core") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx-cpu: Add missing CLK_IS_CRITICALSascha Hauer2020-08-201-1/+1
| | | | | | | | | | | | | | The CPU clock should never be disabled, mark it as critical as done in the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: clk-pll14xx: remove debug leftoverSascha Hauer2020-08-201-2/+1
| | | | | | | | | | | | The printfs were never meant to go upstream. Remove them. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: imx: make string arrays const char * const *Sascha Hauer2020-08-202-8/+8
| | | | | | | | | | | | | | arrays of pointers to strings should be of type const char * const *, so that not only the arrays of pointers are const, but also the strings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | mtd: spi-nor: cadence: fix csqpi corruption in cqspi_set_protocolIan Abbott2020-09-181-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | cqspi_set_protocol() sets `inst_width`, `addr_width` and `data_width` for the previous chip-select in `cqspi->current_cs`, but that is initially set to -1, leading to corruption of other `cqspi->` members. Change it to set `inst_width`, `addr_width` and `data_width` for the chip-select associated with the `nor` parameter. Fixes: 5085d2ef3fbf ("mtd: spi-nor: cadence: add cqspi_set_protocol") Signed-off-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk: imx: clk-frac-pll: Use do_div for 64bit divisionSascha Hauer2020-09-181-1/+1
| | | | | | | | | | | | Use do_div() to avoid undefined references to `__aeabi_uldivmod' Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk: at91: sama5d2: fix buffer overflow of clk parent_namesAhmad Fatoum2020-09-147-19/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The upstream implementation passes the clock's parent_names as an address of a local array to the core. That's ok because data contained in struct clk_init_data is duplicated and stored with a proper lifetime. We don't have that in barebox, so the clock providers themselves are responsible for allocating an array with suitable lifetime. Most at91 clk drivers did this by having a fixed size array in the clock's private data struct. Since 47475fa5e0e1 ("clk: at91: add sama5d2 audio PLL support"), we are overflowing struct clk_programmable::parent_names on the sama5d2, because there it has 6 parents, while only space for 5 were allocated. Make the parent_names member of variable size to fix this and to avoid such errors in future. Fixes: 47475fa5e0e1 ("clk: at91: add sama5d2 audio PLL support") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | pinctrl-single: Support 2 pinctrl-cells in ,pins modeTrent Piepho2020-09-141-2/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 5.9rc-1 dts update pulled in a change that broke all TI AM33xx platforms. This fixes that. Previously, when using pinctrl-single,pins, the value of "#pinctrl-cells" was always 1, which indicates one data cell per pin, which contains the value to to program into the pinctrl register. In kernel v5.9-rc1, commit a13395418888 ("pinctrl: single: parse #pinctrl-cells = 2"), added support for 2 data cells per pin. The two cells get ORed together to produce one register value. Then commit 27c90e5e48d0 ("ARM: dts: am33xx-l4: change #pinctrl-cells from 1 to 2"), changed the dts files to use two cells for am33xx and changed the AM33XX_PADCONF() macro to produce two data cells instead of ORing the two values together. The pinctrl driver will now do the OR to produce the same value that was in one cell before. I don't see what this accomplishes, but there it is. The dts update pulled in the latter change, but not the former, leaving Barebox's pinctrl-single driver unable to correctly use the am33xx pinctrl data. This commit adds support for the 2 cell format. It would be easier to just change the dts files back, since this change doesn't appear actually accomplish anything, but then the dts source would be out of sync with the kernel. Signed-off-by: Trent Piepho <tpiepho@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | clk: imx8mm: fix CPU clockLucas Stach2020-08-211-4/+9
| | | | | | | | | | | | | | | | | | This is a port of the Linux kernel commit d3b70cd87e77 (clk: imx: imx8mm: fix a53 cpu cloc). This allows the reparenting as specified in the new DTs to succeed. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | watchdog: fix watchdog_set_timeout breakage for drivers like imxwdAhmad Fatoum2020-08-201-1/+1
|/ | | | | | | | | | | | | | | | | | | | Commit 0b944fce55f4 ("watchdog: permit `wd 0` for non-stoppable, but inactive, watchdogs") silently broke use of watchdogs, that report being inactive at driver probe time, altogether. Because those always had watchdog_hw_running evaluating to false, it early exited without a chance to ever actually set the timeout (and for watchdog_hw_running to evaluate to != false). This results in following watchdog drivers being broken in v2020.08.0: - imxwd - f71808e_wdt - at91sam9_wdt Fixes: 0b944fce55f4 ("watchdog: permit `wd 0` for non-stoppable, but inactive, watchdogs") Reported-by: Bastian Krause <bst@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: imx-imx8mp: Mark arm_a53_core clk as criticalSascha Hauer2020-08-191-1/+1
| | | | | | | | | | | Changes in imx8mp.dtsi for v5.8-rc1 added some clock reparenting to the device tree. IMX8MP_CLK_A53_CORE is reparented to IMX8MP_ARM_PLL_OUT. The latter is not enabled in hardware, so the CPU clock is disabled locking up the system. Mark IMX8MP_CLK_A53_CORE as critical so that the new parent gets enabled before reparenting. Fixes: abef60363d ("dts: update to v5.8-rc1") Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/usb-dwc2' into masterSascha Hauer2020-08-1916-1914/+6308
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| * usb: dwc2: Use register_otg_deviceJules Maselbas2020-08-142-5/+28
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Add gadget driverJules Maselbas2020-08-148-0/+2825
| | | | | | | | | | | | | | This driver is comes from Linux (~ 5.1-rc6) and only support buffer DMA. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Add structure for gadget driverJules Maselbas2020-08-141-0/+55
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Add function to flush tx fifoJules Maselbas2020-08-142-0/+34
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: host: Rewrite dwc2_hc_initJules Maselbas2020-08-141-20/+27
| | | | | | | | | | | | | | | | Removed the uses of a table to convert the usb endpoint type for the controller. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: host: Fix toggle resetJules Maselbas2020-08-141-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | From USB 2.0 specification, section 9.4.5: ClearFeature(ENDPOINT_HALT) request always results in the data toggle being reinitialized to DATA0. The hacky solution for now is to reset the toggle bit to DATA0 when the host controller send a ClearFeature request on an endpoint. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: host: Dynamic fifo size support from LinuxJules Maselbas2020-08-142-30/+124
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: host: Handle dma mapping errorsJules Maselbas2020-08-141-0/+5
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Rework timeoutJules Maselbas2020-08-142-19/+19
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Rework roothub interfaceJules Maselbas2020-08-143-280/+245
| | | | | | | | | | | | | | Roothub requests are now decoded in one place. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: host: Read dr_mode from device treeJules Maselbas2020-08-143-0/+98
| | | | | | | | | | Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * usb: dwc2: Add host controller driverJules Maselbas2020-08-1411-0/+3183
| | | | | | | | | | | | | | | | | | The host driver is taken from U-Boot (v2018.09-rc3) and mixed with some part from Linux, mainly the replacement of memory map structure in favor of the read/write functions. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * Revert "usb: Add dwc2 host driver"Jules Maselbas2020-08-144-1914/+0
| | | | | | | | | | | | | | This reverts commit 69f8b20cc016dc3680d5acc20f43a3e52c0bff7e. Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc' into masterSascha Hauer2020-08-187-24/+16
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| * | video: ssd1307fb: Honour reset GPIO polaritySascha Hauer2020-08-181-7/+11
| | | | | | | | | | | | | | | | | | | | | The reset GPIO polarity was hardcoded as active low. Honour the polarity flags given in the device tree instead. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | USB: gadget: Add serialnumber device parameterJules Maselbas2020-08-032-0/+5
| | | | | | | | | | | | | | | | | | | | | This add the device parameter usbgadget.serialnumber Signed-off-by: Jules Maselbas <jmaselbas@kalray.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | treewide: remove stale instances of struct deviceAhmad Fatoum2020-08-034-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | We call it struct device_d, any instances of struct device are likely left-over code after porting from Linux. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/imx' into masterSascha Hauer2020-08-184-8/+218
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| * | | nvmem: ocotp: add support for i.MX8MMLucas Stach2020-08-172-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For whatever reason the i.MX8MM OCOTP got a separate compatible and is not marked as compatible to imx8mq, while the parameters used in the driver seem to be the same. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: enable OCOTP for i.MX7Rouven Czerwinski2020-08-101-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we now have proper timing, read and write support, enable the OCOTP driver for i.MX7 Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: ocotp: read/write i.MX7 supportRouven Czerwinski2020-08-101-6/+141
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement read and write support for the banked access on i.MX7. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: ocotp: add new timing function for i.MX7Rouven Czerwinski2020-08-101-0/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Ported from the linux kernel. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | nvmem: ocotp: retrieve set_timing from structureRouven Czerwinski2020-08-101-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.MX7S/D use a different timing setup, prepare for a new different timing function. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | clk: imx7: add IMX7D_OCOTP_CLKRouven Czerwinski2020-08-101-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Otherwise barebox is not able to resolve the clock from the device tree node. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | mci: imx-esdhc-pbl: Add support for IMX7Anees Rehman2020-08-101-0/+37
| | |/ | |/| | | | | | | | | | Signed-off-by: Anees Rehman <anees.r3hman@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | Merge branch 'for-next/at91' into masterSascha Hauer2020-08-185-58/+234
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| * | | mfd: add Atmel Flexcom supportAhmad Fatoum2020-08-033-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a wrapper which embeds a SPI controller, a I2C controller and a USART. Only one function can be used at a time. The choice is done at boot time by the probe function of this MFD driver according to a device tree property. These IP cores are available in the sama5d2 and sam9x60. We already have support for all three configurations, only thing we need is the MFD selecting one of them. Add this. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i2c: at91: extend for sama5d2 supportAhmad Fatoum2020-08-031-19/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Port over the Linux v5.8-rc4 bits to support i2c on the sama5d2. This has been tested by reading the i2c EEPROM on the sama5d27-som1-ek. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | i2c: sync i2c_parse_fw_timings() with upstreamAhmad Fatoum2020-08-031-39/+34
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Upstream now has support for i2c-digital-filter-width-ns and i2c-analog-filter-cutoff-frequency device tree properties, that are used in an upcoming patch. Prepare for it by syncing with Linux v5.8-rc4. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / / Revert "usb: host: ehci: Use to USBSTS to wait for transfer completion"Christian Eggers2020-08-142-8/+14
|/ / | | | | | | | | | | | | | | | | | | | | Since 6044d6c08e, some USB mass storage devices (in my case some USB memory sticks and one SD card reader) are not detected anymore. Waiting once for USBSTS::USBINT is not sufficient as it takes multiple USBINT events until QT_TOKEN_STATUS_ACTIVE is cleared. Fixes: 6044d6c08e ("usb: host: ehci: Use to USBSTS to wait for transfer completion") Signed-off-by: Christian Eggers <ceggers@arri.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | gpio: get function returns masked register valueRenaud Barbier2020-08-031-1/+1
| | | | | | | | | | | | | | | | | | | | Unlike Linux the generic driver get function returns the masked register content and not the 0 or 1 value. The consequence is that gpio_get_value returns for instance 0x10 for bit 4 instead of 1. Use the Linux normalized form instead. Signed-off-by: Renaud Barbier <renaud.barbier@abaco.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | i2c: stm32: support new st,stm32mp15-i2c compatibleAhmad Fatoum2020-08-031-0/+1
|/ | | | | | | | | | | | | | Linux v5.8-rc1 has gained support for the FastMode+ registers on the stm32mp15, but those are incompatible between the stm32mp15 and the stm32f7, so a new compatible was introduced. The old compatible was replaced for the MP15 SoC, breaking I2C in barebox. Add the new compatible to fix this. Unlike Linux, we just use the same setup parameters as for the stm32f7. This is ok as long we don't want to support FastMode+. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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