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* net: designware: eqos: don't funnel all MDIO writes to register 0Ahmad Fatoum2020-01-201-3/+3
| | | | | | | | | | | | | | | | eqos_mdio_write ended up using the addr parameter instead of the computed miiaddr variable, which would've factored in the reg parameter. This had the effect that all writes went to PHY register 0, which was fine as long as there were only register 0 writes. As soon there are more writes, e.g. because a PHY driver was enabled, register 0 became clobbered and erratic behavior ensued. Fix the typo and while at it rename the val parameter to a more descriptive name. Fixes: a4f709bbb ("net: add Designware Ethernet QoS for STM32MP") Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Revert "clocksource: ARMv8 timer can only be built on ARMv8"Ahmad Fatoum2020-01-162-2/+5
| | | | | | | | | | | | | | | | This reverts commit 33ec8cb5872617fa95aea08d9f7f2b684d95b6de, so that barebox can once again match against "arm,armv7-timer" compatibles. The reverted commit restricted the timer to CPU_V8, because in i.MX multi-image configuration with MACH_SCB9328 set, we can have both CPU_32v7 and CPU_32v4T in the same build. To avoid this issue properly, force use of -march=armv7-a for non-CONFIG_CPU_V8 targets. This is acceptable as we don't expect non-ARMv7 device trees to have the architected arm,armv7-timer. Suggested-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zynq'Sascha Hauer2020-01-156-95/+691
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| * serial: cadence: move register definitions into header fileLucas Stach2020-01-141-36/+5
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * spi: add Zynq QSPI controller driverLucas Stach2019-12-203-0/+621
| | | | | | | | | | | | | | | | This adds the driver for the QSPI controller found on the Xilinx Zynq SoCs. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: add QSPI reference clockLucas Stach2019-12-201-0/+3
| | | | | | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * firmware: zynqmp-fpga: drop example bin format headerMichael Tretter2019-12-111-59/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid the example bitstream header to validate the bitstream that should be loaded into the FPGA. The header is mostly 0xFFFFFFFF with a few special values at a certain offsets and can be better described with the offsets and their magic values. As a drive by, this fixes/removes a broken check in the header validation. The != operator has a higher precedence than ?: and this check should have had parenthesis around the ?: expression: bin_header[i] != (byte_order == XILINX_BYTE_ORDER_BIT) ? bin_format[i] : __swab32(bin_format[i]) Signed-off-by: Michael Tretter <m.tretter@pengutronix.de> Reviewed-by: Thomas Haemmerle <thomas.haemmerle@wolfvision.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/rpi'Sascha Hauer2020-01-1512-27/+2388
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| * | gpio: Add raspberrypi exp gpio driverSascha Hauer2020-01-083-0/+280
| | | | | | | | | | | | | | | | | | Taken from the kernel adopted to barebox. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: Add dwc2 host driverSascha Hauer2019-12-204-0/+1914
| | | | | | | | | | | | | | | | | | | | | This adds a driver for the dwc2 controller in host mode. The driver is taken from U-Boot-2019.10 and tested on a Raspberry Pi 3. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: Forward error code from usb_set_configurationSascha Hauer2019-12-201-4/+6
| | | | | | | | | | | | | | | | | | | | | Instead of returning -1 forward the error code and take the opportunity to print the error string. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | regulator: add function to get regulator by its nameSascha Hauer2019-12-201-1/+29
| | | | | | | | | | | | | | | | | | | | | Useful for getting regulators that are not correctly associated with a device. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: Read dma_offset from device treeSascha Hauer2019-12-202-0/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | This reads the dma-ranges property from the device tree and sets dma_offset in the devices accordingly. The code is mostly taken from the Kernel as of v5.5-rc1. of_dma_configure() is trimmed down to the cases we want to support currently. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: Add of_bus_n_xxx_cells()Sascha Hauer2019-12-201-18/+28
| | | | | | | | | | | | | | | | | | Added straight from the Kernel. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | usb: Make timeout unit clearSascha Hauer2019-12-201-4/+4
| |/ | | | | | | | | | | | | The usb_*_msg() functions take a timeout parameter. Make clear which unit is expected by adding a _ms suffix to the variable name. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/misc'Sascha Hauer2020-01-154-14/+15
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| * | led: pca955x: remove ineffectual assignmentAhmad Fatoum2019-12-131-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | the .num member of struct led is a 'private' member populated by led_register. Populating it has no effect because it's always overwritten. Remove the assignment. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mci: imx-esdhc: fix termination of statementHubert Feurstein2019-12-111-1/+1
| | | | | | | | | | | | | | | | | | | | | Use semicolon instead of comma to terminate statement. Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | of: demote most debug output to loglevel 8 (vdebug)Roland Hieber2019-12-111-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Loglevel 7 (debug) is often useful to get barebox running on new hardware; however, the heavy output of "OF:" messages makes most boards take several minutes to boot to a prompt, printing things which are probably interesting when debugging OF code itself, but not very helpful otherwise. Degrade most of the message to loglevel 8 (vdebug). Signed-off-by: Roland Hieber <rhi@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | mtd: spi-nor: Add support for en25qh64Ulrich Ölmann2019-12-111-0/+2
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a port of Linux kernel commit | commit 30a2c8aa3c520d54bcaf3015ca8141b0156448b1 | Author: Roger Pueyo Centelles <roger.pueyo@guifi.net> | Date: Thu Feb 7 20:09:35 2019 +0100 | | mtd: spi-nor: Add support for en25qh64 | | The Eon EN25QH64 is a 64 Mbit SPI NOR flash memory chip found | on recent wireless routers. Its 32, 128 and 256 Mbit siblings | are already supported. | | Tested on a COMFAST CF-E120A v3 router board. | | Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net> | Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com> | Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/led'Sascha Hauer2020-01-152-48/+41
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| * | led: parse panic-indicator from device-treeHubert Feurstein2019-12-111-3/+8
| | | | | | | | | | | | | | | Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | led: check for 'barebox, default-trigger' when 'linux, default-trigger' is ↵Hubert Feurstein2019-12-111-5/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | not found When the linux,default-trigger is not found by barebox, then also check if there might be a barebox,default-trigger. Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | led: unify led trigger tablesHubert Feurstein2019-12-112-43/+28
| |/ | | | | | | | | | | | | | | | | | | Currently we have two slightly different led-trigger tables. One in the core module, and the other one in the led-triggers module. The one in the core module, which is used to parse the device-tree triggers, is lacking net-rx and net-tx. Signed-off-by: Hubert Feurstein <h.feurstein@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/layerscape'Sascha Hauer2020-01-152-16/+45
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| * | PCI: layerscape: Fixup iommu-map propertiesSascha Hauer2020-01-141-1/+38
| | | | | | | | | | | | | | | | | | The iommu-map properties are needed for proper PCI support under Linux. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | PCI: layerscape: rename variableSascha Hauer2020-01-141-8/+8
| | | | | | | | | | | | | | | | | | | | | Rename 'arr' to 'msi_map' which is a better name when we add another array in the next patch. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | net: fsl-fman: Do not put hardware in reset before Linux startSascha Hauer2020-01-131-8/+0
| |/ | | | | | | | | | | | | | | Linux depends on the icid values configured in the DPAA. Do not put the hardware into reset in order to preserve the register values. Without this, the IOMMU doesn't work properly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/imx'Sascha Hauer2020-01-151-51/+13
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| * | esdhc-pbl: remove now unused imx8_esdhc_load_piggyLucas Stach2020-01-091-42/+0
| | | | | | | | | | | | | | | Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | esdhc-pbl: allow to skip starting i.MX8 imageLucas Stach2020-01-091-9/+13
| |/ | | | | | | | | | | | | | | | | Add an option that allows to just load the image into memory, but return to the calling function instead of directly jumping to the loaded image. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* / usb: ehci: Do not use memset on dma coherent memorySascha Hauer2020-01-141-3/+12
|/ | | | | | | | | | | memset is an optimized operation that at least on ARM64 may only be called on cached memory, see 32e8842c40 ("ARM: lib64: Make string functions aware of MMU configuration"). To avoid crashes in the ehci driver we no longer call memset on memory allocated with dma_alloc_coherent(), but use a simple memzero32 function instead. Reported-by: Elmar Albert <EAlbert@data-modul.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zynq'Sascha Hauer2019-12-104-2/+530
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| * clk: zynq: remove clkdevsLucas Stach2019-11-111-9/+0
| | | | | | | | | | | | | | | | They aren't needed anymore, as all the Zynq devices now use a DT based clock lookup. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: partially sync with LinuxLucas Stach2019-11-111-16/+71
| | | | | | | | | | | | | | | | | | | | Sync the clock enum with the clocks used by Linux and the DT binding. Implement AMBA bus clocks and SPI and SDIO peripheral clocks and register a DT clock controller, so the clocks can be looked up by DT handle. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: fix up address from DTLucas Stach2019-11-111-1/+23
| | | | | | | | | | | | | | | | | | | | The upstream Zynq 7000 DT describes the SLCR child devices physical address as an offset within the SLCR. The driver thus needs to add the SLCR base offset to the address before trying to map the MMIO region. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: improve PLL enable handlingLucas Stach2019-11-111-1/+12
| | | | | | | | | | | | | | | | | | | | | | Ensure that both the powerdown and reset bits are cleared when the PLL gets enabled, as any of those set would prevent the PLL from working. Also add a status readback function, so the real status of the PLL is reflected in the Barebox clock state. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * clk: zynq: use base address of clock controllerLucas Stach2019-11-111-15/+15
| | | | | | | | | | | | | | | | | | The clock controller is a subregion of the SLCR, use the real base of this region for mapping the registers. This will allow to switch to DT based probing later. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: zynq: move clock controller driver to drivers/clkLucas Stach2019-11-113-0/+428
| | | | | | | | | | | | | | No functional change, just adjusting the Zynq code to common practise. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: macb: add Zynq compatibleLucas Stach2019-11-111-0/+1
| | | | | | | | | | | | | | Add compatible for the GEM on the Zynq 7000 device. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * net: macb: handle more clocksLucas Stach2019-11-111-2/+22
| | | | | | | | | | | | | | | | | | Both pclk and hclk are required clocks in the DT binding. rx_clk and tx_clk are optional, but must be enabled if a system has separate gates for them. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/watchdog'Sascha Hauer2019-12-106-20/+52
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| * | watchdog: core: use new dev_add_param_tristate helper for .running paramAhmad Fatoum2019-12-051-8/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Previous commit added a dev_add_param_tristate_ro that can be readily used instead of the enum parameter here. Use it. This also fixes the issue that running_names had external linkage. Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: stm32_iwdg: explicitly set .running to UNSUPPORTEDAhmad Fatoum2019-11-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | I've spent some time trying to get the ONF (Watchdog enable status) bit in the IWDG_SR register to read as something other than zero. It has since been confirmed to be non-functional[1]. To avoid someone else spending time on this, document that running status is unsupported on this hardware explicitly. No functional change as UNSUPPORTED is already the default. [1]: https://www.spinics.net/lists/arm-kernel/msg770527.html Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: f71808e: support .running device parameterAhmad Fatoum2019-11-111-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | The American Megatrends BIOS I am using can be configured to start the Fintek watchdog prior to the UEFI payloads. To avoid BIOS updates that reset this functionality going unnoticed, implement support for WDOG_HW_RUNNING. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: imxwd: support .running device parameter on i.MX2+Ahmad Fatoum2019-11-111-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | The i.MX can be fused to start the watchdog on power-on reset. To give users an easy way to determine whether the watchdog is running, implement support for WDOG_HW_RUNNING. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: implement generic support for .running device parameterAhmad Fatoum2019-11-111-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Linux watchdog have an optional WDOG_HW_RUNNING bit that is used in conjunction with CONFIG_WATCHDOG_HANDLE_BOOT_ENABLED to automatically ping running watchdogs until userspace takes over. So far, when we ported Linux drivers, we dropped this detection, but it would be useful to have this information in barebox as well: The American Megatrends BIOS I am using allows configuring the hardware watchdog from the BIOS. barebox enables the WDT as well, so in normal operation we would never notice if after a BIOS update, the watchdog is no longer enabled. If we maintain a running parameter on watchdog devices, board code can be written to check whether the watchdog device is indeed running. To achieve this, add the necessary bits to the watchdog API. How we go about it differs from Linux a little: - We use an enum instead of a single bit, so we can differentiate between watchdogs that are not running and watchdogs whose running status is unknown. - Because we can check whether watchdog_hw_running is supported, it now can fail and return a negative value in that case - We do the maintenance of the running parameter after barebox feeds/disables the watchdog in the core, so it doesn't need to be replicated across drivers. Drivers hould only initialize the running parameter once at probe time. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | watchdog: always populate watchdog priority from device tree if possibleAhmad Fatoum2019-11-113-18/+18
| |/ | | | | | | | | | | | | | | | | | | | | So far, only the da9063 and da9053 have made use of the optional barebox watchdog-priority binding. Move it into the core, so other device drivers automatically have their watchdog-priority property parsed as well. This patch doesn't introduce any functional changes for upstream boards. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Merge branch 'for-next/usb'Sascha Hauer2019-12-1010-121/+110
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| * | usb: musb: use usb_register_otg_device()Sascha Hauer2019-11-212-37/+8
| | | | | | | | | | | | | | | | | | | | | We now have usb_register_otg_device() to register an "otg" device. Use it and drop the custom code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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