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* ARM: i.MX: add MNT Reform board supportLucas Stach2021-01-061-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | The MNT Reform is a DIY Laptop, built around a Boundarydevices i.MX8MQ SoM. This adds a pretty minimal support, as there is no upstream DT yet. It also does not properly abstract the SoM (power supply init in MNT Reform lowlevel code and only single DRAM configuration supported), as there are a lot of variants of the SoM and I'm only able to test the single one that will be shipped with the Reform. What has been tested to work: - SD card - eMMC - Gigabit network - NVMe storage There is a quirk in the board support: the Nitrogen SoM only allows to configure one of the BOOT_MODE straps, which means the choices for the boot selection are only "boot from fuses", which means eMMC boot and "serial boot". As serial boot isn't really useful on the device (requires USB A<->A cable with VBUS protection), we rely on the BootROM fallback to boot from SD card in this mode. The board support code thus treats the bootsource "serial" as SD card boot. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: Add Support for Webasto ccbv2Rouven Czerwinski2020-10-141-0/+2
| | | | | | | | | Add support for the Webasto Common Communication Board Version 2. The device tree included with barebox can eventually be replaced with the required barebox changes when the ccbv2 device tree is upstream. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: dts: imx6ul: phycore: Add phyCORE i.MX6 UL with eMMCYunus Bas2020-10-021-0/+2
| | | | | | | | | | | | | Add a phyCORE-i.MX 6UL with eMMC. It has following features: - i.MX 6UL - 512 MB RAM - eMMC - 10/100 MBits Ethernet - USB OTG - USB Host Signed-off-by: Yunus Bas <y.bas@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arch: arm: boards phytec: Split flash header for pcl063 with i.MX6Ul and ↵Maik Otto2020-09-231-4/+4
| | | | | | | | | | | i.MX6ULL i.MX6UL and i.MX6ULL have different engines for Secure Boot on HABv4. For better differentiation rename existing pcl063 flash headers to pcl063ul and pcl063ull. Signed-off-by: Maik Otto <m.otto@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add atlascopco sxb boardAnees Rehman2020-08-101-0/+5
| | | | | Signed-off-by: Anees Rehman <anees.r3hman@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* arm: boards: add initial imx8mp-evk supportOleksij Rempel2020-07-141-0/+6
| | | | | | | | | | This adds support for the NXP i.MX8MP-EVK board. The SDRAM timings are taken from U-Boot-2020.07-rc4, other information how to initialize the board are form U-Boot as well. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: add imx6 based Protonic boadsOleksij Rempel2020-06-181-0/+30
| | | | | | | Add initial support for 15 i.MX6 based Protonic boards. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: phytec-som-imx6: Add imx6dl with 512mb RAMChristoph Fritz2020-03-161-0/+2
| | | | | | | | | This patch adds support for a phyCORE-i.MX 6Solo/DualLight variant with 512mb RAM. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Signed-off-by: Stefan Riedmüller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* images: i.MX: fix marsboard image file nameAhmad Fatoum2020-02-251-1/+1
| | | | | | | | | | | | | With 778bd9320b ("Makefile.imx: change image creation to build_imx_habv4img for i.MX6") the barebox image file name for the board became barebox-barebox-embest-imx6q-marsboard.img. Drop the extra barebox-. Fixes: 778bd9320b ("Makefile.imx: change image creation to build_imx_habv4img for i.MX6") Signed-off-by: Ahmad Fatoum <ahmad@a3f.at> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add i.MX8MM EVK board supportSascha Hauer2020-02-191-0/+6
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx'Sascha Hauer2020-01-151-25/+17
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| * ARM: dts: imx6: pcaaxl3: Make use of the simpler name phycardStefan Riedmueller2019-12-121-3/+3
| | | | | | | | | | | | | | | | Use the simpler name phycard instead of the article number pcaaxl3 for device tree file names and image names of the phyCARD-i.MX 6. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: rebuild .imximg if DCD table in .imxcfg changesAhmad Fatoum2019-12-111-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | So far changing the DCD table didn't trigger a rerun of the i.MX image utility. To fix this, we need to have the DCD table as prerequisite to the .imximg rule. The file name is contained in $(CFG_$(@F)), but can't be used directly because $@ (and by extension @F) has no value when first expanded in the read-in phase. If we expand a second time during the target-update phase however, we would get the correct value. GNU make provides .SECONDEXPANSION to expand all following prerequisites a second time. Use it to have changes to the DCD table rebuild the image. Because we are now using imx_image_rule to generate the target, we must escape each $ one more time to arrive at $$$$(CFG_$$$$(@F)). In the final step, we replace $$$$(@F) with %.imximg, so we support the rules not ending in .imximg as well. Dependency file generation is still broken however and changed to headers included in DCD tables won't be caught, but this functionality can be fixed in a separate patch. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * ARM: i.MX: introduce imx_image_rule variable for code deduplicationAhmad Fatoum2019-12-111-21/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The next patch will add the .imxcfg file as a rule prerequisite, so the target is rebuilt if it changes. Instead of duplicating it in all rules, factor out the common parts into a imx_image_rule variable. As the arguments are now going through an eval, any use of $ must be escaped with another $ to become $$. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: Fix PBL size testSascha Hauer2019-12-201-2/+2
|/ | | | | | | | MAX_PBL_MEMORY_SIZE needs the start symbol name without any suffix. Fix this to make the PBL size tests effective. Reported-by: Ulrich Ölmann <u.oelmann@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* images: i.MX: rearrange image rules in preparation for boilerplate removalAhmad Fatoum2019-12-091-5/+8
| | | | | | | | | | | | | | | | | | | The following commit will introduce a variable define to remove the duplication in the different [supe]*imximg rules. Prepare for this by rearranging the command line flags to line up with the letters in the extension (i.e. -e -s for esimximg instead of -s -e) and by splitting off a multi-target rule into two. The former improves readability when the define is introduced, as it is then easy to see the correspondence between extension and arguments. The latter is needed because we will call the variable for each target. No functional change. Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Makefile.imx: change image creation to build_imx_habv4img for i.MX6Maik Otto2019-11-121-398/+158
| | | | | | | | | change the image creation for NXP i.MX6 to the building function build_imx_habv4img for creation of unsingned, singnded and encrypted images Signed-off-by: Maik Otto <m.otto@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Makefile.imx: add build_imx_habv4img for creation of signed/encrypted imagesMaik Otto2019-11-121-0/+18
| | | | | | | | add the function build_imx_habv4img, which based on the prototype of Roland Hieber, for creation of unsigned,signed and encrypted images Signed-off-by: Maik Otto <m.otto@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx6: add Embest MarSBoard supportAhmad Fatoum2019-09-171-0/+5
| | | | | | | | | | | | This board is produced by Embest/Element 14 and is based on i.MX6 Dual. For more informations on this board : http://www.embest-tech.com/shop/star/marsboard.html Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Tested-by: Stefan Lengfeld <contact@stefanchrist.eu> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx8-hab'Sascha Hauer2019-08-151-2/+9
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| * boards: nxp-mx8-evk: rework to different boot flowRouven Czerwinski2019-08-071-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Rework the evk boot flow to use the new piggydata load function and install a trampoline for the TF-A setup. This allows the PBL boot process to stay in SRAM up until the verification of the piggydata is done and main barebox can be loaded. The trampoline loads 4 bytes right after the trampoline, we copy the runtime offset there so the trampoline jumps back into the SRAM PBL. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * scripts: imx: support signing for i.MX8MQRouven Czerwinski2019-08-071-0/+8
| | | | | | | | | | | | | | | | | | | | Implement signing of the PBL for i.MX8MQ. The imagesize is also modified to i.MX8MQ to only contain the PBL. This obsoletes the max_load_size, which is kept for other boards currently using it. Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: scb9328: refurbish board suportSascha Hauer2019-08-151-0/+5
|/ | | | | | | | | - switch the i.MX1 based scb9328 board to device tree - Remove scb9328_defconfig and enable scb9328 board support in imx_defconfig - Remove old environment and switch to new default environment Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/zii'Sascha Hauer2019-07-121-4/+4
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| * ARM: Rename zii-imx7d-rpu2 to zii-imx7d-devAndrey Smirnov2019-06-261-4/+4
| | | | | | | | | | | | | | | | | | To prepare for addition of another ZII i.MX7D based board, i.MX7D RMU2, rename zii-imx7d-rpu2 to zii-imx7d-dev to avoid any image naming confusion. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: dts: imx6ul: phycore: Add phyCORE-i.MX 6ULL with eMMCStefan Riedmueller2019-07-111-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | Add a phyCORE-i.MX 6ULL with eMMC. It has following features: - i.MX 6ULL Y2 792 MHz - 512 MB RAM - 4 GB eMMC - 10/100 MBits Ethernet - USB OTG - USB Host Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: imx6ul: phycore: Prepare for eMMC moduleStefan Riedmueller2019-07-111-14/+14
| | | | | | | | | | | | | | | | | | Prepare for the new phyCORE-i.MX 6UL/ULL eMMC module by extending the dts filenames by their boot medium. Also add the boot medium to the compatible to be able to perform boot medium dependent setup code. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: phytec-som-imx6: Add low cost variant for imx6dl phycoreStefan Riedmueller2019-07-111-0/+10
|/ | | | | | | | | | | | | The phyCORE-i.MX 6Solo/DualLight is available with low-cost and full-featured phyBOARD-Mira. One crucial difference is the supported max. ethernet speed. On the full-featured Mira it is 1000 MBit/s but on the low-cost Mira it is only 100 MBit/s. To cover this difference two different images are necessary for low-cost and full-featured. Thus a low-cost variant is added for the phyCORE-i.MX 6Solo with NAND and the phyCORE-i.MX 6 DualLight with eMMC. Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX6: add support for Digi CCIMX6UL SBC ProRouven Czerwinski2019-05-171-0/+5
| | | | | | | | | | | | | | | | Add support for the Digi CCIMX6UL SBC Pro. It is based on the Digi CCIMX6UL SOM with 256MB RAM and 256MB NAND flash. v2: - fix includes - rename folder to som - switch to compressed dtb - remove the unnecessary get_runtime_offset all from Ahmad Fatoum Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/layerscape'Sascha Hauer2019-04-081-0/+3
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| * pbl multiimage: Allow to check image sizesSascha Hauer2019-03-131-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PBL images are often constrained in size by limitations exposed by the SoCs SRAM size or partition sizes on the boot device. So far we tried to configure these limits in Kconfig, but with PBL multi images and thus different limitations for the different supported images this no longer works. This patch has another approach for it: During build time make variables containing the relevant sizes for each image are created. These are: PBL_CODE_SIZE_$(symbol) PBL_MEMORY_SIZE_$(symbol) PBL_IMAGE_SIZE_$(symbol) PBL_CODE_SIZE_$(symbol) contains the pure code size of the PBL, it should be smaller than the available SRAM during boot. Normally the PBL's bss segment also needs to be in the initial SRAM, for this case PBL_MEMORY_SIZE_$(symbol) is the relevant variable. PBL_IMAGE_SIZE_$(symbol) contains the full size of the PBL image including the compressed payload (but without any image headers created later by SoC specific image tools). $(symbol) is a placeholder for the start symbol used for this PBL image, thus for the i.MX53 QSB with entry start_imx53_loco PBL_CODE_SIZE_start_imx53_loco will be created. The images/Makefile.* can use these variables directly to check sizes or specify the same variables with a "MAX_" prefix. So when images/Makefile.imx specifies MAX_PBL_CODE_SIZE_start_imx53_loco = 0x10000 then the build system will make sure that the PBL code for the QSB will not get bigger than 64KiB. Also included in this patch are the size restrictions for the i.MX8MQ images as an example how to use this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: Makefile.imx: group and sort board entriesAlexander Kurz2019-03-271-53/+55
|/ | | | | | | | Add new grouping comments for vf6xx- and Cortex-A7 based i.MX6 boards. Sort moved entries alphabetically. Signed-off-by: Alexander Kurz <akurz@blala.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: phyCORE-i.MX8M SOM supportChristian Hemp2019-02-251-0/+5
| | | | | | | | | | | | | | The phyCORE-i.MX8M aka PCL-066 is a SoM containing a i.MX8M SoC. phyCORE-i.MX8M: - 1GB LPDDR4 RAM - eMMC - microSD - Ethernet Signed-off-by: Christian Hemp <christian.hemp@posteo.de> Acked-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add support for ZII i.MX8MQ based devicesAndrey Smirnov2019-02-111-0/+5
| | | | | | | | | | | | | | Add support for the following ZII i.MX8MQ based boards: - ZII i.MX8MQ RMB3 - ZII i.MX8MQ Zest Most of the basic peripherals are supported by this patch. More advanced features such as PCIe, display support, etc, are planned to be added later. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: imx: add support for Udoo Neo fullUwe Kleine-König2019-01-181-0/+5
| | | | | | | | | | | Original patch from Uwe Kleine-König, I fixed the review comments and the imxcfg file to use the udoo neo values. I also tested the support on the udoo neo full board. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Rouven Czerwinski <r.czerwinski@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: CCMX51: Switch to multiimage supportAlexander Shiyan2019-01-031-0/+5
| | | | | | | | | | | | This is a cumulative patch for the Digi ConnectCore CCMX51 SOM. It includes: - Switch board to devicetree probe. - Add MMC update handler. - Switch to multiimage support. - Cleanup and optimize board code. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* phycard-imx27: add support for 64MB RAM variantsBaeuerle, Florian2018-12-101-3/+7
| | | | | | | | | Some older pca100 boards were available with 64MB RAM. The chips require a slightly different sdram controller initialization. Support this by building bootloader images for both variants. Signed-off-by: Florian Bäuerle <florian.baeuerle@allegion.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: phytec-som-imx6: Add full featured phyCORE-i.MX 6ULLStefan Riedmueller2018-12-061-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | The phyCORE-i.MX 6ULL now comes in a full featured (Y2 variant) and a low cost (Y0 variant) version. The main difference for the barebox is the missing second USB OTG port on the Y0 variant and the RAM configuration. So to account for these differences the existing low cost version is renamed and the full featured version added. The results are following phyCORE-i.MX 6ULL modules: phyCORE-i.MX 6ULL low cost: - i.MX 6ULL Y0 - 256 MB RAM - NAND - Ethernet 10/100 MBits - USB OTG phyCORE-i.MX 6ULL full featured: - i.MX 6ULL Y2 - 512 MB RAM - NAND - Ethernet 10/100 MBits - USB OTG - USB Host Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: images: use piggydataSascha Hauer2018-12-031-314/+303
| | | | | | | | | | | | | | | | | | | | | | | | | | The way we assemble the multi images on ARM is rather complicated and error prone. We currently cat the compressed barebox image behind the PBL executable and need some magic to obtain the size of the payload and also have to do tricks to reliably get a pointer to the compressed image. This patch switches over to compile the compressed payload into the PBL image itself which has proven to work for the single PBL case and for the ARM Linux Kernel aswell. The goal is to unify the single PBL and the multi PBL cases together in the future to get an easier startup path for ARM. This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board. SoCFPGA Arria10 has also be changed slightly with this patch. We used to generate a single image (barebox-socfpga-achilles.img) which was used as xload image and full image. We now instead generate two images: barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the former loaded by the ROM and the latter loaded by the xload image. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: GuF Vincell: Use DCD table to setup SDRAMSascha Hauer2018-11-301-10/+4
| | | | | | | | | This patch removes the xload mechanism to configure SDRAM and instead installs a DCD table. The DCD table has been generated from the FSL DDR3 script aid Excel sheet (version 0.0.1). The calibration values were taken from a calibration run with the barebox internal functions. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: Add liteboard supportMarcin Niestroj2018-11-091-0/+10
| | | | | | | | | | | | | | | | | | liteboard is a development board which uses liteSOM as its base. liteSOM can't exist on its own, but is used as part of other boards - it only contains processor and memory. Hardware specification: * liteSOM: - i.MX6UL - 256M or 512M DDR3 RAM - eMMC (uSDHC2) * Ethernet PHY * USB host (usb_otg1) * MicroSD slot (uSDHC1) Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* i.MX: Add support for ZII's i.MX7D-based RPU2 boardAndrey Smirnov2018-10-081-0/+5
| | | | | Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx-hab'Sascha Hauer2018-09-111-0/+8
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| * images: imx: Add targets for signed encrypted imagesMarcin Niestroj2018-09-041-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add .esimximg and .esimximg.dek targets for signed and encrypted images and their corresponding DEKs. Also add rule to generate final .img.dek files. As an example, adding encrypted images for imx6ull_evk would look like this: FILE_barebox-nxp-imx6ull-evk-encrypted.img = start_nxp_imx6ull_evk.pblx.esimximg image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img FILE_barebox-nxp-imx6ull-evk-encrypted.img.dek = start_nxp_imx6ull_evk.pblx.esimximg.dek image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img.dek Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | Revert "i.MX: Add provisions to boot from IRAM"Andrey Smirnov2018-08-311-22/+5
|/ | | | | | | | | | | | | | | | | | | After being introduced 3 years ago this feature ended up being "obsoleted by events" and project it was supposed to be a part of winded down. Revert this feature due to: a) Lack of users b) Existence of better way to make barebox load via SRAM as intermediary step that does not require two separate images to be built (.imx-sram-img) This reverts commit 903c9477a08c5655161779ef4144886928ecc7d1. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Merge branch 'for-next/imx8mq'Sascha Hauer2018-07-091-0/+7
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| * ARM: i.MX8: Add i.MX8mq EVK supportSascha Hauer2018-06-151-0/+7
| | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | ARM: i.MX: Add support for ZII RDU1 boardAndrey Smirnov2018-07-021-0/+5
|/ | | | | | | | | ZII RDU1 is a i.MX51 based, Babbagde board derivative supported by upstream kernel. This commit add support for it to Barebox. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAMStefan Christ2018-04-161-0/+5
| | | | | | | | | | | | | Add Phytec phyCORE-i.MX6 Solo: - imx6dl-phytec-phycore-som-nand: - 1GiB RAM on 1 Bank with 32Bit - 100Mbit Ethernet - NAND - SD - UART Signed-off-by: Stefan Christ <s.christ@phytec.de> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
* ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 QuadPlus with 1GiB RAMChristian Hemp2018-04-161-0/+5
| | | | | | | | | | | | | | Add Phytec phyCORE-i.MX6 QuadPlus: - imx6qp-phytec-phycore-som-nand: - 1GiB RAM on 2 Banks with 64Bit - 1000Mbit Ethernet - NAND - SD - UART Signed-off-by: Christian Hemp <c.hemp@phytec.de> Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de> Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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