| Commit message (Collapse) | Author | Age | Files | Lines |
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This is a cumulative patch for the Digi ConnectCore CCMX51 SOM.
It includes:
- Switch board to devicetree probe.
- Add MMC update handler.
- Switch to multiimage support.
- Cleanup and optimize board code.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Some older pca100 boards were available with 64MB RAM. The chips
require a slightly different sdram controller initialization. Support
this by building bootloader images for both variants.
Signed-off-by: Florian Bäuerle <florian.baeuerle@allegion.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The phyCORE-i.MX 6ULL now comes in a full featured (Y2 variant) and a
low cost (Y0 variant) version. The main difference for the barebox is
the missing second USB OTG port on the Y0 variant and the RAM configuration.
So to account for these differences the existing low cost version is
renamed and the full featured version added.
The results are following phyCORE-i.MX 6ULL modules:
phyCORE-i.MX 6ULL low cost:
- i.MX 6ULL Y0
- 256 MB RAM
- NAND
- Ethernet 10/100 MBits
- USB OTG
phyCORE-i.MX 6ULL full featured:
- i.MX 6ULL Y2
- 512 MB RAM
- NAND
- Ethernet 10/100 MBits
- USB OTG
- USB Host
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The way we assemble the multi images on ARM is rather complicated and
error prone. We currently cat the compressed barebox image behind the
PBL executable and need some magic to obtain the size of the payload and
also have to do tricks to reliably get a pointer to the compressed
image.
This patch switches over to compile the compressed payload into the PBL
image itself which has proven to work for the single PBL case and for
the ARM Linux Kernel aswell.
The goal is to unify the single PBL and the multi PBL cases together in
the future to get an easier startup path for ARM.
This patch has been tested on the i.MX53 QSB, i.MX53 Vincell, Beaglebone
black (both MLO and 2nd stage) and a Phytec phyFLEX i.MX6 board.
SoCFPGA Arria10 has also be changed slightly with this patch. We used to
generate a single image (barebox-socfpga-achilles.img) which was
used as xload image and full image. We now instead generate two images:
barebox-socfpga-achilles-xload.img and barebox-socfpga-achilles.img, the
former loaded by the ROM and the latter loaded by the xload image.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch removes the xload mechanism to configure SDRAM and instead
installs a DCD table. The DCD table has been generated from the FSL
DDR3 script aid Excel sheet (version 0.0.1). The calibration values
were taken from a calibration run with the barebox internal functions.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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liteboard is a development board which uses liteSOM as its
base. liteSOM can't exist on its own, but is used as part
of other boards - it only contains processor and memory.
Hardware specification:
* liteSOM:
- i.MX6UL
- 256M or 512M DDR3 RAM
- eMMC (uSDHC2)
* Ethernet PHY
* USB host (usb_otg1)
* MicroSD slot (uSDHC1)
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add .esimximg and .esimximg.dek targets for signed and encrypted
images and their corresponding DEKs. Also add rule to generate final
.img.dek files.
As an example, adding encrypted images for imx6ull_evk would look like
this:
FILE_barebox-nxp-imx6ull-evk-encrypted.img = start_nxp_imx6ull_evk.pblx.esimximg
image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img
FILE_barebox-nxp-imx6ull-evk-encrypted.img.dek = start_nxp_imx6ull_evk.pblx.esimximg.dek
image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk-encrypted.img.dek
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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After being introduced 3 years ago this feature ended up being
"obsoleted by events" and project it was supposed to be a part of
winded down.
Revert this feature due to:
a) Lack of users
b) Existence of better way to make barebox load via SRAM as
intermediary step that does not require two separate images to be
built (.imx-sram-img)
This reverts commit 903c9477a08c5655161779ef4144886928ecc7d1.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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ZII RDU1 is a i.MX51 based, Babbagde board derivative supported by
upstream kernel. This commit add support for it to Barebox.
Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 Solo:
- imx6dl-phytec-phycore-som-nand:
- 1GiB RAM on 1 Bank with 32Bit
- 100Mbit Ethernet
- NAND
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add Phytec phyCORE-i.MX6 QuadPlus:
- imx6qp-phytec-phycore-som-nand:
- 1GiB RAM on 2 Banks with 64Bit
- 1000Mbit Ethernet
- NAND
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
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Add support for Advantech i.MX6 SOM named ROM-7421.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The pblx-y variables for the TX53 have _imx53 twice in their names. With
this the names do not match the names in the FILE_* variables. This
results in the make system removing the pblx files as intermediate
files. Fix the names.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Karo is deploying their latest tx53 modules with samsung instead of
nanya ram. Unfortunatly the still keep the old revision for that
modules. We add this modules as an extra xx30 samsung variant.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since nobody likes to use platformcode based machines any more, we also
switch this one to use dts based booting.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This allows for easier deployments on the different units, as there is no
need to flash different images to the Quad and QuadPlus units anymore.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX6ull-EVK is a evaluation board for the i.MX6ull from NXP.
The upstream DTS is used, support should be fairly complete:
- 2x fec ethernet
- 1x USB Host
- 1x USB OTG
- 2x SD
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add minimal code to support NXP i.MX7 SABRESD board. Tested to have
working SD card and first Ethernet port as well as being able to boot
upstream Linux kernel (4.12+).
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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This adds preliminary support for the phyCORE i.MX7 module on a
phyBOARD-Zeta baseboard. The DTs will likely change in the future
when PHYTEC finalizes their BSP.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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This adds support for the i.MX6UL Technexion Pico Hobbit. The board
comes with different amounts of RAM. We create one image for the 256MB
and one for the 512MB variant.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
v1 -> v2: - removed already prepared clock setup
v2 -> v3: - added phy-reset-post-delay as the support is now available
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Created imx6ull devicetree to support Phytec phyCORE-i.MX6ULL.
- 256 MB RAM
- 128 MB NAND
- 10/100 Mbit Ethernet
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Kindle Model No. D01100 (Kindle Wi-Fi), D01200 (Kindle Touch)
and EY21 (Kindle Paperwhite) are refered as the Kindle 4th and 5th generation.
Those models are based on an i.MX50 SoC and use LPDDR1 or LPDDR2 Memory.
The devices boot in internal boot mode from a build-in eMMC, alternatively
some devices may be set into USB-downloader mode by pressing a specific key
at startup.
Add support for the i.MX50 based Kindle device and make barebox a drop-in
replacement for the factory shipped u-boot image.
Notable features:
- Support for eMMC, USB, UART, I2C, SPI and Keys (except keyboard).
- LPDDR1 and LPDDR2 setup is done via DCD, the same imximage may be used
for USB-startup and for installation.
- Support for vendor specific ATAGs that are required for the Kindle-System.
- usbserial barebox console access by pressing Select button at startup,
alternatively full console support on connector J14.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the Hummingboard2 baseboard for the SolidRun
MicroSOM modules.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for ZII VF610 Dev based designs such as:
- VF610 Dev, revision B
- VF610 Dev, revision C
- CFU1, revision A
- SPU3, revision A
- SCU4 AIB, revision C
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the QuadPlus variant of the board as a separate
Barebox binary.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for RDU2 board from Zodiac Inflight Innovations.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the phycore i.MX6 UltraLite.
- 512MB RAM
- 512MB NAND
- 10/100 Mbit Ethernet
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for VF610 Tower board.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Auvidea H100 is a baseboard for the SolidRun MicroSOM, which
provides HDMI IN/OUT capabilities.
Currently supported is only a combination of the H100 baseboard
with a i2eX MicroSOM.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Vincell boards do the SDRAM setup from board init code, so the
image size is limited to the internal SRAM size. To overcome this
limitation use the NAND xload support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that the MAX variant of the board is also supported by the
same code, rename the board directory to the more generic nitrogen6.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the TX6S-8x35 board variant.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
Support:
- imx6dl-phytec-phycore-som-emmc:
- 1GB RAM on 1 Bank with 64Bit
- 10/100MBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add new Phytec phyCORE-i.MX6 SOM:
Support:
- imx6q-phytec-phycore-som-emmc:
- 2GiB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Different SDRAM setup, but same board otherwise.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The i.MX6q variant is basically the same as the i.MX6dl variant, just
with another SoC and the usual i.MX6q/i.MX6dl adjustments.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add .simximg target for signed images and .usimximg for signed
images suitable for USB upload
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Pass the config file to cmd_imx_image as arguments to make it more
flexible. Also add the possibility for another arg containing additional
options.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Also move the initcall to the level matching the name of the
function.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
- imx6dl-phytec-phycore-som-nand
- 256GB RAM on 1 Bank with 32Bit
- 10/100MBit Ethernet
- NAND
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
Support:
- imx6q-phytec-phycore-som-nand:
- 1GB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- NAND
- SD
- UART
- imx6q-phytec-phycore-som-emmc
- 1GB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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