| Commit message (Collapse) | Author | Age | Files | Lines |
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This switches the VExpress support to use an internal DT, instead
of probing the peripherals from a board file. It also switches to
a multi-iamge build with both CA9 and CA15 variants of the VExpress
board being supported.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add a new device tree for phyCORE SOMs with EMMC enabled and NAND
disabled.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Starting with PCM-062, NAND isn't the main non-volatile memory for the
AM335x. Because that, NAND has be disabled in the SOM dtsi file and will
be enabled in a specific NAND SOM file.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add minimal code to support NXP i.MX7 SABRESD board. Tested to have
working SD card and first Ethernet port as well as being able to boot
upstream Linux kernel (4.12+).
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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This adds preliminary support for the phyCORE i.MX7 module on a
phyBOARD-Zeta baseboard. The DTs will likely change in the future
when PHYTEC finalizes their BSP.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
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Up to now only 2nd stage booting is tested and boots up to a prompt.
i2c and spi are working, ethernet, usb and sata don't.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the i.MX6UL Technexion Pico Hobbit. The board
comes with different amounts of RAM. We create one image for the 256MB
and one for the 512MB variant.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
---
v1 -> v2: - removed already prepared clock setup
v2 -> v3: - added phy-reset-post-delay as the support is now available
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Created imx6ull devicetree to support Phytec phyCORE-i.MX6ULL.
- 256 MB RAM
- 128 MB NAND
- 10/100 Mbit Ethernet
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since "333ff7b1e4 Fix linking with new ld, based on u-boot" the build
with multiple images became unreasonable slow. This is because the
ld-option macro was evaluated once for each image. Fix this by exporting
and using LDFLAGS_barebox from the main Makefile.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The command
make ARCH=arm clean
should also clean the *.imx-sram-img files.
Signed-off-by: Stefan Lengfeld <contact@stefanchrist.eu>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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U-boot commit info:
http://git.denx.de/?p=u-boot.git;a=commit;h=e391b1e64b0bd65709a28a4764afe4f32d408243
Signed-off-by: Andrey Panov <rockford@yandex.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Arria10 is a SoC + FPGA like the Cyclone5 SoCFPGA that
is already supported in barebox.
Both a the same in some parts, but totaly different in
others. Most of the hardware blocks are the same in the
SoC parts. The OCRAM is larger on the Arria10 and the
SDRAM controller is different.
The serial core only supports 32bit accesses (different to
the 8bit accesses on the Cyclone5).
As Arria10 has 256KB of OCRAM, it is possible to fit a larger
barebox (and/or use PBL) instead of the two stage bootprocess
used on the Cyclone5 and its 64KB OCRAM.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Kindle Model No. D01100 (Kindle Wi-Fi), D01200 (Kindle Touch)
and EY21 (Kindle Paperwhite) are refered as the Kindle 4th and 5th generation.
Those models are based on an i.MX50 SoC and use LPDDR1 or LPDDR2 Memory.
The devices boot in internal boot mode from a build-in eMMC, alternatively
some devices may be set into USB-downloader mode by pressing a specific key
at startup.
Add support for the i.MX50 based Kindle device and make barebox a drop-in
replacement for the factory shipped u-boot image.
Notable features:
- Support for eMMC, USB, UART, I2C, SPI and Keys (except keyboard).
- LPDDR1 and LPDDR2 setup is done via DCD, the same imximage may be used
for USB-startup and for installation.
- Support for vendor specific ATAGs that are required for the Kindle-System.
- usbserial barebox console access by pressing Select button at startup,
alternatively full console support on connector J14.
Signed-off-by: Alexander Kurz <akurz@blala.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the Hummingboard2 baseboard for the SolidRun
MicroSOM modules.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Kconfig variable is named CONFIG_MACH_AT91SAM9X5EK, not
MACH_AT91SAM9X5EK.
Reported-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Convert AT91SAM9X5-EK board code to multi-image build process, similar
to how majority of i.MX board code is built.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This commit switches the RaspberryPi arch over to probe Barebox
from the builtin DT and enables multi-image builds.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This machine was a prototype and was never shipped to customers.
Since it has no dependencies to any image, it can be removed.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for ZII VF610 Dev based designs such as:
- VF610 Dev, revision B
- VF610 Dev, revision C
- CFU1, revision A
- SPU3, revision A
- SCU4 AIB, revision C
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by Juergen Borleis <jbe@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the QuadPlus variant of the board as a separate
Barebox binary.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for RDU2 board from Zodiac Inflight Innovations.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for the phycore i.MX6 UltraLite.
- 512MB RAM
- 512MB NAND
- 10/100 Mbit Ethernet
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Stefan Lengfeld <s.lengfeld@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for VF610 Tower board.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Auvidea H100 is a baseboard for the SolidRun MicroSOM, which
provides HDMI IN/OUT capabilities.
Currently supported is only a combination of the H100 baseboard
with a i2eX MicroSOM.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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kwboot knows how to work with an image for a different boot medium now.
So there is no reason to generate a dedicated UART image any more.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Vincell boards do the SDRAM setup from board init code, so the
image size is limited to the internal SRAM size. To overcome this
limitation use the NAND xload support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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OnRISC Baltos devices are based on a am335x SoC and can be booted
either from MMC or NAND.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The Makefile compression commands all append the size of the
uncompressed image. With CONFIG_IMAGE_COMPRESSION_NONE simply
'shipped' is used which does not append the size. Add and use
a special comp_copy function which adds the size. This helps
us to get the uncompressed image size in the startup code later.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The phyCORE-RK3288 aka PCM-059 is a SoM (System on Module)
containing a RK3288 SoC. The module can be connected to different
carrier boards.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Now that the MAX variant of the board is also supported by the
same code, rename the board directory to the more generic nitrogen6.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds support for the TX6S-8x35 board variant.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since images without the extra header now boot correctly, stop adding
it. This makes the image 512 bytes smaller.
It also gives the image a correct barebox header. The 512 byte extra
header looked like a barebox header (had a "barebox\n" signature) but
had incorrect size and text start fields.
Signed-off-by: Trent Piepho <tpiepho@kymetacorp.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add Phytec phyCORE-i.MX6 SOM.
Support:
- imx6dl-phytec-phycore-som-emmc:
- 1GB RAM on 1 Bank with 64Bit
- 10/100MBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add new Phytec phyCORE-i.MX6 SOM:
Support:
- imx6q-phytec-phycore-som-emmc:
- 2GiB RAM on 1 Bank with 64Bit
- 1GBit Ethernet
- SPI NOR
- eMMC
- SD
- UART
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add support for phyBOARD-SUBRA-i.MX6 with phyFLEX-i.MX6 Quad 1GiB on one
bank. This patch factors out the common device tree nodes for the Quad
and Solo variant into 'imx6qdl-phytec-phyboard-subra.dtsi'.
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Different SDRAM setup, but same board otherwise.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Ulrich Ölmann <u.oelmann@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add new RAM Timings for phyCORE R2 with MT41K512M16HA-125IT
1024MB mounted.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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