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* net: smc1111: add a quirk for pxa pxa27x platformsRobert Jarzmik2015-04-131-0/+1
| | | | | | | | | | | | As hinted in the linux kernel driver, pxa platforms such as mainstone, stargate and idp have a broken design, where half-word writes not aligned to a word address are not working. This patch is a taking back the half-word write accessor for this specific case from the linux kernel. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: smc1111: extend the driver for 91c94 and 91c96 supportRobert Jarzmik2015-02-041-0/+2
| | | | | | | | | | | | | | | | All the smcs family chips 91c94, 91c96, 91c100, 91c111 share almost the same behavior and register sets. The noticeable exceptions are coped with in this patch, ie : - 91c94 and 91c96 only have an internal 10 Mbps phy The registers used for phy discovery on later chips will corrupt the 91c96 state. - 91c94 and 91c96 have a control and config register quite different from their 91c1xx conterparts A platform data user defined couple of registers is introduced. If these values are 0, 91c1xx legacy behavior is assumed. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: smc1111: add 16 bits accessors, allow address shiftRobert Jarzmik2015-02-041-0/+2
| | | | | | | | | | | | | | Smc network IPs can be wired up in different funny ways. For example the lubbock pxa25x development platform wires all address lines shifted by 2, ie. bus A2 is smc91c96 A0, bus A3 is smc91c96 A1 etc ... In order to cope with the different possible combination, add a shift parameter for addresses. By default, the old behaviour using the 32 bit accesses is kept. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* smc91111: add fixup for qemu phy supportJean-Christophe PLAGNIOL-VILLARD2013-09-221-0/+14
| | | | | | | | | | | | | as today qemu does not support phy, it will return always 0x0 to any read on the mii bus. So the phy_id is 0 and the link is donw. To have the norwork running on versatilpb & other qenu board for the link up at 100Mbps. Only enable if qemu_fixup is set. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: designware: Add decvicetree supportSascha Hauer2013-09-091-0/+1
| | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net:designware: allow to pass the phy interfaceJean-Christophe PLAGNIOL-VILLARD2012-10-151-0/+3
| | | | | | | If none set use NA (0) as before. Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net/designware: fix phy_addr type to intJean-Christophe PLAGNIOL-VILLARD2012-10-041-1/+1
| | | | | | | so we can pass -1 for auto detect Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* davinci_emac: adjust to new phylib frameworkJan Luebbe2012-09-291-0/+10
| | | | | | | | Also pass flags using platform_data and remove useless casts from void*. Signed-off-by: Jan Luebbe <jlu@pengutronix.de> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* drivers/net: add designware driverJohannes Stezenbach2012-06-261-0/+9
Straight forward port of Synopsys Designware ethernet driver from u-boot v2012.04.01. Signed-off-by: Johannes Stezenbach <js@sig21.net> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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