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* ddr: fsl: move fsl_ddr_set_memctl_regs prototype to include/Sascha Hauer2019-05-081-0/+1
| | | | | | | | | fsl_ddr_set_memctl_regs() is not only used internally in the DDR controller driver, but can also be called by the boards to configure a static setting. Move the prototype to include/ where it can be used by board code. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ARM: Add basic Layerscape supportSascha Hauer2019-03-132-0/+429
| | | | | | | | | | This adds basic Layerscape support: - Makefile/Kconfig - Register maps - errata workarounds Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* ddr: fsl: Add Freescale ddr driverSascha Hauer2019-03-132-0/+742
| | | | | | | | | | | | | | | | | | | | This adds the Freescale ddr driver used on various PowerPC and Layerscape SoCs. This is based on U-Boot-2019.01 but with many adjustments: - PowerPC support has been removed - CPP #ifdeffery replaced with C - No more global variables/functions expected from the driver, configuration is passed by the board code which calls the driver We already have the driver in the tree in an older version forked from U-Boot-2013.04. This version lacks Layerscape support and many quirks in the driver are PowerPC specific. Since the existing driver should work on all known PowerPC and PowerPC is a dead end I decided not to improve the existing driver and instead add a new Layerscape specific driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* net: Add Freescale FMan ethernet supportSascha Hauer2019-03-132-0/+695
| | | | | | | | | | | | | | | | | | | This adds ethernet support for the Freecale Layerscape SoCs. The architecture in these SoCs is called "Data Path Acceleration Architecture" (DPAA). It is comprised of: - The Queue Manager (QMan) - Buffer Manager (BMan) - Frame Manager (FMan) - Multirate Ethernet Media Access Controller (mEMAC) The code is based on the corresponding U-Boot driver enriched with device tree parsing and proper device driver support. Tested on LS1046a, should work on other SoCs aswell with some minor quirks. SerDes support has been removed for now. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* Add Freescale QUICC Engine firmware supportSascha Hauer2019-03-131-0/+264
| | | | | | | The Freescale QUICC Engine found on Layerscape SoCs needs firmware loaded. This adds support for loading such a firmware. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* clk: at91: update to PMC bindingsSam Ravnborg2019-02-251-0/+34
Based on kernel 5.0-rc6 update at91 clk support to match the new PMC bindings. Manually added all changes done in the kernel from 4.9-rc3 to 5.0-rc6. New drivers required was added as seperate commits. This includes dt-compat code required to support at91sam5d3, as this is not yet ported to use the new PMC bindings. clk-programmable saw some extra changes - it had never been bulit. It is used only by at91sama5d2 - and barebox has no board support for this cpu (yet). The CONFIG_SOC symbols is used to select the relevant drivers. CONFIG_SOC_SAM9 selects several drivers, and in the future this can be split to keep the image size down. In the kernel CLK_OF_DECLARE_DRIVER() can be used for a two step init. In barebox this is a simple one step init. It was added to have less differences between the kernel and the barebox versions of the drivers. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>