From 662c30306cd8c0eeecff222653f7819f3ab45d65 Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Thu, 12 Apr 2018 08:35:56 +0300 Subject: net: make SoCFPGA-specific designware driver work again If MFD_SYSCON is disabled in .config then socfpga_designware_eth probe fails with this message: socfpga_designware_eth ff702000.ethernet: Could not get sysmgr-syscon node Thanks to Steffen for hint! Cc: Steffen Trumtrar Signed-off-by: Antony Pavlov Signed-off-by: Sascha Hauer --- arch/arm/configs/socfpga_defconfig | 1 + drivers/net/Kconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index dbc33f952f..6883b5f526 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -71,6 +71,7 @@ CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_OF_BAREBOX_ENV_IN_FS=y CONFIG_DRIVER_SERIAL_NS16550=y CONFIG_DRIVER_NET_DESIGNWARE=y +CONFIG_DRIVER_NET_DESIGNWARE_SOCFPGA=y CONFIG_MCI=y CONFIG_MCI_DW=y CONFIG_MFD_MC13XXX=y diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 09676b3d60..b633a3ac4d 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig @@ -82,6 +82,7 @@ config DRIVER_NET_DESIGNWARE_GENERIC config DRIVER_NET_DESIGNWARE_SOCFPGA bool "Designware Universal MAC ethernet driver for SoCFPGA platforms" depends on ARCH_SOCFPGA + select MFD_SYSCON help This option enables support for the Synopsys Designware Core Univesal MAC 10M/100M/1G ethernet IP on SoCFPGA. -- cgit v1.2.3 From 5a99f0f354f53b50299aa775876b1bcf80add5d6 Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Thu, 12 Apr 2018 08:35:57 +0300 Subject: ARM: socfpga: boards: pll_config.h: remove duplicate macros Signed-off-by: Antony Pavlov Signed-off-by: Sascha Hauer --- arch/arm/boards/ebv-socrates/pll_config.h | 6 ------ arch/arm/boards/terasic-sockit/pll_config.h | 6 ------ 2 files changed, 12 deletions(-) diff --git a/arch/arm/boards/ebv-socrates/pll_config.h b/arch/arm/boards/ebv-socrates/pll_config.h index 083ebd4a87..e912912c9a 100644 --- a/arch/arm/boards/ebv-socrates/pll_config.h +++ b/arch/arm/boards/ebv-socrates/pll_config.h @@ -87,12 +87,6 @@ #define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) #define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #define CONFIG_HPS_CLK_SDRVCO_HZ (666666666) -#define CONFIG_HPS_CLK_OSC1_HZ (25000000) -#define CONFIG_HPS_CLK_OSC2_HZ (25000000) -#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ (0) -#define CONFIG_HPS_CLK_F2S_PER_REF_HZ (0) -#define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) -#define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #define CONFIG_HPS_CLK_EMAC0_HZ (1953125) #define CONFIG_HPS_CLK_EMAC1_HZ (250000000) #define CONFIG_HPS_CLK_USBCLK_HZ (200000000) diff --git a/arch/arm/boards/terasic-sockit/pll_config.h b/arch/arm/boards/terasic-sockit/pll_config.h index e064e2b2b2..ef4a59a611 100644 --- a/arch/arm/boards/terasic-sockit/pll_config.h +++ b/arch/arm/boards/terasic-sockit/pll_config.h @@ -87,12 +87,6 @@ #define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) #define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #define CONFIG_HPS_CLK_SDRVCO_HZ (800000000) -#define CONFIG_HPS_CLK_OSC1_HZ (25000000) -#define CONFIG_HPS_CLK_OSC2_HZ (25000000) -#define CONFIG_HPS_CLK_F2S_SDR_REF_HZ (0) -#define CONFIG_HPS_CLK_F2S_PER_REF_HZ (0) -#define CONFIG_HPS_CLK_MAINVCO_HZ (1600000000) -#define CONFIG_HPS_CLK_PERVCO_HZ (1000000000) #define CONFIG_HPS_CLK_EMAC0_HZ (1953125) #define CONFIG_HPS_CLK_EMAC1_HZ (250000000) #define CONFIG_HPS_CLK_USBCLK_HZ (200000000) -- cgit v1.2.3 From ccc83ad6ef886834f5e0fe8352d64dfc6961f218 Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Thu, 12 Apr 2018 08:35:58 +0300 Subject: ARM: socfpga: mach/pll_config.h: add guard macro Signed-off-by: Antony Pavlov Signed-off-by: Sascha Hauer --- arch/arm/mach-socfpga/include/mach/pll_config.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/mach-socfpga/include/mach/pll_config.h b/arch/arm/mach-socfpga/include/mach/pll_config.h index 1a7e851eda..d6fb60dd24 100644 --- a/arch/arm/mach-socfpga/include/mach/pll_config.h +++ b/arch/arm/mach-socfpga/include/mach/pll_config.h @@ -1,3 +1,5 @@ +#ifndef _MACH_SOCFPGA_PRELOADER_PLL_CONFIG_H_ +#define _MACH_SOCFPGA_PRELOADER_PLL_CONFIG_H_ #include @@ -54,3 +56,5 @@ static struct socfpga_cm_config cm_default_cfg = { .alteragrp_mpu = CONFIG_HPS_ALTERAGRP_MPUCLK, .alteregrp_main = CONFIG_HPS_ALTERAGRP_MAINCLK, }; + +#endif /* _MACH_SOCFPGA_PRELOADER_PLL_CONFIG_H_ */ -- cgit v1.2.3 From 4b6d33c274abf515abc6749f40b4c84b0504f19e Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Thu, 12 Apr 2018 08:35:59 +0300 Subject: ARM: socfpga_defconfig: enable Altera firmware stuff Signed-off-by: Antony Pavlov Signed-off-by: Sascha Hauer --- arch/arm/configs/socfpga_defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/configs/socfpga_defconfig b/arch/arm/configs/socfpga_defconfig index 6883b5f526..3a50bae8f2 100644 --- a/arch/arm/configs/socfpga_defconfig +++ b/arch/arm/configs/socfpga_defconfig @@ -60,6 +60,7 @@ CONFIG_CMD_LED=y CONFIG_CMD_SPI=y CONFIG_CMD_LED_TRIGGER=y CONFIG_CMD_BAREBOX_UPDATE=y +CONFIG_CMD_FIRMWARELOAD=y CONFIG_CMD_OF_NODE=y CONFIG_CMD_OF_PROPERTY=y CONFIG_CMD_OFTREE=y @@ -82,6 +83,7 @@ CONFIG_LED_TRIGGERS=y CONFIG_EEPROM_AT25=y CONFIG_KEYBOARD_GPIO=y CONFIG_GPIO_DESIGNWARE=y +CONFIG_FIRMWARE_ALTERA_SOCFPGA=y CONFIG_FS_EXT4=y CONFIG_FS_TFTP=y CONFIG_FS_NFS=y -- cgit v1.2.3