From 12907adf6616f4d753ef0d9db3a9aa0bb08567d8 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 15 Aug 2018 15:39:22 +0200 Subject: ARM: MMU: fix wrong dma_flush_range in arm_create_pte() Since 7ba0f2d299 arm_create_pte() flushes the page table entries itself and it's no longer done in arch_remap_range(). Unfortunately it does not flush the modified 1st level page table entry, but instead the base of the page table. Fix it up. Fixes: 7ba0f2d299 ARM: mmu: fix cache flushing when replacing a section with a PTE Signed-off-by: Sascha Hauer --- arch/arm/cpu/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index 88ee11cb48..f6c44e3e25 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -151,7 +151,7 @@ static u32 *arm_create_pte(unsigned long virt, uint32_t flags) dma_flush_range(table, PTRS_PER_PTE * sizeof(u32)); ttb[ttb_idx] = (unsigned long)table | PMD_TYPE_TABLE; - dma_flush_range(ttb, sizeof(u32)); + dma_flush_range(&ttb[ttb_idx], sizeof(u32)); return table; } -- cgit v1.2.3