From 0d12b0c82c8329141acaf79df9e480f1ba1d9aa3 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 13 Apr 2016 13:00:50 +0200 Subject: ARM: i.MX: esdctl: Fix wrong driver name The driver should be named imx_esdctl_driver, not imx_serial_driver. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/esdctl.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index 66ba51cde1..106e648bd3 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -434,7 +434,7 @@ static __maybe_unused struct of_device_id imx_esdctl_dt_ids[] = { } }; -static struct driver_d imx_serial_driver = { +static struct driver_d imx_esdctl_driver = { .name = "imx-esdctl", .probe = imx_esdctl_probe, .id_table = imx_esdctl_ids, @@ -443,7 +443,7 @@ static struct driver_d imx_serial_driver = { static int imx_esdctl_init(void) { - return platform_driver_register(&imx_serial_driver); + return platform_driver_register(&imx_esdctl_driver); } mem_initcall(imx_esdctl_init); -- cgit v1.2.3 From 76007a8ed4316c51ff0dda962adbb7f9ba113cdd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 27 Apr 2016 15:37:33 +0200 Subject: ARM: GuF Vincell: run code for LT variant aswell The LT variant has a different compatible, yet we want to run the code on this variant aswell. Add the corresponding test. Signed-off-by: Sascha Hauer --- arch/arm/boards/guf-vincell/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/boards/guf-vincell/board.c b/arch/arm/boards/guf-vincell/board.c index ad47ee2558..43c195254e 100644 --- a/arch/arm/boards/guf-vincell/board.c +++ b/arch/arm/boards/guf-vincell/board.c @@ -40,7 +40,8 @@ static void vincell_fec_reset(void) static int vincell_devices_init(void) { - if (!of_machine_is_compatible("guf,imx53-vincell")) + if (!of_machine_is_compatible("guf,imx53-vincell") && + !of_machine_is_compatible("guf,imx53-vincell-lt")) return 0; writel(0, MX53_M4IF_BASE_ADDR + 0xc); -- cgit v1.2.3 From f1d34c27381b07a598f589afa1c0f093588c5b54 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 28 Apr 2016 16:00:06 +0200 Subject: scripts: imx: support set_bits/clear_bits The i.MX SoCs support setting bits and clearing bits in their DCD table. This adds commands for these in the imx-image tool. Signed-off-by: Sascha Hauer --- scripts/imx/README | 2 ++ scripts/imx/imx-image.c | 24 +++++++++++++++++++----- scripts/imx/imx-usb-loader.c | 3 ++- scripts/imx/imx.c | 26 ++++++++++++++++++++++++-- scripts/imx/imx.h | 5 ++++- 5 files changed, 51 insertions(+), 9 deletions(-) diff --git a/scripts/imx/README b/scripts/imx/README index 0d6d0d03a8..474b387cfc 100644 --- a/scripts/imx/README +++ b/scripts/imx/README @@ -30,6 +30,8 @@ check Poll until condition becomes true. while_all_bits_set, while_any_bit_clear, while_any_bit_set +set_bits set in register +clear_bits clear in register the i.MX SoCs support a wide range of fancy things doing with the flash header. We limit ourselves to a very simple case, that is the flash header has a fixed diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c index 16f086af31..0d315a2668 100644 --- a/scripts/imx/imx-image.c +++ b/scripts/imx/imx-image.c @@ -252,8 +252,13 @@ static int add_header_v1(struct config_data *data, void *buf) return 0; } -static int write_mem_v1(uint32_t addr, uint32_t val, int width) +static int write_mem_v1(uint32_t addr, uint32_t val, int width, int set_bits, int clear_bits) { + if (set_bits || clear_bits) { + fprintf(stderr, "This SoC does not support setting/clearing bits\n"); + return -EINVAL; + } + if (curdcd > MAX_DCD - 3) { fprintf(stderr, "At maximum %d dcd entried are allowed\n", MAX_DCD); return -ENOMEM; @@ -362,12 +367,20 @@ static void check_last_dcd(uint32_t cmd) } } -static int write_mem_v2(uint32_t addr, uint32_t val, int width) +static int write_mem_v2(uint32_t addr, uint32_t val, int width, int set_bits, int clear_bits) { uint32_t cmd; cmd = (TAG_WRITE << 24) | width; + if (set_bits && clear_bits) + return -EINVAL; + + if (set_bits) + cmd |= 3 << 3; + if (clear_bits) + cmd |= 2 << 3; + if (curdcd > MAX_DCD - 3) { fprintf(stderr, "At maximum %d dcd entried are allowed\n", MAX_DCD); return -ENOMEM; @@ -449,13 +462,14 @@ static int check(struct config_data *data, uint32_t cmd, uint32_t addr, uint32_t return 0; } -static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width) +static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width, + int set_bits, int clear_bits) { switch (data->header_version) { case 1: - return write_mem_v1(addr, val, width); + return write_mem_v1(addr, val, width, set_bits, clear_bits); case 2: - return write_mem_v2(addr, val, width); + return write_mem_v2(addr, val, width, set_bits, clear_bits); default: return -EINVAL; } diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index ed27831386..f35a4c3a44 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -1203,7 +1203,8 @@ cleanup: return ret; } -static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width) +static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width, + int set_bits, int clear_bits) { printf("wr 0x%08x 0x%08x\n", addr, val); diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c index 82ef97f80c..523368aa54 100644 --- a/scripts/imx/imx.c +++ b/scripts/imx/imx.c @@ -130,7 +130,8 @@ static int do_cmd_check(struct config_data *data, int argc, char *argv[]) return data->check(data, cmd, addr, mask); } -static int do_cmd_write_mem(struct config_data *data, int argc, char *argv[]) +static int write_mem(struct config_data *data, int argc, char *argv[], + int set_bits, int clear_bits) { uint32_t addr, val, width; char *end; @@ -170,7 +171,22 @@ static int do_cmd_write_mem(struct config_data *data, int argc, char *argv[]) return -EINVAL; }; - return data->write_mem(data, addr, val, width); + return data->write_mem(data, addr, val, width, set_bits, clear_bits); +} + +static int do_cmd_write_mem(struct config_data *data, int argc, char *argv[]) +{ + return write_mem(data, argc, argv, 0, 0); +} + +static int do_cmd_set_bits(struct config_data *data, int argc, char *argv[]) +{ + return write_mem(data, argc, argv, 1, 0); +} + +static int do_cmd_clear_bits(struct config_data *data, int argc, char *argv[]) +{ + return write_mem(data, argc, argv, 0, 1); } static int do_loadaddr(struct config_data *data, int argc, char *argv[]) @@ -336,6 +352,12 @@ struct command cmds[] = { { .name = "wm", .parse = do_cmd_write_mem, + }, { + .name = "set_bits", + .parse = do_cmd_set_bits, + }, { + .name = "clear_bits", + .parse = do_cmd_clear_bits, }, { .name = "check", .parse = do_cmd_check, diff --git a/scripts/imx/imx.h b/scripts/imx/imx.h index 85071b4ed3..a1369586a9 100644 --- a/scripts/imx/imx.h +++ b/scripts/imx/imx.h @@ -31,6 +31,8 @@ struct imx_boot_data { #define TAG_DCD_HEADER 0xd2 #define DCD_VERSION 0x40 #define TAG_WRITE 0xcc +#define PARAMETER_FLAG_MASK (1 << 3) +#define PARAMETER_FLAG_SET (1 << 4) #define TAG_CHECK 0xcf struct imx_ivt_header { @@ -64,7 +66,8 @@ struct config_data { int header_version; int cpu_type; int (*check)(struct config_data *data, uint32_t cmd, uint32_t addr, uint32_t mask); - int (*write_mem)(struct config_data *data, uint32_t addr, uint32_t val, int width); + int (*write_mem)(struct config_data *data, uint32_t addr, uint32_t val, int width, + int set_bits, int clear_bits); int csf_space; char *csf; }; -- cgit v1.2.3 From 471893d0200cf4631bb820c7db793ba18998a5d2 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 28 Apr 2016 16:03:01 +0200 Subject: scripts: imx-usb-loader: make debug output more useful - print write_memory message only in verbose mode, but in all cases when memory is written - print more information about the DCD section just executed Signed-off-by: Sascha Hauer --- scripts/imx/imx-usb-loader.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index f35a4c3a44..91151b859c 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -506,6 +506,9 @@ static int write_memory(unsigned addr, unsigned val, int width) write_reg_command[4] = (unsigned char)(addr >> 8); write_reg_command[5] = (unsigned char)(addr); + if (verbose > 1) + printf("write memory reg: 0x%08x val: 0x%08x width: %d\n", addr, val, width); + switch (width) { case 1: ds = 0x8; @@ -683,7 +686,7 @@ static int write_dcd_table_ivt(struct imx_flash_header_v2 *hdr, unsigned char *f unsigned s_length = (dcd[1] << 8) + dcd[2]; unsigned char *s_end = dcd + s_length; - printf("sub dcd length %x\n", s_length); + printf("command: 0x%02x sub dcd length: 0x%04x, flags: 0x%02x\n", dcd[0], s_length, dcd[3]); if ((dcd[0] != 0xcc) || (dcd[3] != 0x04)) { printf("Skipping unknown sub tag 0x%02x with len %04x\n", dcd[0], s_length); @@ -1206,8 +1209,6 @@ cleanup: static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width, int set_bits, int clear_bits) { - printf("wr 0x%08x 0x%08x\n", addr, val); - return write_memory(addr, val, width); } -- cgit v1.2.3 From 854ba3f912400990615b3cf464f4b0c4c3b5ceb9 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 28 Apr 2016 16:05:10 +0200 Subject: scripts: imx-usb-loader: support set_bits/clear_bits Now that we can use set_bits/clear_bits in the DCD tables, add support for this in the imx-usb-loader aswell. Signed-off-by: Sascha Hauer --- scripts/imx/imx-usb-loader.c | 45 ++++++++++++++++++++++++++++++++++++++------ 1 file changed, 39 insertions(+), 6 deletions(-) diff --git a/scripts/imx/imx-usb-loader.c b/scripts/imx/imx-usb-loader.c index 91151b859c..cf9d610823 100644 --- a/scripts/imx/imx-usb-loader.c +++ b/scripts/imx/imx-usb-loader.c @@ -412,7 +412,7 @@ int do_status(void) #define V(a) (((a) >> 24) & 0xff), (((a) >> 16) & 0xff), (((a) >> 8) & 0xff), ((a) & 0xff) -static int read_memory(unsigned addr, unsigned char *dest, unsigned cnt) +static int read_memory(unsigned addr, void *dest, unsigned cnt) { static unsigned char read_reg_command[] = { 1, @@ -559,6 +559,31 @@ static int write_memory(unsigned addr, unsigned val, int width) return err; } +static int modify_memory(unsigned addr, unsigned val, int width, int set_bits, int clear_bits) +{ + int err; + + if (set_bits || clear_bits) { + uint32_t r; + + err = read_memory(addr, &r, 4); + if (err < 0) + return err; + + if (verbose > 1) + printf("reg 0x%08x val: 0x%08x %s0x%08x\n", addr, r, + set_bits ? "|= " : "&= ~", val); + + if (set_bits) + r |= val; + if (clear_bits) + r &= ~val; + val = r; + } + + return write_memory(addr, val, 4); +} + static int load_file(void *buf, unsigned len, unsigned dladdr, unsigned char type) { static unsigned char dl_command[] = { @@ -685,15 +710,24 @@ static int write_dcd_table_ivt(struct imx_flash_header_v2 *hdr, unsigned char *f while (dcd < dcd_end) { unsigned s_length = (dcd[1] << 8) + dcd[2]; unsigned char *s_end = dcd + s_length; + int set_bits = 0, clear_bits = 0; printf("command: 0x%02x sub dcd length: 0x%04x, flags: 0x%02x\n", dcd[0], s_length, dcd[3]); - if ((dcd[0] != 0xcc) || (dcd[3] != 0x04)) { + if ((dcd[0] != 0xcc)) { printf("Skipping unknown sub tag 0x%02x with len %04x\n", dcd[0], s_length); usleep(50000); dcd += s_length; continue; } + + if (dcd[3] & PARAMETER_FLAG_MASK) { + if (dcd[3] & PARAMETER_FLAG_SET) + set_bits = 1; + else + clear_bits = 1; + } + dcd += 4; if (s_end > dcd_end) { @@ -706,9 +740,8 @@ static int write_dcd_table_ivt(struct imx_flash_header_v2 *hdr, unsigned char *f unsigned val = (dcd[4] << 24) | (dcd[5] << 16) | (dcd[6] << 8) | dcd[7]; dcd += 8; - err = write_memory(addr, val, 4); - if (err < 0) - return err; + + modify_memory(addr, val, 4, set_bits, clear_bits); } } return err; @@ -1209,7 +1242,7 @@ cleanup: static int write_mem(struct config_data *data, uint32_t addr, uint32_t val, int width, int set_bits, int clear_bits) { - return write_memory(addr, val, width); + return modify_memory(addr, val, width, set_bits, clear_bits); } static int parse_initfile(const char *filename) -- cgit v1.2.3 From 9d5cf8d42709763d2607cde991e024f36600eb07 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 28 Apr 2016 16:06:59 +0200 Subject: ARM: i.MX: karo-tx6: Add support for the 2GiB i.MX6q+ board variant Different SDRAM setup, but same board otherwise. Signed-off-by: Sascha Hauer --- .../boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg | 183 +++++++++++++++++++++ arch/arm/boards/karo-tx6x/lowlevel.c | 20 +++ images/Makefile.imx | 5 + 3 files changed, 208 insertions(+) create mode 100644 arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg new file mode 100644 index 0000000000..455aab92ca --- /dev/null +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg @@ -0,0 +1,183 @@ +soc imx6 +loadaddr 0x20000000 +dcdofs 0x400 + +wm 32 0x020e00a4 0x00000016 +wm 32 0x020e00c4 0x00000011 +wm 32 0x020e03b8 0x0000f079 +wm 32 0x020e03d8 0x0000f079 +wm 32 0x020e0898 0x00000000 +wm 32 0x020e089c 0x00000000 +wm 32 0x020e0248 0x00000012 +wm 32 0x020e02c8 0x00000015 +wm 32 0x020e06b0 0x000030b0 +wm 32 0x020e00a0 0x00000015 +wm 32 0x020e03b4 0x000030b0 +wm 32 0x020e024c 0x00000005 +wm 32 0x020e061c 0x000030b0 +wm 32 0x020c402c 0x006336c1 +wm 32 0x020c4034 0x00012093 +wm 32 0x020c4038 0x00012090 +wm 32 0x020c80e0 0x00002001 +set_bits 32 0x020c4068 0x00000030 +set_bits 32 0x020c406c 0x00000c00 +set_bits 32 0x020c4070 0x000000c0 +set_bits 32 0x020c4078 0xff000000 +set_bits 32 0x020c407c 0x0f000000 +set_bits 32 0x020c4080 0x000003fc +wm 32 0x020c80a0 0x00082029 +wm 32 0x020c80b0 0x0007a120 +wm 32 0x020c80c0 0x000f4240 +wm 32 0x020e0004 0x48640005 +wm 32 0x020e0010 0xf00000cf +wm 32 0x020e0018 0x77177717 +wm 32 0x020e001c 0x77177717 +wm 32 0x020e02a8 0x00000001 +wm 32 0x020e02ac 0x00000001 +wm 32 0x020e0920 0x00000003 +wm 32 0x020e02c0 0x00000001 +wm 32 0x020e02c4 0x00000001 +wm 32 0x020e091c 0x00000003 +wm 32 0x020e02ec 0x00000000 +wm 32 0x020e05ac 0x00020030 +wm 32 0x020e05b4 0x00020030 +wm 32 0x020e0528 0x00020030 +wm 32 0x020e0520 0x00020030 +wm 32 0x020e0514 0x00020030 +wm 32 0x020e0510 0x00020030 +wm 32 0x020e05bc 0x00020030 +wm 32 0x020e05c4 0x00020030 +wm 32 0x020e052c 0x00020200 +wm 32 0x020e0530 0x00020200 +wm 32 0x020e0534 0x00020200 +wm 32 0x020e0538 0x00020200 +wm 32 0x020e053c 0x00020200 +wm 32 0x020e0540 0x00020200 +wm 32 0x020e0544 0x00020200 +wm 32 0x020e0548 0x00020200 +wm 32 0x020e054c 0x00020200 +wm 32 0x020e0550 0x00020200 +wm 32 0x020e0554 0x00020200 +wm 32 0x020e0558 0x00020200 +wm 32 0x020e055c 0x00020200 +wm 32 0x020e0560 0x00020200 +wm 32 0x020e0564 0x00020200 +wm 32 0x020e0568 0x00020200 +wm 32 0x020e056c 0x00020030 +wm 32 0x020e0578 0x00020030 +wm 32 0x020e0588 0x00020030 +wm 32 0x020e0594 0x00020030 +wm 32 0x020e057c 0x00020030 +wm 32 0x020e0590 0x00003000 +wm 32 0x020e0598 0x00003000 +wm 32 0x020e0580 0x00000000 +wm 32 0x020e0584 0x00000000 +wm 32 0x020e058c 0x00000000 +wm 32 0x020e059c 0x00003030 +wm 32 0x020e05a0 0x00003030 +wm 32 0x020e0784 0x00000030 +wm 32 0x020e0788 0x00000030 +wm 32 0x020e0794 0x00000030 +wm 32 0x020e079c 0x00000030 +wm 32 0x020e07a0 0x00000030 +wm 32 0x020e07a4 0x00000030 +wm 32 0x020e07a8 0x00000030 +wm 32 0x020e0748 0x00000030 +wm 32 0x020e074c 0x00000030 +wm 32 0x020e0750 0x00020000 +wm 32 0x020e0758 0x00000000 +wm 32 0x020e0774 0x00020000 +wm 32 0x020e078c 0x00000030 +wm 32 0x020e0798 0x000c0000 +wm 32 0x020e0768 0x00002000 +wm 32 0x020e0770 0x00000000 +wm 32 0x020e0754 0x00000200 +wm 32 0x020e075c 0x00000200 +wm 32 0x020e0760 0x00000200 +wm 32 0x020e0764 0x00000200 +wm 32 0x020e076c 0x00000200 +wm 32 0x020e0778 0x00000200 +wm 32 0x020e077c 0x00000200 +wm 32 0x020e0780 0x00000200 +wm 32 0x021b001c 0x04008010 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0800 0xa1390001 +wm 32 0x021b080c 0x001e001e +wm 32 0x021b0810 0x001e001e +wm 32 0x021b480c 0x001e001e +wm 32 0x021b4810 0x001e001e +wm 32 0x021b083c 0x43430349 +wm 32 0x021b0840 0x03330334 +wm 32 0x021b483c 0x434b0351 +wm 32 0x021b4840 0x033d030e +wm 32 0x021b0848 0x40404040 +wm 32 0x021b0850 0x40404040 +wm 32 0x021b4848 0x40404040 +wm 32 0x021b4850 0x40404040 +wm 32 0x021b081c 0x33333333 +wm 32 0x021b0820 0x33333333 +wm 32 0x021b0824 0x33333333 +wm 32 0x021b0828 0x33333333 +wm 32 0x021b481c 0x33333333 +wm 32 0x021b4820 0x33333333 +wm 32 0x021b4824 0x33333333 +wm 32 0x021b4828 0x33333333 +wm 32 0x021b08b8 0x00000800 +wm 32 0x021b48b8 0x00000800 +wm 32 0x021b0018 0x00000742 +check 32 while_all_bits_clear 0x021b0018 0x00000002 +wm 32 0x021b001c 0x00008000 +check 32 while_any_bit_clear 0x021b001c 0x00004000 +wm 32 0x021b0000 0x841a0000 +check 32 while_any_bit_clear 0x021b0018 0x40000000 +wm 32 0x021b000c 0x898f78f4 +wm 32 0x021b0010 0xff328e64 +wm 32 0x021b0014 0x01ff00db +wm 32 0x021b002c 0x000026d2 +wm 32 0x021b0030 0x008f1023 +wm 32 0x021b0008 0x24444040 +wm 32 0x021b0004 0x00020076 +wm 32 0x021b0040 0x00000047 +wm 32 0x021b001c 0x09308030 +wm 32 0x021b001c 0x00048031 +wm 32 0x021b001c 0x00488032 +wm 32 0x021b001c 0x00008033 +wm 32 0x021b0020 0x0000c000 +wm 32 0x021b001c 0x00008020 +wm 32 0x021b0818 0x00022222 +wm 32 0x021b4818 0x00022222 +wm 32 0x021b0890 0x00000003 +set_bits 32 0x021b0400 0x02000000 +wm 32 0x021b0404 0x00000001 +wm 32 0x021b001c 0x04008010 +wm 32 0x021b001c 0x04008040 +wm 32 0x021b0800 0xa1390001 +check 32 while_all_bits_clear 0x021b0800 0x00010000 +wm 32 0x021b0800 0xa1380000 +wm 32 0x021b001c 0x00048033 +wm 32 0x020e05a8 0x00000030 +wm 32 0x020e05b0 0x00000030 +wm 32 0x020e0524 0x00000030 +wm 32 0x020e051c 0x00000030 +wm 32 0x020e0518 0x00000030 +wm 32 0x020e050c 0x00000030 +wm 32 0x020e05b8 0x00000030 +wm 32 0x020e05c0 0x00000030 +wm 32 0x021b001c 0x04008050 +wm 32 0x021b0860 0x00000030 +wm 32 0x021b4860 0x00000030 +check 32 while_all_bits_clear 0x021b0860 0x0000001f +check 32 while_all_bits_clear 0x021b4860 0x0000001f +wm 32 0x021b001c 0x04008050 +wm 32 0x021b0864 0x00000030 +check 32 while_all_bits_clear 0x021b0864 0x0000001f +wm 32 0x021b001c 0x04008050 +wm 32 0x021b4864 0x00000030 +check 32 while_all_bits_clear 0x021b4864 0x0000001f +wm 32 0x021b001c 0x00008033 +wm 32 0x021b0800 0xa138002b +wm 32 0x021b0020 0x00001800 +wm 32 0x021b0404 0x00001000 +wm 32 0x021b0004 0x00025576 +wm 32 0x021b001c 0x00000000 +check 32 while_all_bits_clear 0x021b001c 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/lowlevel.c b/arch/arm/boards/karo-tx6x/lowlevel.c index 1aa24c5842..459c44b845 100644 --- a/arch/arm/boards/karo-tx6x/lowlevel.c +++ b/arch/arm/boards/karo-tx6x/lowlevel.c @@ -77,3 +77,23 @@ ENTRY_FUNCTION(start_imx6q_tx6x_1g, r0, r1, r2) imx6q_barebox_entry(fdt); } + +BAREBOX_IMD_TAG_STRING(tx6x_mx6_memsize_2G, IMD_TYPE_PARAMETER, "memsize=2048", 0); + +ENTRY_FUNCTION(start_imx6q_tx6x_2g, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + arm_setup_stack(0x00920000 - 8); + + IMD_USED(tx6x_mx6_memsize_2G); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = __dtb_imx6q_tx6q_start - get_runtime_offset(); + + imx6q_barebox_entry(fdt); +} diff --git a/images/Makefile.imx b/images/Makefile.imx index 6870bce4ca..4caccdb717 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -293,6 +293,11 @@ CFG_start_imx6q_tx6x_1g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6q-1g.im FILE_barebox-karo-imx6q-tx6x-1g.img = start_imx6q_tx6x_1g.pblx.imximg image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6q-tx6x-1g.img +pblx-$(CONFIG_MACH_TX6X) += start_imx6q_tx6x_2g +CFG_start_imx6q_tx6x_2g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6qp-2g.imxcfg +FILE_barebox-karo-imx6qp-tx6x-2g.img = start_imx6q_tx6x_2g.pblx.imximg +image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6qp-tx6x-2g.img + pblx-$(CONFIG_MACH_UDOO) += start_imx6_udoo CFG_start_imx6_udoo.pblx.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg FILE_barebox-udoo-imx6q.img = start_imx6_udoo.pblx.imximg -- cgit v1.2.3 From b66a106f3422b811f10e9b9dc987e2bc7f4fe449 Mon Sep 17 00:00:00 2001 From: Stefan Christ Date: Wed, 4 May 2016 15:25:57 +0200 Subject: mci: imx-esdhc: implement reset quirks for i.MX6 DualLite/Solo First of all the reset values of MMC interfaces are differently between Quad and DualLite/Solo SoM. Register VEND_SPEC2(0xC8) Quad: 0x0 DualLite: 0x00000006 default: 0x00000006 (from i.MX6 Reference Manual) Furthermore the ROM Code of Quad and DualLite uses the MMC interfaces differently when it loads the bootloader from that device: Register DLL_CTRL(0x60) Bit 25 FBCLK_SEL (0x48) Quad: 0x0 0 DualLite: 0x01000021 1 Since the linux kernel and barebox driver doesn't reset all registers, the MMC interface is in an inconsistent state, which leads to boot failures for some eMMC devices on the i.MX6 DualLite SoM. The errors look like: mmcblk3: error -110 sending stop command, original cmd response 0x900, card status 0x400900 mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0 mmcblk3: retrying using single block read mmcblk3: error -84 transferring data, sector 24578, nr 2, cmd response 0x900, card status 0x0 blk_update_request: I/O error, dev mmcblk3, sector 24578 It's sufficient to reset register DLL_CTRL and bit FBCLK_SEL. Register VEND_SPEC2 has no effect. Signed-off-by: Stefan Christ Signed-off-by: Sascha Hauer --- drivers/mci/imx-esdhc.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/mci/imx-esdhc.c b/drivers/mci/imx-esdhc.c index 282887ba78..2e189fecad 100644 --- a/drivers/mci/imx-esdhc.c +++ b/drivers/mci/imx-esdhc.c @@ -41,6 +41,8 @@ #define IMX_SDHCI_WML 0x44 #define IMX_SDHCI_MIXCTRL 0x48 +#define IMX_SDHCI_DLL_CTRL 0x60 +#define IMX_SDHCI_MIX_CTRL_FBCLK_SEL (BIT(25)) struct fsl_esdhc_host { struct mci_host mci; @@ -516,11 +518,23 @@ static int esdhc_reset(struct fsl_esdhc_host *host) { void __iomem *regs = host->regs; uint64_t start; + int val; /* reset the controller */ esdhc_write32(regs + SDHCI_CLOCK_CONTROL__TIMEOUT_CONTROL__SOFTWARE_RESET, SYSCTL_RSTA); + /* extra register reset for i.MX6 Solo/DualLite */ + if (cpu_is_mx6()) { + /* reset bit FBCLK_SEL */ + val = esdhc_read32(regs + IMX_SDHCI_MIXCTRL); + val &= ~IMX_SDHCI_MIX_CTRL_FBCLK_SEL; + esdhc_write32(regs + IMX_SDHCI_MIXCTRL, val); + + /* reset delay line settings in IMX_SDHCI_DLL_CTRL */ + esdhc_write32(regs + IMX_SDHCI_DLL_CTRL, 0x0); + } + start = get_time_ns(); /* hardware clears the bit when it is done */ while (1) { -- cgit v1.2.3