From 5f11a6bf91a8c275f0e897e9afcd2ae8b09ae903 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Thu, 26 Apr 2018 22:49:44 -0700 Subject: ARM: i.MX: Introduce IMX_SRC_SRSR Offset for SRSR register in SRC IP block for i.MX51, i.MX53, i.MX6 and VFxxx is exactly the same so define a single constant for that and replace all of the SoC specific definitions. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/imx6.c | 2 +- arch/arm/mach-imx/include/mach/reset-reason.h | 4 +--- arch/arm/mach-imx/vf610.c | 2 +- 3 files changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 73cd4eb6dc..9fe313d2e8 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -197,7 +197,7 @@ int imx6_init(void) } imx_set_silicon_revision(cputypestr, mx6_silicon_revision); - imx_set_reset_reason(src + IMX6_SRC_SRSR, imx_reset_reasons); + imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons); imx6_setup_ipu_qos(); imx6ul_enet_clk_init(); diff --git a/arch/arm/mach-imx/include/mach/reset-reason.h b/arch/arm/mach-imx/include/mach/reset-reason.h index 0894b95ab3..0f644a8c1d 100644 --- a/arch/arm/mach-imx/include/mach/reset-reason.h +++ b/arch/arm/mach-imx/include/mach/reset-reason.h @@ -14,10 +14,8 @@ #define IMX_SRC_SRSR_TEMPSENSE_RESET BIT(9) #define IMX_SRC_SRSR_WARM_BOOT BIT(16) -#define IMX6_SRC_SRSR 0x008 +#define IMX_SRC_SRSR 0x008 #define IMX7_SRC_SRSR 0x05c -#define VF610_SRC_SRSR 0x008 - #define VF610_SRC_SRSR_SW_RST BIT(18) #define VF610_SRC_SRSR_RESETB BIT(7) diff --git a/arch/arm/mach-imx/vf610.c b/arch/arm/mach-imx/vf610.c index df8cfcd6b6..c535716c10 100644 --- a/arch/arm/mach-imx/vf610.c +++ b/arch/arm/mach-imx/vf610.c @@ -54,6 +54,6 @@ int vf610_init(void) } imx_set_silicon_revision(cputypestr, vf610_cpu_revision()); - imx_set_reset_reason(src + VF610_SRC_SRSR, vf610_reset_reasons); + imx_set_reset_reason(src + IMX_SRC_SRSR, vf610_reset_reasons); return 0; } -- cgit v1.2.3