From 6e6cb6c407a220b61d66e957713a919f4afbc54a Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2016 07:30:56 +0200 Subject: dts: update to v4.6-rc3 Signed-off-by: Sascha Hauer --- dts/Bindings/clock/qca,ath79-pll.txt | 6 +++--- dts/Bindings/pinctrl/img,pistachio-pinctrl.txt | 12 ++++++------ dts/src/mips/brcm/bcm7435.dtsi | 2 +- dts/src/mips/qca/ar9132.dtsi | 2 +- dts/src/mips/qca/ar9132_tl_wr1043nd_v1.dts | 2 +- 5 files changed, 12 insertions(+), 12 deletions(-) diff --git a/dts/Bindings/clock/qca,ath79-pll.txt b/dts/Bindings/clock/qca,ath79-pll.txt index e0fc2c11dd..241fb0545b 100644 --- a/dts/Bindings/clock/qca,ath79-pll.txt +++ b/dts/Bindings/clock/qca,ath79-pll.txt @@ -3,7 +3,7 @@ Binding for Qualcomm Atheros AR7xxx/AR9XXX PLL controller The PPL controller provides the 3 main clocks of the SoC: CPU, DDR and AHB. Required Properties: -- compatible: has to be "qca,-cpu-intc" and one of the following +- compatible: has to be "qca,-pll" and one of the following fallbacks: - "qca,ar7100-pll" - "qca,ar7240-pll" @@ -21,8 +21,8 @@ Optional properties: Example: - memory-controller@18050000 { - compatible = "qca,ar9132-ppl", "qca,ar9130-pll"; + pll-controller@18050000 { + compatible = "qca,ar9132-pll", "qca,ar9130-pll"; reg = <0x18050000 0x20>; clock-names = "ref"; diff --git a/dts/Bindings/pinctrl/img,pistachio-pinctrl.txt b/dts/Bindings/pinctrl/img,pistachio-pinctrl.txt index 08a4a32c8e..0326154c79 100644 --- a/dts/Bindings/pinctrl/img,pistachio-pinctrl.txt +++ b/dts/Bindings/pinctrl/img,pistachio-pinctrl.txt @@ -134,12 +134,12 @@ mfio80 ddr_debug, mips_trace_data, mips_debug mfio81 dreq0, mips_trace_data, eth_debug mfio82 dreq1, mips_trace_data, eth_debug mfio83 mips_pll_lock, mips_trace_data, usb_debug -mfio84 sys_pll_lock, mips_trace_data, usb_debug -mfio85 wifi_pll_lock, mips_trace_data, sdhost_debug -mfio86 bt_pll_lock, mips_trace_data, sdhost_debug -mfio87 rpu_v_pll_lock, dreq2, socif_debug -mfio88 rpu_l_pll_lock, dreq3, socif_debug -mfio89 audio_pll_lock, dreq4, dreq5 +mfio84 audio_pll_lock, mips_trace_data, usb_debug +mfio85 rpu_v_pll_lock, mips_trace_data, sdhost_debug +mfio86 rpu_l_pll_lock, mips_trace_data, sdhost_debug +mfio87 sys_pll_lock, dreq2, socif_debug +mfio88 wifi_pll_lock, dreq3, socif_debug +mfio89 bt_pll_lock, dreq4, dreq5 tck trstn tdi diff --git a/dts/src/mips/brcm/bcm7435.dtsi b/dts/src/mips/brcm/bcm7435.dtsi index adb33e3550..56035e5b70 100644 --- a/dts/src/mips/brcm/bcm7435.dtsi +++ b/dts/src/mips/brcm/bcm7435.dtsi @@ -82,7 +82,7 @@ }; gisb-arb@400000 { - compatible = "brcm,bcm7400-gisb-arb"; + compatible = "brcm,bcm7435-gisb-arb"; reg = <0x400000 0xdc>; native-endian; interrupt-parent = <&sun_l2_intc>; diff --git a/dts/src/mips/qca/ar9132.dtsi b/dts/src/mips/qca/ar9132.dtsi index 3ad4ba9b12..3c2ed9ee5b 100644 --- a/dts/src/mips/qca/ar9132.dtsi +++ b/dts/src/mips/qca/ar9132.dtsi @@ -83,7 +83,7 @@ }; pll: pll-controller@18050000 { - compatible = "qca,ar9132-ppl", + compatible = "qca,ar9132-pll", "qca,ar9130-pll"; reg = <0x18050000 0x20>; diff --git a/dts/src/mips/qca/ar9132_tl_wr1043nd_v1.dts b/dts/src/mips/qca/ar9132_tl_wr1043nd_v1.dts index e535ee3c26..4f1540e5f9 100644 --- a/dts/src/mips/qca/ar9132_tl_wr1043nd_v1.dts +++ b/dts/src/mips/qca/ar9132_tl_wr1043nd_v1.dts @@ -18,7 +18,7 @@ reg = <0x0 0x2000000>; }; - extosc: oscillator { + extosc: ref { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <40000000>; -- cgit v1.2.3