From 754f35fd9df11ece4513be6d1a305fb2bf178f62 Mon Sep 17 00:00:00 2001 From: Giorgio Dal Molin Date: Tue, 7 Apr 2020 17:32:17 +0200 Subject: ARM: sm.c: add the attribute 'volatile' to some asm() statements. Prevent the compiler to eventually cache register values read/written to/from CP15. Signed-off-by: Giorgio Dal Molin Signed-off-by: Sascha Hauer --- arch/arm/cpu/sm.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/cpu/sm.c b/arch/arm/cpu/sm.c index cb33d96250..f5a1edbd4f 100644 --- a/arch/arm/cpu/sm.c +++ b/arch/arm/cpu/sm.c @@ -26,7 +26,7 @@ static unsigned int read_id_pfr1(void) { unsigned int reg; - asm("mrc p15, 0, %0, c0, c1, 1\n" : "=r"(reg)); + asm volatile ("mrc p15, 0, %0, c0, c1, 1\n" : "=r"(reg)); return reg; } @@ -34,18 +34,18 @@ static u32 read_nsacr(void) { unsigned int reg; - asm("mrc p15, 0, %0, c1, c1, 2\n" : "=r"(reg)); + asm volatile ("mrc p15, 0, %0, c1, c1, 2\n" : "=r"(reg)); return reg; } static void write_nsacr(u32 val) { - asm("mcr p15, 0, %0, c1, c1, 2" : : "r"(val)); + asm volatile ("mcr p15, 0, %0, c1, c1, 2" : : "r"(val)); } static void write_mvbar(u32 val) { - asm("mcr p15, 0, %0, c12, c0, 1" : : "r"(val)); + asm volatile ("mcr p15, 0, %0, c12, c0, 1" : : "r"(val)); } static int cpu_is_virt_capable(void) -- cgit v1.2.3