From 439d2028a0e3f095e85d779892876efff5c7c9f1 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Tue, 31 May 2022 18:26:24 +0200 Subject: arm: rockchip: add support for the radxa rock3 board Add basic support for the Radxa ROCK3 Model A board (featuring the Rockchip RK3568 SoC). Signed-off-by: Michael Riesch Link: https://lore.barebox.org/20220531162624.245664-4-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer --- Documentation/boards/rockchip.rst | 1 + arch/arm/boards/Makefile | 1 + arch/arm/boards/radxa-rock3/.gitignore | 1 + arch/arm/boards/radxa-rock3/Makefile | 3 ++ arch/arm/boards/radxa-rock3/board.c | 48 ++++++++++++++++++++++++++++++ arch/arm/boards/radxa-rock3/lowlevel.c | 44 +++++++++++++++++++++++++++ arch/arm/configs/rockchip_v8_defconfig | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3568-rock-3a.dts | 54 ++++++++++++++++++++++++++++++++++ arch/arm/mach-rockchip/Kconfig | 6 ++++ images/Makefile.rockchip | 7 +++++ 11 files changed, 167 insertions(+) create mode 100644 arch/arm/boards/radxa-rock3/.gitignore create mode 100644 arch/arm/boards/radxa-rock3/Makefile create mode 100644 arch/arm/boards/radxa-rock3/board.c create mode 100644 arch/arm/boards/radxa-rock3/lowlevel.c create mode 100644 arch/arm/dts/rk3568-rock-3a.dts diff --git a/Documentation/boards/rockchip.rst b/Documentation/boards/rockchip.rst index 041bb9fa64..d4f8a9c5a3 100644 --- a/Documentation/boards/rockchip.rst +++ b/Documentation/boards/rockchip.rst @@ -59,6 +59,7 @@ Supported Boards - Rockchip RK3568 EVB - Rockchip RK3568 Bananapi R2 Pro - Pine64 Quartz64 Model A +- Radxa ROCK3 Model A The steps described in the following target the RK3568 and the RK3568 EVB but generally apply to both SoCs and all boards. diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index d303999614..3ccde26f1b 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -192,3 +192,4 @@ obj-$(CONFIG_MACH_SKOV_ARM9CPU) += skov-arm9cpu/ obj-$(CONFIG_MACH_RK3568_EVB) += rockchip-rk3568-evb/ obj-$(CONFIG_MACH_RK3568_BPI_R2PRO) += rockchip-rk3568-bpi-r2pro/ obj-$(CONFIG_MACH_PINE64_QUARTZ64) += pine64-quartz64/ +obj-$(CONFIG_MACH_RADXA_ROCK3) += radxa-rock3/ diff --git a/arch/arm/boards/radxa-rock3/.gitignore b/arch/arm/boards/radxa-rock3/.gitignore new file mode 100644 index 0000000000..f458f794b5 --- /dev/null +++ b/arch/arm/boards/radxa-rock3/.gitignore @@ -0,0 +1 @@ +sdram-init.bin diff --git a/arch/arm/boards/radxa-rock3/Makefile b/arch/arm/boards/radxa-rock3/Makefile new file mode 100644 index 0000000000..b37b6c870b --- /dev/null +++ b/arch/arm/boards/radxa-rock3/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/radxa-rock3/board.c b/arch/arm/boards/radxa-rock3/board.c new file mode 100644 index 0000000000..05a526b06e --- /dev/null +++ b/arch/arm/boards/radxa-rock3/board.c @@ -0,0 +1,48 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include + +struct rock3_model { + const char *name; + const char *shortname; +}; + +static int rock3_probe(struct device_d *dev) +{ + enum bootsource bootsource = bootsource_get(); + int instance = bootsource_get_instance(); + const struct rock3_model *model; + + model = device_get_match_data(dev); + + barebox_set_model(model->name); + barebox_set_hostname(model->shortname); + + if (bootsource == BOOTSOURCE_MMC && instance == 1) + of_device_enable_path("/chosen/environment-sd"); + else + of_device_enable_path("/chosen/environment-emmc"); + + return 0; +} + +static const struct rock3_model rock3a = { + .name = "Radxa ROCK3 Model A", + .shortname = "rock3a", +}; + +static const struct of_device_id rock3_of_match[] = { + { + .compatible = "radxa,rock3a", + .data = &rock3a, + }, + { /* sentinel */ }, +}; + +static struct driver_d rock3_board_driver = { + .name = "board-rock3", + .probe = rock3_probe, + .of_compatible = rock3_of_match, +}; +coredevice_platform_driver(rock3_board_driver); diff --git a/arch/arm/boards/radxa-rock3/lowlevel.c b/arch/arm/boards/radxa-rock3/lowlevel.c new file mode 100644 index 0000000000..00a68889cd --- /dev/null +++ b/arch/arm/boards/radxa-rock3/lowlevel.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include +#include +#include + +extern char __dtb_rk3568_rock_3a_start[]; + +static noinline void rk3568_start(void *fdt) +{ + /* + * Image execution starts at 0x0, but this is used for ATF and + * OP-TEE later, so move away from here. + */ + if (current_el() == 3) + relocate_to_adr_full(RK3568_BAREBOX_LOAD_ADDRESS); + else + relocate_to_current_adr(); + + setup_c(); + + /* + * Enable vccio4 1.8V and vccio6 1.8V + * Needed for GMAC to work. + */ + writel(RK_SETBITS(0x50), 0xfdc20140); + + if (current_el() == 3) { + rk3568_lowlevel_init(); + rk3568_atf_load_bl31(fdt); + /* not reached */ + } + + barebox_arm_entry(RK3568_DRAM_BOTTOM, 0x80000000 - RK3568_DRAM_BOTTOM, fdt); +} + +ENTRY_FUNCTION(start_rock3a, r0, r1, r2) +{ + rk3568_start(__dtb_rk3568_rock_3a_start); +} diff --git a/arch/arm/configs/rockchip_v8_defconfig b/arch/arm/configs/rockchip_v8_defconfig index 79d51234cc..1c7116e74a 100644 --- a/arch/arm/configs/rockchip_v8_defconfig +++ b/arch/arm/configs/rockchip_v8_defconfig @@ -2,6 +2,7 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_MACH_RK3568_EVB=y CONFIG_MACH_RK3568_BPI_R2PRO=y CONFIG_MACH_PINE64_QUARTZ64=y +CONFIG_MACH_RADXA_ROCK3=y CONFIG_BOARD_ARM_GENERIC_DT=y CONFIG_ARM_OPTIMZED_STRING_FUNCTIONS=y CONFIG_ARM_PSCI_CLIENT=y diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 46e5e67672..61fd3be72b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -104,6 +104,7 @@ lwl-$(CONFIG_MACH_PROTONIC_STM32MP1) += \ stm32mp151-prtt1c.dtb.o \ stm32mp151-prtt1s.dtb.o lwl-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o +lwl-$(CONFIG_MACH_RADXA_ROCK3) += rk3568-rock-3a.dtb.o lwl-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o lwl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o lwl-$(CONFIG_MACH_RK3568_EVB) += rk3568-evb1-v10.dtb.o diff --git a/arch/arm/dts/rk3568-rock-3a.dts b/arch/arm/dts/rk3568-rock-3a.dts new file mode 100644 index 0000000000..44d4fc9686 --- /dev/null +++ b/arch/arm/dts/rk3568-rock-3a.dts @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include + +/ { + chosen: chosen { + environment-sd { + compatible = "barebox,environment"; + device-path = &environment_sd; + status = "disabled"; + }; + + environment-emmc { + compatible = "barebox,environment"; + device-path = &environment_emmc; + status = "disabled"; + }; + }; + + memory@a00000 { + device_type = "memory"; + reg = <0x0 0x00a00000 0x0 0x7f600000>; + }; +}; + +&sdhci { + no-sd; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + environment_emmc: partition@408000 { + label = "barebox-environment"; + reg = <0x0 0x408000 0x0 0x8000>; + }; + }; +}; + +&sdmmc0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <2>; + #size-cells = <2>; + + environment_sd: partition@408000 { + label = "barebox-environment"; + reg = <0x0 0x408000 0x0 0x8000>; + }; + }; +}; diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig index ffd3aa8a4e..4b6dfd2c17 100644 --- a/arch/arm/mach-rockchip/Kconfig +++ b/arch/arm/mach-rockchip/Kconfig @@ -80,6 +80,12 @@ config MACH_PINE64_QUARTZ64 help Say Y here if you are using a Pine64 Quartz64 +config MACH_RADXA_ROCK3 + select ARCH_RK3568 + bool "Radxa ROCK3" + help + Say Y here if you are using a Radxa ROCK3 + comment "select board features:" config ARCH_RK3399_OPTEE diff --git a/images/Makefile.rockchip b/images/Makefile.rockchip index cdc7772c2e..33c76caf79 100644 --- a/images/Makefile.rockchip +++ b/images/Makefile.rockchip @@ -20,6 +20,9 @@ image-$(CONFIG_MACH_RK3568_BPI_R2PRO) += barebox-rk3568-bpi-r2pro.img pblb-$(CONFIG_MACH_PINE64_QUARTZ64) += start_quartz64a image-$(CONFIG_MACH_PINE64_QUARTZ64) += barebox-quartz64a.img +pblb-$(CONFIG_MACH_RADXA_ROCK3) += start_rock3a +image-$(CONFIG_MACH_RADXA_ROCK3) += barebox-rock3a.img + quiet_cmd_rkimg_image = RK-IMG $@ cmd_rkimg_image = $(objtree)/scripts/rkimage -o $@ $(word 2,$^) $(word 1,$^) @@ -34,3 +37,7 @@ $(obj)/barebox-rk3568-bpi-r2pro.img: $(obj)/start_rk3568_bpi_r2pro.pblb \ $(obj)/barebox-quartz64a.img: $(obj)/start_quartz64a.pblb \ $(board)/pine64-quartz64/sdram-init.bin $(call if_changed,rkimg_image) + +$(obj)/barebox-rock3a.img: $(obj)/start_rock3a.pblb \ + $(board)/radxa-rock3/sdram-init.bin + $(call if_changed,rkimg_image) -- cgit v1.2.3 From a5a05ed4f9829a0c5e57f2f32e979d1ddbf7c3c3 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Wed, 8 Jun 2022 22:17:47 +0200 Subject: arm: rockchip: switch to mainline dts for rk3568-evb1 The RK3568 EVB1 device tree in mainline Linux has matured since the initial RK3568 support entered barebox. Therefore, we can now switch to the mainline device tree. Signed-off-by: Michael Riesch Link: https://lore.barebox.org/20220608201747.3270318-1-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer --- arch/arm/boards/rockchip-rk3568-evb/board.c | 5 +- arch/arm/dts/rk3568-evb1-v10.dts | 519 +--------------------------- 2 files changed, 5 insertions(+), 519 deletions(-) diff --git a/arch/arm/boards/rockchip-rk3568-evb/board.c b/arch/arm/boards/rockchip-rk3568-evb/board.c index 09385bea29..a466d385a2 100644 --- a/arch/arm/boards/rockchip-rk3568-evb/board.c +++ b/arch/arm/boards/rockchip-rk3568-evb/board.c @@ -28,8 +28,9 @@ static int rk3568_evb_probe(struct device_d *dev) else of_device_enable_path("/chosen/environment-emmc"); - rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, "/dev/emmc"); - rk3568_bbu_mmc_register("sd", 0, "/dev/sd"); + rk3568_bbu_mmc_register("sd", 0, "/dev/mmc0"); + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, + "/dev/mmc1"); return 0; } diff --git a/arch/arm/dts/rk3568-evb1-v10.dts b/arch/arm/dts/rk3568-evb1-v10.dts index df5633978d..d2c1fc89a8 100644 --- a/arch/arm/dts/rk3568-evb1-v10.dts +++ b/arch/arm/dts/rk3568-evb1-v10.dts @@ -5,22 +5,11 @@ */ /dts-v1/; -#include -#include -#include "rk3568.dtsi" -/ { - model = "Rockchip RK3568 EVB1 DDR4 V10 Board"; - compatible = "rockchip,rk3568-evb1-v10", "rockchip,rk3568"; - - aliases { - emmc = &sdhci; - sd = &sdmmc0; - }; +#include +/ { chosen: chosen { - stdout-path = "serial2:1500000n8"; - environment-sd { compatible = "barebox,environment"; device-path = &environment_sd; @@ -38,437 +27,10 @@ device_type = "memory"; reg = <0x0 0x00a00000 0x0 0x7f600000>; }; - - dc_12v: dc-12v { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_sys: vcc3v3-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc3v3_lcd0_n: vcc3v3-lcd0-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd0_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_lcd1_n: vcc3v3-lcd1-n { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_lcd1_n"; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_otg_en>; - regulator-name = "vcc5v0_otg"; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-name = "vcc5v0_host"; - regulator-always-on; - }; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "output"; - - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - - tx_delay = <0x3c>; - rx_delay = <0x2f>; - - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - phy-mode = "rgmii"; - clock_in_out = "output"; - - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - - tx_delay = <0x4f>; - rx_delay = <0x26>; - - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - - pinctrl-names = "default", "pmic-sleep", - "pmic-power-off", "pmic-reset"; - pinctrl-0 = <&pmic_int>; - pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>; - pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>; - pinctrl-3 = <&soc_slppin_gpio>, <&rk817_slppin_rst>; - - rockchip,system-power-controller; - wakeup-source; - #clock-cells = <1>; - clock-output-names = "rk808-clkout1", "rk808-clkout2"; - //fb-inner-reg-idxs = <2>; - /* 1: rst regs (default in codes), 0: rst the pmic */ - pmic-reset-func = <0>; - - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - - pwrkey { - status = "okay"; - }; - - pinctrl_rk8xx: pinctrl_rk8xx { - gpio-controller; - #gpio-cells = <2>; - - rk817_slppin_null: rk817_slppin_null { - pins = "gpio_slp"; - function = "pin_fun0"; - }; - - rk817_slppin_slp: rk817_slppin_slp { - pins = "gpio_slp"; - function = "pin_fun1"; - }; - - rk817_slppin_pwrdn: rk817_slppin_pwrdn { - pins = "gpio_slp"; - function = "pin_fun2"; - }; - - rk817_slppin_rst: rk817_slppin_rst { - pins = "gpio_slp"; - function = "pin_fun3"; - }; - }; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_logic"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_gpu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - regulator-name = "vcc_ddr"; - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-init-microvolt = <900000>; - regulator-ramp-delay = <6001>; - regulator-initial-mode = <0x2>; - regulator-name = "vdd_npu"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-boot-on; - regulator-always-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_image"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda_0v9"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - regulator-name = "vdda0v9_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_acodec"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vccio_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-name = "vcc3v3_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_pmu"; - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcca1v8_image"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-name = "vcc_1v8"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc_3v3"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-always-on; - regulator-boot-on; - regulator-name = "vcc3v3_sd"; - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&mdio0 { - rgmii_phy0: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reset-gpios = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; - reset-assert-us = <20000>; - reset-deassert-us = <100000>; - reg = <0x0>; - }; -}; - -&pinctrl { - pmic { - pmic_int: pmic_int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - - soc_slppin_gpio: soc_slppin_gpio { - rockchip,pins = - <0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>; - }; - - soc_slppin_slp: soc_slppin_slp { - rockchip,pins = - <0 RK_PA2 1 &pcfg_pull_none>; - }; - - soc_slppin_rst: soc_slppin_rst { - rockchip,pins = - <0 RK_PA2 2 &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_otg_en: vcc5v0-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; }; &sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; no-sd; - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; partitions { compatible = "fixed-partitions"; @@ -483,18 +45,6 @@ }; &sdmmc0 { - max-frequency = <150000000>; - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - status = "okay"; - partitions { compatible = "fixed-partitions"; #address-cells = <2>; @@ -506,68 +56,3 @@ }; }; }; - -&uart2 { - status = "okay"; -}; - -&u2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy0_otg { - vbus-supply = <&vcc5v0_otg>; - status = "okay"; -}; - -&u2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&u2phy1_otg { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&combphy0_us { - status = "okay"; -}; - -&combphy1_usq { - status = "okay"; -}; -- cgit v1.2.3 From a99ebd13a9d7cb3c8347dae99a79e2eedf758ce4 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 10 Jun 2022 14:00:38 +0200 Subject: ARM: rockchip_v8_defconfig: Enable realtek phy The Rock3a board needs that for proper ethernet support, so enable it. Signed-off-by: Sascha Hauer --- arch/arm/configs/rockchip_v8_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/configs/rockchip_v8_defconfig b/arch/arm/configs/rockchip_v8_defconfig index 1c7116e74a..7fba31ddc3 100644 --- a/arch/arm/configs/rockchip_v8_defconfig +++ b/arch/arm/configs/rockchip_v8_defconfig @@ -90,6 +90,7 @@ CONFIG_OF_BAREBOX_DRIVERS=y CONFIG_DRIVER_SERIAL_NS16550=y CONFIG_DRIVER_NET_DESIGNWARE_EQOS=y CONFIG_DRIVER_NET_DESIGNWARE_ROCKCHIP=y +CONFIG_REALTEK_PHY=y CONFIG_SMSC_PHY=y CONFIG_NET_USB=y CONFIG_NET_USB_ASIX=y -- cgit v1.2.3 From abf0176728989d9df616f815691a3b352fd7f5d7 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 13 Jun 2022 09:07:42 +0200 Subject: arm: rockchip: radxa-rock3: register barebox update handler Register a barebox update handler on the eMMC card. Signed-off-by: Sascha Hauer --- arch/arm/boards/radxa-rock3/board.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boards/radxa-rock3/board.c b/arch/arm/boards/radxa-rock3/board.c index 05a526b06e..30ad594d0a 100644 --- a/arch/arm/boards/radxa-rock3/board.c +++ b/arch/arm/boards/radxa-rock3/board.c @@ -2,6 +2,7 @@ #include #include #include +#include struct rock3_model { const char *name; @@ -24,6 +25,9 @@ static int rock3_probe(struct device_d *dev) else of_device_enable_path("/chosen/environment-emmc"); + rk3568_bbu_mmc_register("emmc", BBU_HANDLER_FLAG_DEFAULT, + "/dev/mmc1"); + return 0; } -- cgit v1.2.3 From 4aee7037ffda8aa3b84d0482074f91c555473272 Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Wed, 15 Jun 2022 10:03:05 +0200 Subject: net: designware: rockchip: future-proof driver for more SoCs Linux driver has a struct rk_gmac_ops::regs_valid member to mark whether regs is populated or not. Population happens via a GCC extension that allows static initialization of flexible array members. Replace that with a pointer that is checked, so future SoC support just initializes it to NULL by default and avoid the OOB access. Signed-off-by: Ahmad Fatoum Link: https://lore.barebox.org/20220615080305.954879-1-a.fatoum@pengutronix.de Signed-off-by: Sascha Hauer --- drivers/net/designware_rockchip.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/designware_rockchip.c b/drivers/net/designware_rockchip.c index dcf65c9ad4..a3859dce0c 100644 --- a/drivers/net/designware_rockchip.c +++ b/drivers/net/designware_rockchip.c @@ -21,7 +21,7 @@ struct rk_gmac_ops { void (*set_rmii_speed)(struct eqos *eqos, int speed); void (*set_rgmii_speed)(struct eqos *eqos, int speed); void (*integrated_phy_powerup)(struct eqos *eqos); - u32 regs[]; + const u32 *regs; }; struct eqos_rk_gmac { @@ -175,7 +175,7 @@ static const struct rk_gmac_ops rk3568_ops = { .set_to_rmii = rk3568_set_to_rmii, .set_rmii_speed = rk3568_set_gmac_speed, .set_rgmii_speed = rk3568_set_gmac_speed, - .regs = { + .regs = (u32 []) { 0xfe2a0000, /* gmac0 */ 0xfe010000, /* gmac1 */ 0x0, /* sentinel */ @@ -253,7 +253,7 @@ static int eqos_init_rk_gmac(struct device_d *dev, struct eqos *eqos) priv->ops = device_get_match_data(dev); - if (dev->num_resources > 0) { + if (dev->num_resources > 0 && priv->ops->regs) { while (priv->ops->regs[i]) { if (priv->ops->regs[i] == dev->resource[0].start) { priv->bus_id = i; -- cgit v1.2.3 From be39fadd0462d874ad2d48dbc2312d2762e8fef6 Mon Sep 17 00:00:00 2001 From: Michael Riesch Date: Tue, 21 Jun 2022 10:36:37 +0200 Subject: arm: rockchip: radxa-rock3: enable deep probe support Enable deep probe support on the Radxa ROCK3 boards. Signed-off-by: Michael Riesch Link: https://lore.barebox.org/20220621083637.33660-1-michael.riesch@wolfvision.net Signed-off-by: Sascha Hauer --- arch/arm/boards/radxa-rock3/board.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boards/radxa-rock3/board.c b/arch/arm/boards/radxa-rock3/board.c index 30ad594d0a..aef5ec5df6 100644 --- a/arch/arm/boards/radxa-rock3/board.c +++ b/arch/arm/boards/radxa-rock3/board.c @@ -1,6 +1,7 @@ // SPDX-License-Identifier: GPL-2.0-only #include #include +#include #include #include @@ -50,3 +51,5 @@ static struct driver_d rock3_board_driver = { .of_compatible = rock3_of_match, }; coredevice_platform_driver(rock3_board_driver); + +BAREBOX_DEEP_PROBE_ENABLE(rock3_of_match); -- cgit v1.2.3