From a7d96488e5f56a2f77b2dfbc3efc01f8b76db920 Mon Sep 17 00:00:00 2001 From: Juergen Beisert Date: Thu, 8 Nov 2007 18:23:44 +0100 Subject: Using correct board names all over the place Signed-off-by: Juergen Beisert --- Documentation/boards.dox | 8 +- TODO | 7 + arch/arm/Kconfig | 16 +- arch/arm/Makefile | 4 +- arch/arm/configs/pcm037_defconfig | 156 +++++++++ arch/arm/configs/pcm038_defconfig | 160 +++++++++ arch/arm/configs/phyCORE-pcm038_defconfig | 160 --------- arch/arm/configs/phycore_imx31_defconfig | 156 --------- arch/arm/configs/scb9328_defconfig | 2 +- arch/ppc/Makefile | 2 +- arch/ppc/configs/pcm030_defconfig | 141 ++++++++ arch/ppc/configs/phycore_mpc5200b_tiny_defconfig | 141 -------- board/pcm030/Makefile | 2 + board/pcm030/mt46v32m16-75.h | 46 +++ board/pcm030/pcm030.c | 389 +++++++++++++++++++++ board/pcm030/pcm030.dox | 8 + board/pcm030/u-boot.lds.S | 141 ++++++++ board/pcm037/Makefile | 24 ++ board/pcm037/env/bin/init | 12 + board/pcm037/lowlevel_init.S | 113 ++++++ board/pcm037/pcm037.c | 151 ++++++++ board/pcm037/pcm037.dox | 11 + board/pcm038/Makefile | 3 + board/pcm038/lowlevel_init.S | 98 ++++++ board/pcm038/pcm038.c | 121 +++++++ board/pcm038/pcm038.dox | 8 + board/phycore_imx31/Makefile | 24 -- board/phycore_imx31/env/bin/init | 12 - board/phycore_imx31/lowlevel_init.S | 113 ------ board/phycore_imx31/phycore_imx31.c | 151 -------- board/phycore_imx31/phycore_imx31.dox | 11 - board/phycore_mpc5200b_tiny/Makefile | 2 - board/phycore_mpc5200b_tiny/mt46v32m16-75.h | 46 --- .../phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.c | 389 --------------------- .../phycore_mpc5200b_tiny.dox | 8 - board/phycore_mpc5200b_tiny/u-boot.lds.S | 141 -------- board/phycore_pcm038/Makefile | 3 - board/phycore_pcm038/lowlevel_init.S | 98 ------ board/phycore_pcm038/pcm038.c | 121 ------- board/phycore_pcm038/phycore_pcm038.dox | 8 - include/configs/pcm030.h | 111 ++++++ include/configs/pcm037.h | 44 +++ include/configs/pcm038.h | 6 + include/configs/phycore_imx31.h | 44 --- include/configs/phycore_mpc5200b_tiny.h | 111 ------ include/configs/phycore_pcm038.h | 6 - 46 files changed, 1768 insertions(+), 1761 deletions(-) create mode 100644 arch/arm/configs/pcm037_defconfig create mode 100644 arch/arm/configs/pcm038_defconfig delete mode 100644 arch/arm/configs/phyCORE-pcm038_defconfig delete mode 100644 arch/arm/configs/phycore_imx31_defconfig create mode 100644 arch/ppc/configs/pcm030_defconfig delete mode 100644 arch/ppc/configs/phycore_mpc5200b_tiny_defconfig create mode 100644 board/pcm030/Makefile create mode 100644 board/pcm030/mt46v32m16-75.h create mode 100644 board/pcm030/pcm030.c create mode 100644 board/pcm030/pcm030.dox create mode 100644 board/pcm030/u-boot.lds.S create mode 100644 board/pcm037/Makefile create mode 100644 board/pcm037/env/bin/init create mode 100644 board/pcm037/lowlevel_init.S create mode 100644 board/pcm037/pcm037.c create mode 100644 board/pcm037/pcm037.dox create mode 100644 board/pcm038/Makefile create mode 100644 board/pcm038/lowlevel_init.S create mode 100644 board/pcm038/pcm038.c create mode 100644 board/pcm038/pcm038.dox delete mode 100644 board/phycore_imx31/Makefile delete mode 100644 board/phycore_imx31/env/bin/init delete mode 100644 board/phycore_imx31/lowlevel_init.S delete mode 100644 board/phycore_imx31/phycore_imx31.c delete mode 100644 board/phycore_imx31/phycore_imx31.dox delete mode 100644 board/phycore_mpc5200b_tiny/Makefile delete mode 100644 board/phycore_mpc5200b_tiny/mt46v32m16-75.h delete mode 100644 board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.c delete mode 100644 board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.dox delete mode 100644 board/phycore_mpc5200b_tiny/u-boot.lds.S delete mode 100644 board/phycore_pcm038/Makefile delete mode 100644 board/phycore_pcm038/lowlevel_init.S delete mode 100644 board/phycore_pcm038/pcm038.c delete mode 100644 board/phycore_pcm038/phycore_pcm038.dox create mode 100644 include/configs/pcm030.h create mode 100644 include/configs/pcm037.h create mode 100644 include/configs/pcm038.h delete mode 100644 include/configs/phycore_imx31.h delete mode 100644 include/configs/phycore_mpc5200b_tiny.h delete mode 100644 include/configs/phycore_pcm038.h diff --git a/Documentation/boards.dox b/Documentation/boards.dox index 0db4257191..1cd5a3717a 100644 --- a/Documentation/boards.dox +++ b/Documentation/boards.dox @@ -1,15 +1,15 @@ /** @page supported_boards Supported Boards -This is a list of boards that are currently supported by U-Bootv2. +This is a list of boards that are currently supported by U-Boot-v2. PowerPC type: -- @subpage phycore_pcm030 +- @subpage pcm030 ARM type: -- @subpage phycore_imx31 -- @subpage phycore_pcm038 +- @subpage pcm037 +- @subpage pcm038 - @subpage scb9328 - @subpage netx diff --git a/TODO b/TODO index e8ca531a78..93261c4049 100644 --- a/TODO +++ b/TODO @@ -40,6 +40,13 @@ TODO but for memory mapped devices like nor flash we could provide a pointer to it. With this we would not have to copy uimages to memory. +[ ] setting a variable: + bla=500 -> OK + bla = 500 -> Unknown command 'bla' - try 'help' + bla= 500 -> Unknown command '500' - try 'help' + +[ ] command line editing is somewhat broken + DONE ---- diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b232276b3e..74eaa3bcd9 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -8,7 +8,7 @@ config ARCH_TEXT_BASE default 0x81f00000 if MACH_NXDB500 default 0x21e00000 if MACH_ECO920 default 0xa0000000 if MACH_PCM038 - default 0x87f00000 if MACH_IMX31 + default 0x87f00000 if MACH_PCM037 # # # @@ -19,10 +19,10 @@ config BOARDINFO default "Hilscher Netx nxdb500" if MACH_NXDB500 config BOARDINFO - default "Phytec Phycore MX27" if MACH_PCM038 + default "Phytec phyCORE-i.MX27" if MACH_PCM038 config BOARDINFO - default "Phytec Phycore i.MX31" if MACH_IMX31 + default "Phytec phyCORE-i.MX31" if MACH_PCM037 config BOARD_LINKER_SCRIPT bool @@ -91,11 +91,11 @@ config MACH_SCB9328 Say Y here if you are using the Synertronixx scb9328 board config MACH_PCM038 - bool "Phytec pcm038" + bool "phyCORE-i.MX27" select HAS_CFI select ARCH_IMX27 help - Say Y here if you are using the Phytec Phycore pcm038 equipped + Say Y here if you are using Phytec's phyCORE-i.MX27 (pcm038) equipped with a Freescale i.MX27 Processor config MACH_ECO920 @@ -114,11 +114,11 @@ config MACH_NXDB500 help Say Y here if you are using the Hilscher Netx nxdb500 board -config MACH_IMX31 - bool "Phytec i.MX31" +config MACH_PCM037 + bool "phyCORE-i.MX31" select ARCH_IMX31 help - Say Y here if your are using Phytec's pcm-mx31 equipped + Say Y here if your are using Phytec's phyCORE-i.MX31 (pcm037) equipped with a Freescale i.MX31 Processor endchoice diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 27e4432537..a1a4630a61 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -10,9 +10,9 @@ machine-$(CONFIG_ARCH_AT91RM9200) := at91rm9200 board-$(CONFIG_MACH_MX1ADS) := mx1ads board-$(CONFIG_MACH_ECO920) := eco920 board-$(CONFIG_MACH_SCB9328) := scb9328 -board-$(CONFIG_MACH_PCM038) := phycore_pcm038 +board-$(CONFIG_MACH_PCM038) := pcm038 board-$(CONFIG_MACH_NXDB500) := netx -board-$(CONFIG_MACH_IMX31) := phycore_imx31 +board-$(CONFIG_MACH_PCM037) := pcm037 # FIXME "cpu-y" never used on ARM! cpu-$(CONFIG_ARM920T) := arm920t cpu-$(CONFIG_ARM926EJS) := arm926ejs diff --git a/arch/arm/configs/pcm037_defconfig b/arch/arm/configs/pcm037_defconfig new file mode 100644 index 0000000000..29651d9918 --- /dev/null +++ b/arch/arm/configs/pcm037_defconfig @@ -0,0 +1,156 @@ +# +# Automatically generated make config: don't edit +# U-Boot version: 2.0.0-git +# Thu Oct 18 19:32:40 2007 +# +CONFIG_ARCH_TEXT_BASE=0x87f00000 +CONFIG_BOARDINFO="Phytec phyCORE-i.MX31" +# CONFIG_BOARD_LINKER_SCRIPT is not set +CONFIG_GENERIC_LINKER_SCRIPT=y +CONFIG_ARM=y +CONFIG_ARCH_IMX=y +CONFIG_ARCH_IMX31=y +# CONFIG_MACH_MX1ADS is not set +# CONFIG_MACH_SCB9328 is not set +# CONFIG_MACH_PCM038 is not set +# CONFIG_MACH_ECO920 is not set +# CONFIG_MACH_NXDB500 is not set +CONFIG_MACH_PCM037=y + +# +# Arm specific settings +# +CONFIG_CMDLINE_TAG=y +CONFIG_SETUP_MEMORY_TAGS=y +# CONFIG_INITRD_TAG is not set +CONFIG_GREGORIAN_CALENDER=y +CONFIG_HAS_KALLSYMS=y +CONFIG_HAS_MODULES=y + +# +# General Settings +# +CONFIG_TEXT_BASE=0x87f00000 +# CONFIG_BROKEN is not set +# CONFIG_EXPERIMENTAL is not set +CONFIG_PROMPT="uboot:" +CONFIG_BAUDRATE=115200 +CONFIG_CMDLINE_EDITING=y +# CONFIG_AUTO_COMPLETE is not set +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_MAXARGS=16 +CONFIG_SHELL_HUSH=y +# CONFIG_SHELL_SIMPLE is not set +CONFIG_PROMPT_HUSH_PS2="> " +CONFIG_DYNAMIC_CRC_TABLE=y +CONFIG_ERRNO_MESSAGES=y +CONFIG_TIMESTAMP=y +CONFIG_CONSOLE_ACTIVATE_FIRST=y +# CONFIG_OF_FLAT_TREE is not set +CONFIG_DEFAULT_ENVIRONMENT=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="board/pcm037/env" + +# +# Debugging +# +CONFIG_SKIP_LOWLEVEL_INIT=y +# CONFIG_ENABLE_FLASH_NOISE is not set +# CONFIG_ENABLE_PARTITION_NOISE is not set +# CONFIG_ENABLE_DEVICE_NOISE is not set + +# +# Commands +# + +# +# scripting +# +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_ENVIRONMENT=y +CONFIG_CMD_HELP=y + +# +# file commands +# +CONFIG_CMD_LS=y +CONFIG_CMD_RM=y +CONFIG_CMD_CAT=y +CONFIG_CMD_MKDIR=y +CONFIG_CMD_RMDIR=y +CONFIG_CMD_CP=y +CONFIG_CMD_PWD=y +CONFIG_CMD_CD=y +CONFIG_CMD_MOUNT=y +CONFIG_CMD_UMOUNT=y + +# +# console +# +CONFIG_CMD_CLEAR=y +CONFIG_CMD_ECHO=y + +# +# memory +# +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMORY=y +# CONFIG_CMD_CRC is not set +# CONFIG_CMD_MTEST is not set + +# +# flash +# +CONFIG_CMD_FLASH=y + +# +# booting +# +CONFIG_CMD_BOOTM=y +# CONFIG_CMD_BOOTM_ZLIB is not set +# CONFIG_CMD_BOOTM_BZLIB is not set +# CONFIG_CMD_BOOTM_SHOW_TYPE is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +# CONFIG_CMD_TIMEOUT is not set +CONFIG_CMD_PARTITION=y +CONFIG_CMD_TEST=y +CONFIG_NET=y +CONFIG_NET_BOOTP=y +CONFIG_NET_DHCP=y +# CONFIG_NET_RARP is not set +# CONFIG_NET_SNTP is not set +# CONFIG_NET_NFS is not set +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y + +# +# Drivers +# + +# +# serial drivers +# +CONFIG_DRIVER_SERIAL_IMX=y +CONFIG_MIIPHY=y + +# +# Network drivers +# +CONFIG_DRIVER_NET_SMC911X=y +CONFIG_DRIVER_NET_SMC911X_ADDRESS_SHIFT=0 + +# +# flash drivers +# +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_NEW is not set +CONFIG_CFI_BUFFER_WRITE=y +# CONFIG_NAND is not set + +# +# Filesystem support +# +# CONFIG_FS_CRAMFS is not set +CONFIG_CRC32=y diff --git a/arch/arm/configs/pcm038_defconfig b/arch/arm/configs/pcm038_defconfig new file mode 100644 index 0000000000..f9d2e95d5a --- /dev/null +++ b/arch/arm/configs/pcm038_defconfig @@ -0,0 +1,160 @@ +# +# Automatically generated make config: don't edit +# Linux kernel version: 2.0.0-git +# Thu Nov 8 16:52:09 2007 +# +CONFIG_ARCH_TEXT_BASE=0xa0000000 +CONFIG_BOARDINFO="Phytec phyCORE-i.MX27" +# CONFIG_BOARD_LINKER_SCRIPT is not set +CONFIG_GENERIC_LINKER_SCRIPT=y +CONFIG_ARM=y +CONFIG_ARM926EJS=y +CONFIG_ARCH_IMX=y +CONFIG_ARCH_IMX27=y +# CONFIG_MACH_MX1ADS is not set +# CONFIG_MACH_SCB9328 is not set +CONFIG_MACH_PCM038=y +# CONFIG_MACH_ECO920 is not set +# CONFIG_MACH_NXDB500 is not set +# CONFIG_MACH_PCM037 is not set + +# +# Arm specific settings +# +CONFIG_CMDLINE_TAG=y +CONFIG_SETUP_MEMORY_TAGS=y +# CONFIG_INITRD_TAG is not set +CONFIG_GREGORIAN_CALENDER=y +CONFIG_HAS_KALLSYMS=y +CONFIG_HAS_MODULES=y + +# +# General Settings +# +CONFIG_TEXT_BASE=0xa7f00000 +# CONFIG_BROKEN is not set +# CONFIG_EXPERIMENTAL is not set +CONFIG_PROMPT="uboot:" +CONFIG_BAUDRATE=115200 +CONFIG_CMDLINE_EDITING=y +# CONFIG_AUTO_COMPLETE is not set +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_MAXARGS=16 +CONFIG_SHELL_HUSH=y +# CONFIG_SHELL_SIMPLE is not set +CONFIG_PROMPT_HUSH_PS2="> " +CONFIG_DYNAMIC_CRC_TABLE=y +CONFIG_ERRNO_MESSAGES=y +CONFIG_TIMESTAMP=y +CONFIG_CONSOLE_ACTIVATE_FIRST=y +# CONFIG_OF_FLAT_TREE is not set +CONFIG_DEFAULT_ENVIRONMENT=y +CONFIG_DEFAULT_ENVIRONMENT_PATH="" + +# +# Debugging +# +# CONFIG_SKIP_LOWLEVEL_INIT is not set +# CONFIG_ENABLE_FLASH_NOISE is not set +# CONFIG_ENABLE_PARTITION_NOISE is not set +# CONFIG_ENABLE_DEVICE_NOISE is not set + +# +# Commands +# + +# +# scripting +# +CONFIG_CMD_EDIT=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_ENVIRONMENT=y +CONFIG_CMD_HELP=y +# CONFIG_CMD_READLINE is not set + +# +# file commands +# +CONFIG_CMD_LS=y +CONFIG_CMD_RM=y +CONFIG_CMD_CAT=y +CONFIG_CMD_MKDIR=y +CONFIG_CMD_RMDIR=y +CONFIG_CMD_CP=y +CONFIG_CMD_PWD=y +CONFIG_CMD_CD=y +CONFIG_CMD_MOUNT=y +CONFIG_CMD_UMOUNT=y + +# +# console +# +CONFIG_CMD_CLEAR=y +CONFIG_CMD_ECHO=y + +# +# memory +# +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMORY=y +CONFIG_CMD_CRC=y +CONFIG_CMD_MTEST=y +# CONFIG_CMD_MTEST_ALTERNATIVE is not set + +# +# flash +# +CONFIG_CMD_FLASH=y + +# +# booting +# +CONFIG_CMD_BOOTM=y +# CONFIG_CMD_BOOTM_ZLIB is not set +# CONFIG_CMD_BOOTM_BZLIB is not set +# CONFIG_CMD_BOOTM_SHOW_TYPE is not set +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_CMD_TIMEOUT=y +CONFIG_CMD_PARTITION=y +CONFIG_CMD_TEST=y +CONFIG_NET=y +CONFIG_NET_BOOTP=y +CONFIG_NET_DHCP=y +# CONFIG_NET_RARP is not set +# CONFIG_NET_SNTP is not set +# CONFIG_NET_NFS is not set +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y + +# +# Drivers +# + +# +# serial drivers +# +CONFIG_DRIVER_SERIAL_IMX=y +CONFIG_MIIPHY=y + +# +# Network drivers +# +# CONFIG_DRIVER_NET_SMC911X is not set +CONFIG_DRIVER_NET_IMX27=y + +# +# flash drivers +# +CONFIG_HAS_CFI=y +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_NEW is not set +CONFIG_CFI_BUFFER_WRITE=y +# CONFIG_NAND is not set + +# +# Filesystem support +# +# CONFIG_FS_CRAMFS is not set +CONFIG_CRC32=y diff --git a/arch/arm/configs/phyCORE-pcm038_defconfig b/arch/arm/configs/phyCORE-pcm038_defconfig deleted file mode 100644 index 347dbc9832..0000000000 --- a/arch/arm/configs/phyCORE-pcm038_defconfig +++ /dev/null @@ -1,160 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.0.0-git -# Thu Nov 8 16:52:09 2007 -# -CONFIG_ARCH_TEXT_BASE=0xa0000000 -CONFIG_BOARDINFO="Phytec Phycore MX27" -# CONFIG_BOARD_LINKER_SCRIPT is not set -CONFIG_GENERIC_LINKER_SCRIPT=y -CONFIG_ARM=y -CONFIG_ARM926EJS=y -CONFIG_ARCH_IMX=y -CONFIG_ARCH_IMX27=y -# CONFIG_MACH_MX1ADS is not set -# CONFIG_MACH_SCB9328 is not set -CONFIG_MACH_PCM038=y -# CONFIG_MACH_ECO920 is not set -# CONFIG_MACH_NXDB500 is not set -# CONFIG_MACH_IMX31 is not set - -# -# Arm specific settings -# -CONFIG_CMDLINE_TAG=y -CONFIG_SETUP_MEMORY_TAGS=y -# CONFIG_INITRD_TAG is not set -CONFIG_GREGORIAN_CALENDER=y -CONFIG_HAS_KALLSYMS=y -CONFIG_HAS_MODULES=y - -# -# General Settings -# -CONFIG_TEXT_BASE=0xa7f00000 -# CONFIG_BROKEN is not set -# CONFIG_EXPERIMENTAL is not set -CONFIG_PROMPT="uboot:" -CONFIG_BAUDRATE=115200 -CONFIG_CMDLINE_EDITING=y -# CONFIG_AUTO_COMPLETE is not set -CONFIG_LONGHELP=y -CONFIG_CBSIZE=1024 -CONFIG_MAXARGS=16 -CONFIG_SHELL_HUSH=y -# CONFIG_SHELL_SIMPLE is not set -CONFIG_PROMPT_HUSH_PS2="> " -CONFIG_DYNAMIC_CRC_TABLE=y -CONFIG_ERRNO_MESSAGES=y -CONFIG_TIMESTAMP=y -CONFIG_CONSOLE_ACTIVATE_FIRST=y -# CONFIG_OF_FLAT_TREE is not set -CONFIG_DEFAULT_ENVIRONMENT=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="" - -# -# Debugging -# -# CONFIG_SKIP_LOWLEVEL_INIT is not set -# CONFIG_ENABLE_FLASH_NOISE is not set -# CONFIG_ENABLE_PARTITION_NOISE is not set -# CONFIG_ENABLE_DEVICE_NOISE is not set - -# -# Commands -# - -# -# scripting -# -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_ENVIRONMENT=y -CONFIG_CMD_HELP=y -# CONFIG_CMD_READLINE is not set - -# -# file commands -# -CONFIG_CMD_LS=y -CONFIG_CMD_RM=y -CONFIG_CMD_CAT=y -CONFIG_CMD_MKDIR=y -CONFIG_CMD_RMDIR=y -CONFIG_CMD_CP=y -CONFIG_CMD_PWD=y -CONFIG_CMD_CD=y -CONFIG_CMD_MOUNT=y -CONFIG_CMD_UMOUNT=y - -# -# console -# -CONFIG_CMD_CLEAR=y -CONFIG_CMD_ECHO=y - -# -# memory -# -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMORY=y -CONFIG_CMD_CRC=y -CONFIG_CMD_MTEST=y -# CONFIG_CMD_MTEST_ALTERNATIVE is not set - -# -# flash -# -CONFIG_CMD_FLASH=y - -# -# booting -# -CONFIG_CMD_BOOTM=y -# CONFIG_CMD_BOOTM_ZLIB is not set -# CONFIG_CMD_BOOTM_BZLIB is not set -# CONFIG_CMD_BOOTM_SHOW_TYPE is not set -CONFIG_CMD_RESET=y -CONFIG_CMD_GO=y -CONFIG_CMD_TIMEOUT=y -CONFIG_CMD_PARTITION=y -CONFIG_CMD_TEST=y -CONFIG_NET=y -CONFIG_NET_BOOTP=y -CONFIG_NET_DHCP=y -# CONFIG_NET_RARP is not set -# CONFIG_NET_SNTP is not set -# CONFIG_NET_NFS is not set -CONFIG_NET_PING=y -CONFIG_NET_TFTP=y - -# -# Drivers -# - -# -# serial drivers -# -CONFIG_DRIVER_SERIAL_IMX=y -CONFIG_MIIPHY=y - -# -# Network drivers -# -# CONFIG_DRIVER_NET_SMC911X is not set -CONFIG_DRIVER_NET_IMX27=y - -# -# flash drivers -# -CONFIG_HAS_CFI=y -CONFIG_DRIVER_CFI=y -# CONFIG_DRIVER_CFI_NEW is not set -CONFIG_CFI_BUFFER_WRITE=y -# CONFIG_NAND is not set - -# -# Filesystem support -# -# CONFIG_FS_CRAMFS is not set -CONFIG_CRC32=y diff --git a/arch/arm/configs/phycore_imx31_defconfig b/arch/arm/configs/phycore_imx31_defconfig deleted file mode 100644 index 150e27db7c..0000000000 --- a/arch/arm/configs/phycore_imx31_defconfig +++ /dev/null @@ -1,156 +0,0 @@ -# -# Automatically generated make config: don't edit -# U-Boot version: 2.0.0-git -# Thu Oct 18 19:32:40 2007 -# -CONFIG_ARCH_TEXT_BASE=0x87f00000 -CONFIG_BOARDINFO="Phytec Phycore i.MX31" -# CONFIG_BOARD_LINKER_SCRIPT is not set -CONFIG_GENERIC_LINKER_SCRIPT=y -CONFIG_ARM=y -CONFIG_ARCH_IMX=y -CONFIG_ARCH_IMX31=y -# CONFIG_MACH_MX1ADS is not set -# CONFIG_MACH_SCB9328 is not set -# CONFIG_MACH_PCM038 is not set -# CONFIG_MACH_ECO920 is not set -# CONFIG_MACH_NXDB500 is not set -CONFIG_MACH_IMX31=y - -# -# Arm specific settings -# -CONFIG_CMDLINE_TAG=y -CONFIG_SETUP_MEMORY_TAGS=y -# CONFIG_INITRD_TAG is not set -CONFIG_GREGORIAN_CALENDER=y -CONFIG_HAS_KALLSYMS=y -CONFIG_HAS_MODULES=y - -# -# General Settings -# -CONFIG_TEXT_BASE=0x87f00000 -# CONFIG_BROKEN is not set -# CONFIG_EXPERIMENTAL is not set -CONFIG_PROMPT="uboot:" -CONFIG_BAUDRATE=115200 -CONFIG_CMDLINE_EDITING=y -# CONFIG_AUTO_COMPLETE is not set -CONFIG_LONGHELP=y -CONFIG_CBSIZE=1024 -CONFIG_MAXARGS=16 -CONFIG_SHELL_HUSH=y -# CONFIG_SHELL_SIMPLE is not set -CONFIG_PROMPT_HUSH_PS2="> " -CONFIG_DYNAMIC_CRC_TABLE=y -CONFIG_ERRNO_MESSAGES=y -CONFIG_TIMESTAMP=y -CONFIG_CONSOLE_ACTIVATE_FIRST=y -# CONFIG_OF_FLAT_TREE is not set -CONFIG_DEFAULT_ENVIRONMENT=y -CONFIG_DEFAULT_ENVIRONMENT_PATH="board/phycore_imx31/env" - -# -# Debugging -# -CONFIG_SKIP_LOWLEVEL_INIT=y -# CONFIG_ENABLE_FLASH_NOISE is not set -# CONFIG_ENABLE_PARTITION_NOISE is not set -# CONFIG_ENABLE_DEVICE_NOISE is not set - -# -# Commands -# - -# -# scripting -# -CONFIG_CMD_EDIT=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_ENVIRONMENT=y -CONFIG_CMD_HELP=y - -# -# file commands -# -CONFIG_CMD_LS=y -CONFIG_CMD_RM=y -CONFIG_CMD_CAT=y -CONFIG_CMD_MKDIR=y -CONFIG_CMD_RMDIR=y -CONFIG_CMD_CP=y -CONFIG_CMD_PWD=y -CONFIG_CMD_CD=y -CONFIG_CMD_MOUNT=y -CONFIG_CMD_UMOUNT=y - -# -# console -# -CONFIG_CMD_CLEAR=y -CONFIG_CMD_ECHO=y - -# -# memory -# -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMORY=y -# CONFIG_CMD_CRC is not set -# CONFIG_CMD_MTEST is not set - -# -# flash -# -CONFIG_CMD_FLASH=y - -# -# booting -# -CONFIG_CMD_BOOTM=y -# CONFIG_CMD_BOOTM_ZLIB is not set -# CONFIG_CMD_BOOTM_BZLIB is not set -# CONFIG_CMD_BOOTM_SHOW_TYPE is not set -CONFIG_CMD_RESET=y -CONFIG_CMD_GO=y -# CONFIG_CMD_TIMEOUT is not set -CONFIG_CMD_PARTITION=y -CONFIG_CMD_TEST=y -CONFIG_NET=y -CONFIG_NET_BOOTP=y -CONFIG_NET_DHCP=y -# CONFIG_NET_RARP is not set -# CONFIG_NET_SNTP is not set -# CONFIG_NET_NFS is not set -CONFIG_NET_PING=y -CONFIG_NET_TFTP=y - -# -# Drivers -# - -# -# serial drivers -# -CONFIG_DRIVER_SERIAL_IMX=y -CONFIG_MIIPHY=y - -# -# Network drivers -# -CONFIG_DRIVER_NET_SMC911X=y -CONFIG_DRIVER_NET_SMC911X_ADDRESS_SHIFT=0 - -# -# flash drivers -# -CONFIG_DRIVER_CFI=y -# CONFIG_DRIVER_CFI_NEW is not set -CONFIG_CFI_BUFFER_WRITE=y -# CONFIG_NAND is not set - -# -# Filesystem support -# -# CONFIG_FS_CRAMFS is not set -CONFIG_CRC32=y diff --git a/arch/arm/configs/scb9328_defconfig b/arch/arm/configs/scb9328_defconfig index ce329d3126..d674acb839 100644 --- a/arch/arm/configs/scb9328_defconfig +++ b/arch/arm/configs/scb9328_defconfig @@ -16,7 +16,7 @@ CONFIG_MACH_SCB9328=y # CONFIG_MACH_PCM038 is not set # CONFIG_MACH_ECO920 is not set # CONFIG_MACH_NXDB500 is not set -# CONFIG_MACH_IMX31 is not set +# CONFIG_MACH_PCM037 is not set # # Arm specific settings diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile index 3645a288df..ff528f2dbb 100644 --- a/arch/ppc/Makefile +++ b/arch/ppc/Makefile @@ -9,7 +9,7 @@ endif machine-$(CONFIG_ARCH_MPC5200) := mpc5200 -board-$(CONFIG_MACH_PHYCORE_MPC5200B_TINY) := phycore_mpc5200b_tiny +board-$(CONFIG_MACH_PHYCORE_MPC5200B_TINY) := pcm030 cpu-$(CONFIG_ARCH_MPC5200) := mpc5xxx TEXT_BASE = $(CONFIG_TEXT_BASE) diff --git a/arch/ppc/configs/pcm030_defconfig b/arch/ppc/configs/pcm030_defconfig new file mode 100644 index 0000000000..cd04e16f30 --- /dev/null +++ b/arch/ppc/configs/pcm030_defconfig @@ -0,0 +1,141 @@ +# +# Automatically generated make config: don't edit +# U-Boot version: 2.0.0-trunk +# Sun Jul 1 14:40:26 2007 +# +CONFIG_TEXT_BASE=0x1000000 +CONFIG_ARCH_MPC5200=y +CONFIG_MPC5200=y +CONFIG_CACHELINE_SIZE=32 +CONFIG_MACH_PHYCORE_MPC5200B_TINY=y +CONFIG_MACH_PHYCORE_MPC5200B_TINY_REV_1=y +CONFIG_GREGORIAN_CALENDER=y + +# +# General Settings +# +CONFIG_PROMPT="uboot:" +CONFIG_BAUDRATE=115200 +CONFIG_CMDLINE_EDITING=y +# CONFIG_AUTO_COMPLETE is not set +CONFIG_LONGHELP=y +CONFIG_CBSIZE=1024 +CONFIG_MAXARGS=16 +CONFIG_HUSH_PARSER=y +CONFIG_PROMPT_HUSH_PS2="> " +CONFIG_ZERO_BOOTDELAY_CHECK=y +CONFIG_ERRNO_MESSAGES=y +CONFIG_TIMESTAMP=y +CONFIG_CONSOLE_ACTIVATE_FIRST=y +CONFIG_OF_FLAT_TREE=y + +# +# Debugging +# + +# +# Commands +# + +# +# scripting +# +CONFIG_CMD_EDIT=y +CONFIG_CMD_EXEC=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_ENVIRONMENT=y +CONFIG_CMD_HELP=y + +# +# console +# +CONFIG_CMD_CLEAR=y +# CONFIG_CMD_CONSOLE is not set +CONFIG_CMD_ECHO=y +# CONFIG_CMD_SPLASH is not set + +# +# i2c +# +# CONFIG_CMD_I2C is not set + +# +# memory +# +# CONFIG_CMD_LOADB is not set +# CONFIG_CMD_LOADS is not set +CONFIG_CMD_MEMINFO=y +CONFIG_CMD_MEMORY=y +# CONFIG_CMD_MTEST is not set + +# +# network +# +# CONFIG_CMD_MII is not set + +# +# flash +# +CONFIG_CMD_FLASH=y + +# +# booting +# +CONFIG_CMD_BOOTM=y +CONFIG_CMD_BOOTM_ZLIB=y +CONFIG_CMD_BOOTM_BZLIB=y +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_NET=y +CONFIG_NET_BOOTP=y +CONFIG_NET_DHCP=y +# CONFIG_NET_RARP is not set +# CONFIG_NET_SNTP is not set +# CONFIG_NET_NFS is not set +CONFIG_NET_PING=y +CONFIG_NET_TFTP=y + +# +# Drivers +# + +# +# serial drivers +# +CONFIG_DRIVER_SERIAL_MPC5XXX=y +CONFIG_MIIPHY=y + +# +# Network drivers +# +CONFIG_DRIVER_NET_MPC5200=y + +# +# video drivers +# +# CONFIG_DRIVER_VIDEO_S1D13706 is not set + +# +# I2C drivers +# + +# +# USB host support +# + +# +# flash drivers +# +CONFIG_HAS_CFI=y +CONFIG_DRIVER_CFI=y +# CONFIG_DRIVER_CFI_NEW is not set +# CONFIG_CFI_BUFFER_WRITE is not set + +# +# Filesystem support +# +CONFIG_FS_CRAMFS=y +CONFIG_ZLIB=y +CONFIG_BZLIB=y +CONFIG_CRC32=y +CONFIG_DYNAMIC_CRC_TABLE=y diff --git a/arch/ppc/configs/phycore_mpc5200b_tiny_defconfig b/arch/ppc/configs/phycore_mpc5200b_tiny_defconfig deleted file mode 100644 index cd04e16f30..0000000000 --- a/arch/ppc/configs/phycore_mpc5200b_tiny_defconfig +++ /dev/null @@ -1,141 +0,0 @@ -# -# Automatically generated make config: don't edit -# U-Boot version: 2.0.0-trunk -# Sun Jul 1 14:40:26 2007 -# -CONFIG_TEXT_BASE=0x1000000 -CONFIG_ARCH_MPC5200=y -CONFIG_MPC5200=y -CONFIG_CACHELINE_SIZE=32 -CONFIG_MACH_PHYCORE_MPC5200B_TINY=y -CONFIG_MACH_PHYCORE_MPC5200B_TINY_REV_1=y -CONFIG_GREGORIAN_CALENDER=y - -# -# General Settings -# -CONFIG_PROMPT="uboot:" -CONFIG_BAUDRATE=115200 -CONFIG_CMDLINE_EDITING=y -# CONFIG_AUTO_COMPLETE is not set -CONFIG_LONGHELP=y -CONFIG_CBSIZE=1024 -CONFIG_MAXARGS=16 -CONFIG_HUSH_PARSER=y -CONFIG_PROMPT_HUSH_PS2="> " -CONFIG_ZERO_BOOTDELAY_CHECK=y -CONFIG_ERRNO_MESSAGES=y -CONFIG_TIMESTAMP=y -CONFIG_CONSOLE_ACTIVATE_FIRST=y -CONFIG_OF_FLAT_TREE=y - -# -# Debugging -# - -# -# Commands -# - -# -# scripting -# -CONFIG_CMD_EDIT=y -CONFIG_CMD_EXEC=y -CONFIG_CMD_SLEEP=y -CONFIG_CMD_ENVIRONMENT=y -CONFIG_CMD_HELP=y - -# -# console -# -CONFIG_CMD_CLEAR=y -# CONFIG_CMD_CONSOLE is not set -CONFIG_CMD_ECHO=y -# CONFIG_CMD_SPLASH is not set - -# -# i2c -# -# CONFIG_CMD_I2C is not set - -# -# memory -# -# CONFIG_CMD_LOADB is not set -# CONFIG_CMD_LOADS is not set -CONFIG_CMD_MEMINFO=y -CONFIG_CMD_MEMORY=y -# CONFIG_CMD_MTEST is not set - -# -# network -# -# CONFIG_CMD_MII is not set - -# -# flash -# -CONFIG_CMD_FLASH=y - -# -# booting -# -CONFIG_CMD_BOOTM=y -CONFIG_CMD_BOOTM_ZLIB=y -CONFIG_CMD_BOOTM_BZLIB=y -CONFIG_CMD_RESET=y -CONFIG_CMD_GO=y -CONFIG_NET=y -CONFIG_NET_BOOTP=y -CONFIG_NET_DHCP=y -# CONFIG_NET_RARP is not set -# CONFIG_NET_SNTP is not set -# CONFIG_NET_NFS is not set -CONFIG_NET_PING=y -CONFIG_NET_TFTP=y - -# -# Drivers -# - -# -# serial drivers -# -CONFIG_DRIVER_SERIAL_MPC5XXX=y -CONFIG_MIIPHY=y - -# -# Network drivers -# -CONFIG_DRIVER_NET_MPC5200=y - -# -# video drivers -# -# CONFIG_DRIVER_VIDEO_S1D13706 is not set - -# -# I2C drivers -# - -# -# USB host support -# - -# -# flash drivers -# -CONFIG_HAS_CFI=y -CONFIG_DRIVER_CFI=y -# CONFIG_DRIVER_CFI_NEW is not set -# CONFIG_CFI_BUFFER_WRITE is not set - -# -# Filesystem support -# -CONFIG_FS_CRAMFS=y -CONFIG_ZLIB=y -CONFIG_BZLIB=y -CONFIG_CRC32=y -CONFIG_DYNAMIC_CRC_TABLE=y diff --git a/board/pcm030/Makefile b/board/pcm030/Makefile new file mode 100644 index 0000000000..bc830dfb73 --- /dev/null +++ b/board/pcm030/Makefile @@ -0,0 +1,2 @@ +obj-y += pcm030.o +extra-y += u-boot.lds diff --git a/board/pcm030/mt46v32m16-75.h b/board/pcm030/mt46v32m16-75.h new file mode 100644 index 0000000000..4d191f1f91 --- /dev/null +++ b/board/pcm030/mt46v32m16-75.h @@ -0,0 +1,46 @@ +/* + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * Eric Schumann, Phytec Messtechnik + * adapted for mt46v32m16-75 DDR-RAM + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#define SDRAM_DDR 1 /* is DDR */ + +/* Settings for XLB = 132 MHz */ +#define SDRAM_MODE 0x018D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x715f0f00 +#define SDRAM_CONFIG1 0x73722930 +#define SDRAM_CONFIG2 0x47770000 + + +/* Settings for XLB = 99 MHz */ +/* +#define SDRAM_MODE 0x008D0000 +#define SDRAM_EMODE 0x40090000 +#define SDRAM_CONTROL 0x714b0f00 +#define SDRAM_CONFIG1 0x63611730 +#define SDRAM_CONFIG2 0x47670000 +*/ + +#define SDRAM_TAPDELAY 0x10000000 /* reserved Bit in MPC5200 B3-Step */ diff --git a/board/pcm030/pcm030.c b/board/pcm030/pcm030.c new file mode 100644 index 0000000000..39c3b76d91 --- /dev/null +++ b/board/pcm030/pcm030.c @@ -0,0 +1,389 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2004 + * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messtechnik GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_VIDEO_OPENIP +#include +#endif + +struct device_d cfi_dev = { + .name = "cfi_flash", + .id = "nor0", + + .map_base = 0xff000000, + .size = 16 * 1024 * 1024, +}; + +struct device_d sdram_dev = { + .name = "ram", + .id = "ram0", + + .map_base = 0x0, + .size = 64 * 1024 * 1024, + + .type = DEVICE_TYPE_DRAM, +}; + +struct device_d scratch_dev = { + .name = "ram", + .id = "scratch0", + .type = DEVICE_TYPE_DRAM, +}; + +static struct mpc5xxx_fec_platform_data fec_info = { + .xcv_type = MII100, +}; + +struct device_d eth_dev = { + .name = "fec_mpc5xxx", + .id = "eth0", + .map_base = MPC5XXX_FEC, + .platform_data = &fec_info, + .type = DEVICE_TYPE_ETHER, +}; + +#define SCRATCHMEM_SIZE (1024 * 1024 * 4) + +static int devices_init (void) +{ + register_device(&cfi_dev); + register_device(&sdram_dev); + register_device(ð_dev); + + scratch_dev.map_base = (unsigned long)sbrk_no_zero(SCRATCHMEM_SIZE); + scratch_dev.size = SCRATCHMEM_SIZE; + register_device(&scratch_dev); + + dev_add_partition(&cfi_dev, 0x00f00000, 0x40000, PARTITION_FIXED, "self"); + dev_add_partition(&cfi_dev, 0x00f60000, 0x20000, PARTITION_FIXED, "env"); + + return 0; +} + +device_initcall(devices_init); + +static struct device_d psc3 = { + .name = "mpc5xxx_serial", + .id = "psc3", + .map_base = MPC5XXX_PSC3, + .size = 4096, + .type = DEVICE_TYPE_CONSOLE, +}; + +static struct device_d psc6 = { + .name = "mpc5xxx_serial", + .id = "psc6", + .map_base = MPC5XXX_PSC6, + .size = 4096, + .type = DEVICE_TYPE_CONSOLE, +}; + +static int console_init(void) +{ + register_device(&psc3); + register_device(&psc6); + return 0; +} + +console_initcall(console_init); + +void *get_early_console_base(const char *name) +{ + if (!strcmp(name, RELOC("psc3"))) + return (void *)MPC5XXX_PSC3; + if (!strcmp(name, RELOC("psc6"))) + return (void *)MPC5XXX_PSC6; + return NULL; +} + +#include "mt46v32m16-75.h" + +static void sdram_start (int hi_addr) +{ + long hi_addr_bit = hi_addr ? 0x01000000 : 0; + + /* unlock mode register */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; + __asm__ volatile ("sync"); + +#if SDRAM_DDR + /* set mode register: extended mode */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE; + __asm__ volatile ("sync"); + + /* set mode register: reset DLL */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000; + __asm__ volatile ("sync"); +#endif + + /* precharge all banks */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* auto refresh */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit; + __asm__ volatile ("sync"); + + /* set mode register */ + *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; + __asm__ volatile ("sync"); + + /* normal operation */ + *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; + __asm__ volatile ("sync"); +} + +/* + * ATTENTION: Although partially referenced initdram does NOT make real use + * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE + * is something else than 0x00000000. + */ + +long int initdram (int board_type) +{ + ulong dramsize = 0; + ulong dramsize2 = 0; + + ulong test1, test2; + + if ((ulong)RELOC(initdram) > (2 << 30)) { + /* setup SDRAM chip selects */ + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */ + *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */ + __asm__ volatile ("sync"); + + /* setup config registers */ + *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; + *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; + __asm__ volatile ("sync"); + +#if SDRAM_DDR && SDRAM_TAPDELAY + /* set tap delay */ + *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY; + __asm__ volatile ("sync"); +#endif + + /* find RAM size using SDRAM CS0 only */ + sdram_start(0); + test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000); + sdram_start(1); + test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000); + if (test1 > test2) { + sdram_start(0); + dramsize = test1; + } else { + dramsize = test2; + } + + /* memory smaller than 1MB is impossible */ + if (dramsize < (1 << 20)) { + dramsize = 0; + } + + /* set SDRAM CS0 size according to the amount of RAM found */ + if (dramsize > 0) { + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1; + } else { + *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ + } + } else + puts(RELOC("skipping sdram initialization\n")); + + /* retrieve size of memory connected to SDRAM CS0 */ + dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; + if (dramsize >= 0x13) { + dramsize = (1 << (dramsize - 0x13)) << 20; + } else { + dramsize = 0; + } + + /* retrieve size of memory connected to SDRAM CS1 */ + dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF; + if (dramsize2 >= 0x13) { + dramsize2 = (1 << (dramsize2 - 0x13)) << 20; + } else { + dramsize2 = 0; + } + + return dramsize + dramsize2; +} + +#ifdef CONFIG_PCI +static struct pci_controller hose; + +extern void pci_mpc5xxx_init(struct pci_controller *); + +void pci_init_board(void) +{ + pci_mpc5xxx_init(&hose); +} +#endif + +#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) +void +ft_board_setup(void *blob, bd_t *bd) +{ + ft_cpu_setup(blob, bd); +} +#endif + +#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) + +#define GPIO_PSC2_4 0x02000000UL + +void init_ide_reset (void) +{ + debug ("init_ide_reset\n"); + + /* Configure PSC2_4 as GPIO output for ATA reset */ + *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC2_4; + *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC2_4; + /* Deassert reset */ + *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4; +} + +void ide_set_reset (int idereset) +{ + debug ("ide_reset(%d)\n", idereset); + + if (idereset) { + *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC2_4; + /* Make a delay. MPC5200 spec says 25 usec min */ + udelay(500000); + } else { + *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4; + } +} +#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */ + +#ifdef CONFIG_VIDEO_OPENIP + +#define DISPLAY_WIDTH 320 +#define DISPLAY_HEIGHT 240 + +#ifdef CONFIG_VIDEO_OPENIP_8BPP +#error CONFIG_VIDEO_OPENIP_8BPP not supported. +#endif /* CONFIG_VIDEO_OPENIP_8BPP */ + +#ifdef CONFIG_VIDEO_OPENIP_16BPP +#error CONFIG_VIDEO_OPENIP_16BPP not supported. +#endif /* CONFIG_VIDEO_OPENIP_16BPP */ +#ifdef CONFIG_VIDEO_OPENIP_32BPP + + + +static const SMI_REGS init_regs [] = +{ + {0x00008, 0x0248013f}, + {0x0000c, 0x021100f0}, + {0x00010, 0x018c0106}, + {0x00014, 0x00800000}, + {0x00018, 0x00800000}, + {0x00000, 0x00003701}, + {0, 0} +}; +#endif /* CONFIG_VIDEO_OPENIP_32BPP */ + +#ifdef CONFIG_CONSOLE_EXTRA_INFO +/* + * Return text to be printed besides the logo. + */ +void video_get_info_str (int line_number, char *info) +{ + if (line_number == 1) { + strcpy (info, " Board: phyCORE-MPC5200B tiny (Phytec Messtechnik GmbH)"); + } else if (line_number == 2) { + strcpy (info, " on a PCM-980 baseboard"); + } + else { + info [0] = '\0'; + } +} +#endif + +/* + * Returns OPENIP register base address. First thing called in the driver. + */ +unsigned int board_video_init (void) +{ +ulong dummy; +dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/ +dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/ + return OPENIP_MMIO_BASE; +} + +/* + * Returns OPENIP framebuffer address + */ +unsigned int board_video_get_fb (void) +{ + + return OPENIP_FB_BASE; +} + +/* + * Called after initializing the OPENIP and before clearing the screen. + */ +void board_validate_screen (unsigned int base) +{ +} + +/* + * Return a pointer to the initialization sequence. + */ +const SMI_REGS *board_get_regs (void) +{ + return init_regs; +} + +int board_get_width (void) +{ + return DISPLAY_WIDTH; +} + +int board_get_height (void) +{ + return DISPLAY_HEIGHT; +} + +#endif /* CONFIG_VIDEO_OPENIP */ diff --git a/board/pcm030/pcm030.dox b/board/pcm030/pcm030.dox new file mode 100644 index 0000000000..b9ada839f2 --- /dev/null +++ b/board/pcm030/pcm030.dox @@ -0,0 +1,8 @@ +/** @page pcm030 Phytec's phyCORE-MPC5200B-tiny + +This CPU card is based on a Freescale MPC5200B CPU. The card is shipped with: + +- up to 16MiB NOR type Flash Memory +- 64MiB synchronous dynamic RAM + +*/ diff --git a/board/pcm030/u-boot.lds.S b/board/pcm030/u-boot.lds.S new file mode 100644 index 0000000000..1d7ce706d2 --- /dev/null +++ b/board/pcm030/u-boot.lds.S @@ -0,0 +1,141 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +OUTPUT_ARCH("powerpc") +/* Do we need any of these for elf? + __DYNAMIC = 0; */ +SECTIONS +{ + . = TEXT_BASE; + _text = .; + _stext = .; + /* Read-only sections, merged into text segment: */ + . = . + SIZEOF_HEADERS; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .rel.text : { *(.rel.text) } + .rela.text : { *(.rela.text) } + .rel.data : { *(.rel.data) } + .rela.data : { *(.rela.data) } + .rel.rodata : { *(.rel.rodata) } + .rela.rodata : { *(.rela.rodata) } + .rel.got : { *(.rel.got) } + .rela.got : { *(.rela.got) } + .rel.ctors : { *(.rel.ctors) } + .rela.ctors : { *(.rela.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rela.dtors : { *(.rela.dtors) } + .rel.bss : { *(.rel.bss) } + .rela.bss : { *(.rela.bss) } + .rel.plt : { *(.rel.plt) } + .rela.plt : { *(.rela.plt) } + .init : { *(.init) } + .plt : { *(.plt) } + .text : + { + arch/ppc/mach-mpc5xxx/start.o (.text) + *(.text) + *(.got1) + . = ALIGN(16); + *(.rodata) + *(.rodata1) + *(.rodata.str1.4) + } + .fini : { *(.fini) } =0 + .ctors : { *(.ctors) } + .dtors : { *(.dtors) } + + /* Read-write section, merged into data segment: */ + . = (. + 0x0FFF) & 0xFFFFF000; + _etext = .; + PROVIDE (erotext = .); + .reloc : + { + *(.got) + _GOT2_TABLE_ = .; + *(.got2) + _FIXUP_TABLE_ = .; + *(.fixup) + } + __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; + __fixup_entries = (. - _FIXUP_TABLE_) >> 2; + + + .data : + { + *(.data) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } + _edata = .; + PROVIDE (edata = .); + + . = .; + __u_boot_cmd_start = .; + .u_boot_cmd : { U_BOOT_CMDS } + __u_boot_cmd_end = .; + + __u_boot_initcalls_start = .; + .u_boot_initcalls : { INITCALLS } + __u_boot_initcalls_end = .; + __initcall_entries = (__u_boot_initcalls_end - __u_boot_initcalls_start) >> 2; + + __usymtab_start = .; + __usymtab : { U_BOOT_SYMS } + __usymtab_end = .; + + __early_init_data_begin = .; + .early_init_data : { *(.early_init_data) } + __early_init_data_end = .; + + __start___ex_table = .; + __ex_table : { *(__ex_table) } + __stop___ex_table = .; + + . = ALIGN(4096); + __init_begin = .; + .text.init : { *(.text.init) } + .data.init : { *(.data.init) } + . = ALIGN(4096); + __init_end = .; + + __init_size = __init_end - _start; + + __bss_start = .; + .bss : + { + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss) + *(COMMON) + } + _end = . ; + PROVIDE (end = .); +} diff --git a/board/pcm037/Makefile b/board/pcm037/Makefile new file mode 100644 index 0000000000..7d36b77df0 --- /dev/null +++ b/board/pcm037/Makefile @@ -0,0 +1,24 @@ +# +# (C) Copyright 2007 Juergen Beisert +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +obj-y += lowlevel_init.o +obj-y += pcm037.o diff --git a/board/pcm037/env/bin/init b/board/pcm037/env/bin/init new file mode 100644 index 0000000000..b75a9af2df --- /dev/null +++ b/board/pcm037/env/bin/init @@ -0,0 +1,12 @@ +# +# setup the partitions in the main flash +# +nor_parts="nor0:128k(uboot),128k(env),2M(kernel),-(jffs2)" +addpart $nor_parts + +# +# setup default ethernet address +# +eth0.ethaddr=80:81:82:83:84:85 + +echo "System is up and running" diff --git a/board/pcm037/lowlevel_init.S b/board/pcm037/lowlevel_init.S new file mode 100644 index 0000000000..12fe5fa7ef --- /dev/null +++ b/board/pcm037/lowlevel_init.S @@ -0,0 +1,113 @@ +/* + * + * (c) 2007 Pengutronix, Sascha Hauer + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +.macro REG reg, val + ldr r2, =\reg + ldr r3, =\val + str r3, [r2] +.endm + +.macro REG8 reg, val + ldr r2, =\reg + ldr r3, =\val + strb r3, [r2] +.endm + +.macro DELAY loops + ldr r2, =\loops +1: + subs r2, r2, #1 + nop + bcs 1b +.endm + +.globl board_init_lowlevel +board_init_lowlevel: + + REG IPU_CONF, IPU_CONF_DI_EN + REG CCM_CCMR, 0x074B0BF5 + + DELAY 0x40000 + + REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE + REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS + + REG CCM_PDR0, PDR0_CSI_PODF(0xff1) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) | PDR0_MCU_PODF(0) + + REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0xe) | PLL_MFI(9) | PLL_MFN(0xd) + + REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1) + + /* Skip SDRAM initialization if we run from RAM */ + cmp pc, #0x80000000 + bls 1f + cmp pc, #0x90000000 + bhi 1f + + mov pc, lr + +1: + REG 0x43FAC26C, 0 /* SDCLK */ + REG 0x43FAC270, 0 /* CAS */ + REG 0x43FAC274, 0 /* RAS */ + REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ + REG 0x43FAC284, 0 /* DQM3 */ + REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ + REG 0x43FAC28C, 0 + REG 0x43FAC290, 0 + REG 0x43FAC294, 0 + REG 0x43FAC298, 0 + REG 0x43FAC29C, 0 + REG 0x43FAC2A0, 0 + REG 0x43FAC2A4, 0 + REG 0x43FAC2A8, 0 + REG 0x43FAC2AC, 0 + REG 0x43FAC2B0, 0 + REG 0x43FAC2B4, 0 + REG 0x43FAC2B8, 0 + REG 0x43FAC2BC, 0 + REG 0x43FAC2C0, 0 + REG 0x43FAC2C4, 0 + REG 0x43FAC2C8, 0 + REG 0x43FAC2CC, 0 + REG 0x43FAC2D0, 0 + REG 0x43FAC2D4, 0 + REG 0x43FAC2D8, 0 + REG 0x43FAC2DC, 0 + REG 0xB8001010, 0x00000004 + REG 0xB8001004, 0x006ac73a + REG 0xB8001000, 0x92100000 + REG 0x80000f00, 0x12344321 + REG 0xB8001000, 0xa2100000 + REG 0x80000000, 0x12344321 + REG 0x80000000, 0x12344321 + REG 0xB8001000, 0xb2100000 + REG8 0x80000033, 0xda + REG8 0x81000000, 0xff + REG 0xB8001000, 0x82226080 + REG 0x80000000, 0xDEADBEEF + REG 0xB8001010, 0x0000000c + + mov pc, lr diff --git a/board/pcm037/pcm037.c b/board/pcm037/pcm037.c new file mode 100644 index 0000000000..8f39e42d63 --- /dev/null +++ b/board/pcm037/pcm037.c @@ -0,0 +1,151 @@ +/* + * (C) 2007 Pengutronix, Sascha Hauer + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + * Board support for Phytec's, i.MX31 based CPU card, called: PCM037 + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * Up to 64MiB NOR type flash, connected to + * CS line 0, data width is 16 bit + */ +static struct device_d cfi_dev = { + .name = "cfi_flash", + .id = "nor0", + .map_base = IMX_CS0_BASE, + .size = IMX_CS0_RANGE, /* area size */ +}; + +/* + * up to 2MiB static RAM type memory, connected + * to CS4, data width is 16 bit + */ +static struct device_d sram_dev = { + .name = "sram", + .id = "sram0", + .map_base = IMX_CS4_BASE, + .size = IMX_CS4_RANGE, /* area size */ +}; + +/* + * ?MiB NAND type flash, data width 8 bit + */ +static struct device_d nand_dev = { + .name = "cfi_flash_nand", + .id = "nand0", + .map_base = 0x10000000, /* FIXME */ + .size = 16 * 1024 * 1024, /* FIXME */ +}; + +/* + * SMSC 9217 network controller + * connected to CS line 1 and interrupt line + * GPIO3, data width is 16 bit + */ +static struct device_d network_dev = { + .name = "smc911x", + .id = "eth0", + .map_base = IMX_CS1_BASE, + .size = IMX_CS1_RANGE, /* area size */ + .type = DEVICE_TYPE_ETHER, +}; + +/* + * 128MiB of SDRAM, data width is 32 bit + */ +static struct device_d sdram_dev = { + .name = "ram", + .id = "ram0", + + .map_base = IMX_SDRAM_CS0, + .size = 128 * 1024 * 1024, /* fix size */ + + .type = DEVICE_TYPE_DRAM, +}; + +static int imx31_devices_init(void) +{ + __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */ + __REG(CSCR_L(0)) = 0x10000d03; + __REG(CSCR_A(0)) = 0x00720900; + + __REG(CSCR_U(1)) = 0x0000df06; /* CS1: Network Controller */ + __REG(CSCR_L(1)) = 0x444a4541; + __REG(CSCR_A(1)) = 0x44443302; + + __REG(CSCR_U(4)) = 0x0000d843; /* CS4: SRAM */ + __REG(CSCR_L(4)) = 0x22252521; + __REG(CSCR_A(4)) = 0x22220a00; + + /* setup pins for I2C2 (for EEPROM, RTC) */ + imx_gpio_mode(MUX_CSPI2_MOSI_I2C2_SCL); + imx_gpio_mode(MUX_CSPI2_MISO_I2C2_SCL); + + register_device(&cfi_dev); + + /* + * Create partitions that should be + * not touched by any regular user + */ + dev_add_partition(&cfi_dev, 0x00000, 0x20000, PARTITION_FIXED, "self"); /* ourself */ + dev_add_partition(&cfi_dev, 0x20000, 0x20000, PARTITION_FIXED, "env"); /* environment */ + dev_protect(&cfi_dev, 0x20000, 0, 1); + + register_device(&sram_dev); + register_device(&nand_dev); + register_device(&network_dev); + + register_device(&sdram_dev); + + return 0; +} + +device_initcall(imx31_devices_init); + +static struct device_d imx31_serial_device = { + .name = "imx_serial", + .id = "cs0", + .map_base = IMX_UART1_BASE, + .size = 16 * 1024, + .type = DEVICE_TYPE_CONSOLE, +}; + +static int imx31_console_init(void) +{ + /* init gpios for serial port */ + imx_gpio_mode(MUX_RXD1_UART1_RXD_MUX); + imx_gpio_mode(MUX_TXD1_UART1_TXD_MUX); + imx_gpio_mode(MUX_RTS1_UART1_RTS_B); + imx_gpio_mode(MUX_RTS1_UART1_CTS_B); + + register_device(&imx31_serial_device); + return 0; +} + +console_initcall(imx31_console_init); diff --git a/board/pcm037/pcm037.dox b/board/pcm037/pcm037.dox new file mode 100644 index 0000000000..b2afdd6acd --- /dev/null +++ b/board/pcm037/pcm037.dox @@ -0,0 +1,11 @@ +/** @page pcm037 Phytec's phyCORE-i.MX31 + +This CPU card is based on a Freescale i.MX31 CPU. The card is shipped with: + +- up to 64MiB NOR type Flash Memory +- up to 2MiB static RAM +- 64MiB NAND type Flash Memory +- SMSC 9217 network controller +- 128MiB synchronous dynamic RAM + +*/ diff --git a/board/pcm038/Makefile b/board/pcm038/Makefile new file mode 100644 index 0000000000..6082b2d657 --- /dev/null +++ b/board/pcm038/Makefile @@ -0,0 +1,3 @@ + +obj-y += lowlevel_init.o +obj-y += pcm038.o diff --git a/board/pcm038/lowlevel_init.S b/board/pcm038/lowlevel_init.S new file mode 100644 index 0000000000..fc65b902b6 --- /dev/null +++ b/board/pcm038/lowlevel_init.S @@ -0,0 +1,98 @@ +#include +#include + +#define writel(val, reg) \ + ldr r0, =reg; \ + ldr r1, =val; \ + str r1, [r0]; + +#define CRM_PLL_PCTL_PARAM(pd, fd, fi, fn) (((pd-1)<<26) + ((fd-1)<<16) + (fi<<10) + (fn<<0)) + +.globl board_init_lowlevel +board_init_lowlevel: + + mov r10, lr + + /* + * AHB-Lite IP Interface + */ + writel(0x20040304, AIPI1_PSR0) + writel(0xDFFBFCFB, AIPI1_PSR1) + writel(0x00000000, AIPI2_PSR0) + writel(0xFFFFFFFF, AIPI2_PSR1) + + ldr r0, =CSCR + ldr r1, [r0] + bic r1, r1, #0x3 + str r1, [r0] + + writel(0x00041c02, MPCTL0) + writel(0x04082008, SPCTL0) + + writel(0x33f00304, CSCR) + writel(0x33f00300 | CSCR_FPM_EN | CSCR_MPEN | CSCR_SPEN | CSCR_MCU_SEL | + CSCR_SP_SEL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART | + 0 , + CSCR) + + /* add some delay here */ + mov r1, #0x1000 +1: subs r1, r1, #0x1 + bne 1b + + writel(0x33f00300 | CSCR_FPM_EN | CSCR_MPEN | CSCR_SPEN | CSCR_MCU_SEL | + CSCR_SP_SEL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART | + CSCR_ARM_SRC_MPLL, + CSCR) + + writel(0x00070f08, GPCR) + + writel(0x130410c3, PCDR0) + writel(0x09030913, PCDR1) + + /* skip sdram setup for debugging */ + mov pc,r10 + + /* Skip SDRAM initialization if we run from RAM */ + cmp pc, #0xa0000000 + bls 1f + cmp pc, #0xc0000000 + bhi 1f + + mov pc,r10 + +1: + /* + * DDR on CSD0 + */ + writel(0x00000008, 0xD8001010) + writel(0x55555555, 0x10027828) + writel(0x55555555, 0x10027830) + writel(0x55555555, 0x10027834) + writel(0x00005005, 0x10027838) + writel(0x15555555, 0x1002783C) + writel(0x00000004, 0xD8001010) + writel(0x006ac73a, 0xD8001004) + writel(0x92100000, 0xD8001000) + writel(0x00000000, 0xA0000F00) + writel(0xA2100000, 0xD8001000) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0xA2200000, 0xD8001000) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0x00000000, 0xA0000F00) + writel(0xb2100000, 0xD8001000) + ldr r0, =0xA0000033 + mov r1, #0xda + strb r1, [r0] + ldr r0, =0xA1000000 + mov r1, #0xff + strb r1, [r0] + writel(0x82226080, 0xD8001000) + + mov pc,r10 + diff --git a/board/pcm038/pcm038.c b/board/pcm038/pcm038.c new file mode 100644 index 0000000000..99cbc5eec4 --- /dev/null +++ b/board/pcm038/pcm038.c @@ -0,0 +1,121 @@ +/* + * Copyright (C) 2007 Sascha Hauer, Pengutronix + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct device_d cfi_dev = { + .name = "cfi_flash", + .id = "nor0", + + .map_base = 0xC0000000, + .size = 32 * 1024 * 1024, +}; + +static struct device_d sdram_dev = { + .name = "ram", + .id = "ram0", + + .map_base = 0xa0000000, + .size = 128 * 1024 * 1024, + + .type = DEVICE_TYPE_DRAM, +}; + +static struct fec_platform_data fec_info = { + .xcv_type = MII100, +}; + +static struct device_d fec_dev = { + .name = "fec_imx27", + .id = "eth0", + .map_base = 0x1002b000, + .platform_data = &fec_info, + .type = DEVICE_TYPE_ETHER, +}; + +static int pcm038_devices_init(void) +{ + int i; + unsigned int mode[] = { + PD0_AIN_FEC_TXD0, + PD1_AIN_FEC_TXD1, + PD2_AIN_FEC_TXD2, + PD3_AIN_FEC_TXD3, + PD4_AOUT_FEC_RX_ER, + PD5_AOUT_FEC_RXD1, + PD6_AOUT_FEC_RXD2, + PD7_AOUT_FEC_RXD3, + PD8_AF_FEC_MDIO, + PD9_AIN_FEC_MDC | GPIO_PUEN, + PD10_AOUT_FEC_CRS, + PD11_AOUT_FEC_TX_CLK, + PD12_AOUT_FEC_RXD0, + PD13_AOUT_FEC_RX_DV, + PD14_AOUT_FEC_CLR, + PD15_AOUT_FEC_COL, + PD16_AIN_FEC_TX_ER, + PF23_AIN_FEC_TX_EN, + PE12_PF_UART1_TXD, + PE13_PF_UART1_RXD, + PE14_PF_UART1_CTS, + PE15_PF_UART1_RTS }; + + for (i = 0; i < sizeof(mode) / sizeof(int); i++) + imx_gpio_mode(mode[i]); + + register_device(&cfi_dev); + register_device(&sdram_dev); + register_device(&fec_dev); + + dev_add_partition(&cfi_dev, 0x00000, 0x20000, PARTITION_FIXED, "self"); + dev_add_partition(&cfi_dev, 0x40000, 0x20000, PARTITION_FIXED, "env"); + dev_protect(&cfi_dev, 0x20000, 0, 1); + + return 0; +} + +device_initcall(pcm038_devices_init); + +static struct device_d pcm038_serial_device = { + .name = "imx_serial", + .id = "cs0", + .map_base = IMX_UART1_BASE, + .size = 4096, + .type = DEVICE_TYPE_CONSOLE, +}; + +static int pcm038_console_init(void) +{ + register_device(&pcm038_serial_device); + return 0; +} + +console_initcall(pcm038_console_init); + diff --git a/board/pcm038/pcm038.dox b/board/pcm038/pcm038.dox new file mode 100644 index 0000000000..9b17674a21 --- /dev/null +++ b/board/pcm038/pcm038.dox @@ -0,0 +1,8 @@ +/** @page pcm038 Phytec's phyCORE-i.MX27 + +This CPU card is based on a Freescale i.MX27 CPU. The card is shipped with: + +- up to 32MiB NOR type Flash Memory +- 32MiB synchronous dynamic RAM + +*/ diff --git a/board/phycore_imx31/Makefile b/board/phycore_imx31/Makefile deleted file mode 100644 index f2dbdb61b8..0000000000 --- a/board/phycore_imx31/Makefile +++ /dev/null @@ -1,24 +0,0 @@ -# -# (C) Copyright 2007 Juergen Beisert -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -obj-y += lowlevel_init.o -obj-y += phycore_imx31.o diff --git a/board/phycore_imx31/env/bin/init b/board/phycore_imx31/env/bin/init deleted file mode 100644 index b75a9af2df..0000000000 --- a/board/phycore_imx31/env/bin/init +++ /dev/null @@ -1,12 +0,0 @@ -# -# setup the partitions in the main flash -# -nor_parts="nor0:128k(uboot),128k(env),2M(kernel),-(jffs2)" -addpart $nor_parts - -# -# setup default ethernet address -# -eth0.ethaddr=80:81:82:83:84:85 - -echo "System is up and running" diff --git a/board/phycore_imx31/lowlevel_init.S b/board/phycore_imx31/lowlevel_init.S deleted file mode 100644 index 12fe5fa7ef..0000000000 --- a/board/phycore_imx31/lowlevel_init.S +++ /dev/null @@ -1,113 +0,0 @@ -/* - * - * (c) 2007 Pengutronix, Sascha Hauer - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -.macro REG reg, val - ldr r2, =\reg - ldr r3, =\val - str r3, [r2] -.endm - -.macro REG8 reg, val - ldr r2, =\reg - ldr r3, =\val - strb r3, [r2] -.endm - -.macro DELAY loops - ldr r2, =\loops -1: - subs r2, r2, #1 - nop - bcs 1b -.endm - -.globl board_init_lowlevel -board_init_lowlevel: - - REG IPU_CONF, IPU_CONF_DI_EN - REG CCM_CCMR, 0x074B0BF5 - - DELAY 0x40000 - - REG CCM_CCMR, 0x074B0BF5 | CCMR_MPE - REG CCM_CCMR, (0x074B0BF5 | CCMR_MPE) & ~CCMR_MDS - - REG CCM_PDR0, PDR0_CSI_PODF(0xff1) | PDR0_PER_PODF(7) | PDR0_HSP_PODF(3) | PDR0_NFC_PODF(5) | PDR0_IPG_PODF(1) | PDR0_MAX_PODF(3) | PDR0_MCU_PODF(0) - - REG CCM_MPCTL, PLL_PD(0) | PLL_MFD(0xe) | PLL_MFI(9) | PLL_MFN(0xd) - - REG CCM_SPCTL, PLL_PD(1) | PLL_MFD(0x43) | PLL_MFI(12) | PLL_MFN(1) - - /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0x80000000 - bls 1f - cmp pc, #0x90000000 - bhi 1f - - mov pc, lr - -1: - REG 0x43FAC26C, 0 /* SDCLK */ - REG 0x43FAC270, 0 /* CAS */ - REG 0x43FAC274, 0 /* RAS */ - REG 0x43FAC27C, 0x1000 /* CS2 CSD0) */ - REG 0x43FAC284, 0 /* DQM3 */ - REG 0x43FAC288, 0 /* DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 0x288..0x2DC) */ - REG 0x43FAC28C, 0 - REG 0x43FAC290, 0 - REG 0x43FAC294, 0 - REG 0x43FAC298, 0 - REG 0x43FAC29C, 0 - REG 0x43FAC2A0, 0 - REG 0x43FAC2A4, 0 - REG 0x43FAC2A8, 0 - REG 0x43FAC2AC, 0 - REG 0x43FAC2B0, 0 - REG 0x43FAC2B4, 0 - REG 0x43FAC2B8, 0 - REG 0x43FAC2BC, 0 - REG 0x43FAC2C0, 0 - REG 0x43FAC2C4, 0 - REG 0x43FAC2C8, 0 - REG 0x43FAC2CC, 0 - REG 0x43FAC2D0, 0 - REG 0x43FAC2D4, 0 - REG 0x43FAC2D8, 0 - REG 0x43FAC2DC, 0 - REG 0xB8001010, 0x00000004 - REG 0xB8001004, 0x006ac73a - REG 0xB8001000, 0x92100000 - REG 0x80000f00, 0x12344321 - REG 0xB8001000, 0xa2100000 - REG 0x80000000, 0x12344321 - REG 0x80000000, 0x12344321 - REG 0xB8001000, 0xb2100000 - REG8 0x80000033, 0xda - REG8 0x81000000, 0xff - REG 0xB8001000, 0x82226080 - REG 0x80000000, 0xDEADBEEF - REG 0xB8001010, 0x0000000c - - mov pc, lr diff --git a/board/phycore_imx31/phycore_imx31.c b/board/phycore_imx31/phycore_imx31.c deleted file mode 100644 index 8f39e42d63..0000000000 --- a/board/phycore_imx31/phycore_imx31.c +++ /dev/null @@ -1,151 +0,0 @@ -/* - * (C) 2007 Pengutronix, Sascha Hauer - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * Board support for Phytec's, i.MX31 based CPU card, called: PCM037 - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * Up to 64MiB NOR type flash, connected to - * CS line 0, data width is 16 bit - */ -static struct device_d cfi_dev = { - .name = "cfi_flash", - .id = "nor0", - .map_base = IMX_CS0_BASE, - .size = IMX_CS0_RANGE, /* area size */ -}; - -/* - * up to 2MiB static RAM type memory, connected - * to CS4, data width is 16 bit - */ -static struct device_d sram_dev = { - .name = "sram", - .id = "sram0", - .map_base = IMX_CS4_BASE, - .size = IMX_CS4_RANGE, /* area size */ -}; - -/* - * ?MiB NAND type flash, data width 8 bit - */ -static struct device_d nand_dev = { - .name = "cfi_flash_nand", - .id = "nand0", - .map_base = 0x10000000, /* FIXME */ - .size = 16 * 1024 * 1024, /* FIXME */ -}; - -/* - * SMSC 9217 network controller - * connected to CS line 1 and interrupt line - * GPIO3, data width is 16 bit - */ -static struct device_d network_dev = { - .name = "smc911x", - .id = "eth0", - .map_base = IMX_CS1_BASE, - .size = IMX_CS1_RANGE, /* area size */ - .type = DEVICE_TYPE_ETHER, -}; - -/* - * 128MiB of SDRAM, data width is 32 bit - */ -static struct device_d sdram_dev = { - .name = "ram", - .id = "ram0", - - .map_base = IMX_SDRAM_CS0, - .size = 128 * 1024 * 1024, /* fix size */ - - .type = DEVICE_TYPE_DRAM, -}; - -static int imx31_devices_init(void) -{ - __REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */ - __REG(CSCR_L(0)) = 0x10000d03; - __REG(CSCR_A(0)) = 0x00720900; - - __REG(CSCR_U(1)) = 0x0000df06; /* CS1: Network Controller */ - __REG(CSCR_L(1)) = 0x444a4541; - __REG(CSCR_A(1)) = 0x44443302; - - __REG(CSCR_U(4)) = 0x0000d843; /* CS4: SRAM */ - __REG(CSCR_L(4)) = 0x22252521; - __REG(CSCR_A(4)) = 0x22220a00; - - /* setup pins for I2C2 (for EEPROM, RTC) */ - imx_gpio_mode(MUX_CSPI2_MOSI_I2C2_SCL); - imx_gpio_mode(MUX_CSPI2_MISO_I2C2_SCL); - - register_device(&cfi_dev); - - /* - * Create partitions that should be - * not touched by any regular user - */ - dev_add_partition(&cfi_dev, 0x00000, 0x20000, PARTITION_FIXED, "self"); /* ourself */ - dev_add_partition(&cfi_dev, 0x20000, 0x20000, PARTITION_FIXED, "env"); /* environment */ - dev_protect(&cfi_dev, 0x20000, 0, 1); - - register_device(&sram_dev); - register_device(&nand_dev); - register_device(&network_dev); - - register_device(&sdram_dev); - - return 0; -} - -device_initcall(imx31_devices_init); - -static struct device_d imx31_serial_device = { - .name = "imx_serial", - .id = "cs0", - .map_base = IMX_UART1_BASE, - .size = 16 * 1024, - .type = DEVICE_TYPE_CONSOLE, -}; - -static int imx31_console_init(void) -{ - /* init gpios for serial port */ - imx_gpio_mode(MUX_RXD1_UART1_RXD_MUX); - imx_gpio_mode(MUX_TXD1_UART1_TXD_MUX); - imx_gpio_mode(MUX_RTS1_UART1_RTS_B); - imx_gpio_mode(MUX_RTS1_UART1_CTS_B); - - register_device(&imx31_serial_device); - return 0; -} - -console_initcall(imx31_console_init); diff --git a/board/phycore_imx31/phycore_imx31.dox b/board/phycore_imx31/phycore_imx31.dox deleted file mode 100644 index d6c0010fed..0000000000 --- a/board/phycore_imx31/phycore_imx31.dox +++ /dev/null @@ -1,11 +0,0 @@ -/** @page phycore_imx31 Phytec's phyCORE-pcm037 - -This CPU card is based on a Freescale i.MX31 CPU. The card is shipped with: - -- up to 64MiB NOR type Flash Memory -- up to 2MiB static RAM -- 64MiB NAND type Flash Memory -- SMSC 9217 network controller -- 128MiB synchronous dynamic RAM - -*/ diff --git a/board/phycore_mpc5200b_tiny/Makefile b/board/phycore_mpc5200b_tiny/Makefile deleted file mode 100644 index bd0c86d32d..0000000000 --- a/board/phycore_mpc5200b_tiny/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-y += phycore_mpc5200b_tiny.o -extra-y += u-boot.lds diff --git a/board/phycore_mpc5200b_tiny/mt46v32m16-75.h b/board/phycore_mpc5200b_tiny/mt46v32m16-75.h deleted file mode 100644 index 4d191f1f91..0000000000 --- a/board/phycore_mpc5200b_tiny/mt46v32m16-75.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2004 - * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. - * - * Eric Schumann, Phytec Messtechnik - * adapted for mt46v32m16-75 DDR-RAM - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#define SDRAM_DDR 1 /* is DDR */ - -/* Settings for XLB = 132 MHz */ -#define SDRAM_MODE 0x018D0000 -#define SDRAM_EMODE 0x40090000 -#define SDRAM_CONTROL 0x715f0f00 -#define SDRAM_CONFIG1 0x73722930 -#define SDRAM_CONFIG2 0x47770000 - - -/* Settings for XLB = 99 MHz */ -/* -#define SDRAM_MODE 0x008D0000 -#define SDRAM_EMODE 0x40090000 -#define SDRAM_CONTROL 0x714b0f00 -#define SDRAM_CONFIG1 0x63611730 -#define SDRAM_CONFIG2 0x47670000 -*/ - -#define SDRAM_TAPDELAY 0x10000000 /* reserved Bit in MPC5200 B3-Step */ diff --git a/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.c b/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.c deleted file mode 100644 index 39c3b76d91..0000000000 --- a/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.c +++ /dev/null @@ -1,389 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2004 - * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com. - * - * (C) Copyright 2006 - * Eric Schumann, Phytec Messtechnik GmbH - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_VIDEO_OPENIP -#include -#endif - -struct device_d cfi_dev = { - .name = "cfi_flash", - .id = "nor0", - - .map_base = 0xff000000, - .size = 16 * 1024 * 1024, -}; - -struct device_d sdram_dev = { - .name = "ram", - .id = "ram0", - - .map_base = 0x0, - .size = 64 * 1024 * 1024, - - .type = DEVICE_TYPE_DRAM, -}; - -struct device_d scratch_dev = { - .name = "ram", - .id = "scratch0", - .type = DEVICE_TYPE_DRAM, -}; - -static struct mpc5xxx_fec_platform_data fec_info = { - .xcv_type = MII100, -}; - -struct device_d eth_dev = { - .name = "fec_mpc5xxx", - .id = "eth0", - .map_base = MPC5XXX_FEC, - .platform_data = &fec_info, - .type = DEVICE_TYPE_ETHER, -}; - -#define SCRATCHMEM_SIZE (1024 * 1024 * 4) - -static int devices_init (void) -{ - register_device(&cfi_dev); - register_device(&sdram_dev); - register_device(ð_dev); - - scratch_dev.map_base = (unsigned long)sbrk_no_zero(SCRATCHMEM_SIZE); - scratch_dev.size = SCRATCHMEM_SIZE; - register_device(&scratch_dev); - - dev_add_partition(&cfi_dev, 0x00f00000, 0x40000, PARTITION_FIXED, "self"); - dev_add_partition(&cfi_dev, 0x00f60000, 0x20000, PARTITION_FIXED, "env"); - - return 0; -} - -device_initcall(devices_init); - -static struct device_d psc3 = { - .name = "mpc5xxx_serial", - .id = "psc3", - .map_base = MPC5XXX_PSC3, - .size = 4096, - .type = DEVICE_TYPE_CONSOLE, -}; - -static struct device_d psc6 = { - .name = "mpc5xxx_serial", - .id = "psc6", - .map_base = MPC5XXX_PSC6, - .size = 4096, - .type = DEVICE_TYPE_CONSOLE, -}; - -static int console_init(void) -{ - register_device(&psc3); - register_device(&psc6); - return 0; -} - -console_initcall(console_init); - -void *get_early_console_base(const char *name) -{ - if (!strcmp(name, RELOC("psc3"))) - return (void *)MPC5XXX_PSC3; - if (!strcmp(name, RELOC("psc6"))) - return (void *)MPC5XXX_PSC6; - return NULL; -} - -#include "mt46v32m16-75.h" - -static void sdram_start (int hi_addr) -{ - long hi_addr_bit = hi_addr ? 0x01000000 : 0; - - /* unlock mode register */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit; - __asm__ volatile ("sync"); - - /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; - __asm__ volatile ("sync"); - -#if SDRAM_DDR - /* set mode register: extended mode */ - *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE; - __asm__ volatile ("sync"); - - /* set mode register: reset DLL */ - *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000; - __asm__ volatile ("sync"); -#endif - - /* precharge all banks */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit; - __asm__ volatile ("sync"); - - /* auto refresh */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit; - __asm__ volatile ("sync"); - - /* set mode register */ - *(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE; - __asm__ volatile ("sync"); - - /* normal operation */ - *(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit; - __asm__ volatile ("sync"); -} - -/* - * ATTENTION: Although partially referenced initdram does NOT make real use - * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE - * is something else than 0x00000000. - */ - -long int initdram (int board_type) -{ - ulong dramsize = 0; - ulong dramsize2 = 0; - - ulong test1, test2; - - if ((ulong)RELOC(initdram) > (2 << 30)) { - /* setup SDRAM chip selects */ - *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */ - *(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */ - __asm__ volatile ("sync"); - - /* setup config registers */ - *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1; - *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2; - __asm__ volatile ("sync"); - -#if SDRAM_DDR && SDRAM_TAPDELAY - /* set tap delay */ - *(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY; - __asm__ volatile ("sync"); -#endif - - /* find RAM size using SDRAM CS0 only */ - sdram_start(0); - test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000); - sdram_start(1); - test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000); - if (test1 > test2) { - sdram_start(0); - dramsize = test1; - } else { - dramsize = test2; - } - - /* memory smaller than 1MB is impossible */ - if (dramsize < (1 << 20)) { - dramsize = 0; - } - - /* set SDRAM CS0 size according to the amount of RAM found */ - if (dramsize > 0) { - *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1; - } else { - *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */ - } - } else - puts(RELOC("skipping sdram initialization\n")); - - /* retrieve size of memory connected to SDRAM CS0 */ - dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; - if (dramsize >= 0x13) { - dramsize = (1 << (dramsize - 0x13)) << 20; - } else { - dramsize = 0; - } - - /* retrieve size of memory connected to SDRAM CS1 */ - dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF; - if (dramsize2 >= 0x13) { - dramsize2 = (1 << (dramsize2 - 0x13)) << 20; - } else { - dramsize2 = 0; - } - - return dramsize + dramsize2; -} - -#ifdef CONFIG_PCI -static struct pci_controller hose; - -extern void pci_mpc5xxx_init(struct pci_controller *); - -void pci_init_board(void) -{ - pci_mpc5xxx_init(&hose); -} -#endif - -#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP) -void -ft_board_setup(void *blob, bd_t *bd) -{ - ft_cpu_setup(blob, bd); -} -#endif - -#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) - -#define GPIO_PSC2_4 0x02000000UL - -void init_ide_reset (void) -{ - debug ("init_ide_reset\n"); - - /* Configure PSC2_4 as GPIO output for ATA reset */ - *(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC2_4; - *(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC2_4; - /* Deassert reset */ - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4; -} - -void ide_set_reset (int idereset) -{ - debug ("ide_reset(%d)\n", idereset); - - if (idereset) { - *(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC2_4; - /* Make a delay. MPC5200 spec says 25 usec min */ - udelay(500000); - } else { - *(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4; - } -} -#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */ - -#ifdef CONFIG_VIDEO_OPENIP - -#define DISPLAY_WIDTH 320 -#define DISPLAY_HEIGHT 240 - -#ifdef CONFIG_VIDEO_OPENIP_8BPP -#error CONFIG_VIDEO_OPENIP_8BPP not supported. -#endif /* CONFIG_VIDEO_OPENIP_8BPP */ - -#ifdef CONFIG_VIDEO_OPENIP_16BPP -#error CONFIG_VIDEO_OPENIP_16BPP not supported. -#endif /* CONFIG_VIDEO_OPENIP_16BPP */ -#ifdef CONFIG_VIDEO_OPENIP_32BPP - - - -static const SMI_REGS init_regs [] = -{ - {0x00008, 0x0248013f}, - {0x0000c, 0x021100f0}, - {0x00010, 0x018c0106}, - {0x00014, 0x00800000}, - {0x00018, 0x00800000}, - {0x00000, 0x00003701}, - {0, 0} -}; -#endif /* CONFIG_VIDEO_OPENIP_32BPP */ - -#ifdef CONFIG_CONSOLE_EXTRA_INFO -/* - * Return text to be printed besides the logo. - */ -void video_get_info_str (int line_number, char *info) -{ - if (line_number == 1) { - strcpy (info, " Board: phyCORE-MPC5200B tiny (Phytec Messtechnik GmbH)"); - } else if (line_number == 2) { - strcpy (info, " on a PCM-980 baseboard"); - } - else { - info [0] = '\0'; - } -} -#endif - -/* - * Returns OPENIP register base address. First thing called in the driver. - */ -unsigned int board_video_init (void) -{ -ulong dummy; -dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/ -dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/ - return OPENIP_MMIO_BASE; -} - -/* - * Returns OPENIP framebuffer address - */ -unsigned int board_video_get_fb (void) -{ - - return OPENIP_FB_BASE; -} - -/* - * Called after initializing the OPENIP and before clearing the screen. - */ -void board_validate_screen (unsigned int base) -{ -} - -/* - * Return a pointer to the initialization sequence. - */ -const SMI_REGS *board_get_regs (void) -{ - return init_regs; -} - -int board_get_width (void) -{ - return DISPLAY_WIDTH; -} - -int board_get_height (void) -{ - return DISPLAY_HEIGHT; -} - -#endif /* CONFIG_VIDEO_OPENIP */ diff --git a/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.dox b/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.dox deleted file mode 100644 index f43c093f1b..0000000000 --- a/board/phycore_mpc5200b_tiny/phycore_mpc5200b_tiny.dox +++ /dev/null @@ -1,8 +0,0 @@ -/** @page phycore_pcm030 Phytec's phyCORE-pcm030 - -This CPU card is based on a Freescale MPC5200B CPU. The card is shipped with: - -- up to 16MiB NOR type Flash Memory -- 64MiB synchronous dynamic RAM - -*/ diff --git a/board/phycore_mpc5200b_tiny/u-boot.lds.S b/board/phycore_mpc5200b_tiny/u-boot.lds.S deleted file mode 100644 index 1d7ce706d2..0000000000 --- a/board/phycore_mpc5200b_tiny/u-boot.lds.S +++ /dev/null @@ -1,141 +0,0 @@ -/* - * (C) Copyright 2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include - -OUTPUT_ARCH("powerpc") -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - . = TEXT_BASE; - _text = .; - _stext = .; - /* Read-only sections, merged into text segment: */ - . = . + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - arch/ppc/mach-mpc5xxx/start.o (.text) - *(.text) - *(.got1) - . = ALIGN(16); - *(.rodata) - *(.rodata1) - *(.rodata.str1.4) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _etext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2; - __fixup_entries = (. - _FIXUP_TABLE_) >> 2; - - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { U_BOOT_CMDS } - __u_boot_cmd_end = .; - - __u_boot_initcalls_start = .; - .u_boot_initcalls : { INITCALLS } - __u_boot_initcalls_end = .; - __initcall_entries = (__u_boot_initcalls_end - __u_boot_initcalls_start) >> 2; - - __usymtab_start = .; - __usymtab : { U_BOOT_SYMS } - __usymtab_end = .; - - __early_init_data_begin = .; - .early_init_data : { *(.early_init_data) } - __early_init_data_end = .; - - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __init_size = __init_end - _start; - - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - _end = . ; - PROVIDE (end = .); -} diff --git a/board/phycore_pcm038/Makefile b/board/phycore_pcm038/Makefile deleted file mode 100644 index 6082b2d657..0000000000 --- a/board/phycore_pcm038/Makefile +++ /dev/null @@ -1,3 +0,0 @@ - -obj-y += lowlevel_init.o -obj-y += pcm038.o diff --git a/board/phycore_pcm038/lowlevel_init.S b/board/phycore_pcm038/lowlevel_init.S deleted file mode 100644 index fc65b902b6..0000000000 --- a/board/phycore_pcm038/lowlevel_init.S +++ /dev/null @@ -1,98 +0,0 @@ -#include -#include - -#define writel(val, reg) \ - ldr r0, =reg; \ - ldr r1, =val; \ - str r1, [r0]; - -#define CRM_PLL_PCTL_PARAM(pd, fd, fi, fn) (((pd-1)<<26) + ((fd-1)<<16) + (fi<<10) + (fn<<0)) - -.globl board_init_lowlevel -board_init_lowlevel: - - mov r10, lr - - /* - * AHB-Lite IP Interface - */ - writel(0x20040304, AIPI1_PSR0) - writel(0xDFFBFCFB, AIPI1_PSR1) - writel(0x00000000, AIPI2_PSR0) - writel(0xFFFFFFFF, AIPI2_PSR1) - - ldr r0, =CSCR - ldr r1, [r0] - bic r1, r1, #0x3 - str r1, [r0] - - writel(0x00041c02, MPCTL0) - writel(0x04082008, SPCTL0) - - writel(0x33f00304, CSCR) - writel(0x33f00300 | CSCR_FPM_EN | CSCR_MPEN | CSCR_SPEN | CSCR_MCU_SEL | - CSCR_SP_SEL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART | - 0 , - CSCR) - - /* add some delay here */ - mov r1, #0x1000 -1: subs r1, r1, #0x1 - bne 1b - - writel(0x33f00300 | CSCR_FPM_EN | CSCR_MPEN | CSCR_SPEN | CSCR_MCU_SEL | - CSCR_SP_SEL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART | - CSCR_ARM_SRC_MPLL, - CSCR) - - writel(0x00070f08, GPCR) - - writel(0x130410c3, PCDR0) - writel(0x09030913, PCDR1) - - /* skip sdram setup for debugging */ - mov pc,r10 - - /* Skip SDRAM initialization if we run from RAM */ - cmp pc, #0xa0000000 - bls 1f - cmp pc, #0xc0000000 - bhi 1f - - mov pc,r10 - -1: - /* - * DDR on CSD0 - */ - writel(0x00000008, 0xD8001010) - writel(0x55555555, 0x10027828) - writel(0x55555555, 0x10027830) - writel(0x55555555, 0x10027834) - writel(0x00005005, 0x10027838) - writel(0x15555555, 0x1002783C) - writel(0x00000004, 0xD8001010) - writel(0x006ac73a, 0xD8001004) - writel(0x92100000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0xA2100000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0xA2200000, 0xD8001000) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0x00000000, 0xA0000F00) - writel(0xb2100000, 0xD8001000) - ldr r0, =0xA0000033 - mov r1, #0xda - strb r1, [r0] - ldr r0, =0xA1000000 - mov r1, #0xff - strb r1, [r0] - writel(0x82226080, 0xD8001000) - - mov pc,r10 - diff --git a/board/phycore_pcm038/pcm038.c b/board/phycore_pcm038/pcm038.c deleted file mode 100644 index 99cbc5eec4..0000000000 --- a/board/phycore_pcm038/pcm038.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (C) 2007 Sascha Hauer, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct device_d cfi_dev = { - .name = "cfi_flash", - .id = "nor0", - - .map_base = 0xC0000000, - .size = 32 * 1024 * 1024, -}; - -static struct device_d sdram_dev = { - .name = "ram", - .id = "ram0", - - .map_base = 0xa0000000, - .size = 128 * 1024 * 1024, - - .type = DEVICE_TYPE_DRAM, -}; - -static struct fec_platform_data fec_info = { - .xcv_type = MII100, -}; - -static struct device_d fec_dev = { - .name = "fec_imx27", - .id = "eth0", - .map_base = 0x1002b000, - .platform_data = &fec_info, - .type = DEVICE_TYPE_ETHER, -}; - -static int pcm038_devices_init(void) -{ - int i; - unsigned int mode[] = { - PD0_AIN_FEC_TXD0, - PD1_AIN_FEC_TXD1, - PD2_AIN_FEC_TXD2, - PD3_AIN_FEC_TXD3, - PD4_AOUT_FEC_RX_ER, - PD5_AOUT_FEC_RXD1, - PD6_AOUT_FEC_RXD2, - PD7_AOUT_FEC_RXD3, - PD8_AF_FEC_MDIO, - PD9_AIN_FEC_MDC | GPIO_PUEN, - PD10_AOUT_FEC_CRS, - PD11_AOUT_FEC_TX_CLK, - PD12_AOUT_FEC_RXD0, - PD13_AOUT_FEC_RX_DV, - PD14_AOUT_FEC_CLR, - PD15_AOUT_FEC_COL, - PD16_AIN_FEC_TX_ER, - PF23_AIN_FEC_TX_EN, - PE12_PF_UART1_TXD, - PE13_PF_UART1_RXD, - PE14_PF_UART1_CTS, - PE15_PF_UART1_RTS }; - - for (i = 0; i < sizeof(mode) / sizeof(int); i++) - imx_gpio_mode(mode[i]); - - register_device(&cfi_dev); - register_device(&sdram_dev); - register_device(&fec_dev); - - dev_add_partition(&cfi_dev, 0x00000, 0x20000, PARTITION_FIXED, "self"); - dev_add_partition(&cfi_dev, 0x40000, 0x20000, PARTITION_FIXED, "env"); - dev_protect(&cfi_dev, 0x20000, 0, 1); - - return 0; -} - -device_initcall(pcm038_devices_init); - -static struct device_d pcm038_serial_device = { - .name = "imx_serial", - .id = "cs0", - .map_base = IMX_UART1_BASE, - .size = 4096, - .type = DEVICE_TYPE_CONSOLE, -}; - -static int pcm038_console_init(void) -{ - register_device(&pcm038_serial_device); - return 0; -} - -console_initcall(pcm038_console_init); - diff --git a/board/phycore_pcm038/phycore_pcm038.dox b/board/phycore_pcm038/phycore_pcm038.dox deleted file mode 100644 index 95294beb8f..0000000000 --- a/board/phycore_pcm038/phycore_pcm038.dox +++ /dev/null @@ -1,8 +0,0 @@ -/** @page phycore_pcm038 Phytec's phyCORE-pcm038 - -This CPU card is based on a Freescale i.MX27 CPU. The card is shipped with: - -- up to 32MiB NOR type Flash Memory -- 32MiB synchronous dynamic RAM - -*/ diff --git a/include/configs/pcm030.h b/include/configs/pcm030.h new file mode 100644 index 0000000000..339ea71f8b --- /dev/null +++ b/include/configs/pcm030.h @@ -0,0 +1,111 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2006 + * Eric Schumann, Phytec Messatechnik GmbH + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +/* #define DEBUG */ + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ +High Level Configuration Options +(easy to change) + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ +#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ +#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ +#define BOOTFLAG_WARM 0x02 /* Software reboot */ + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ +Serial console configuration + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ + +#if (TEXT_BASE == 0xFF000000) /* Boot low */ +#define CFG_LOWBOOT 1 +#endif +/* RAMBOOT will be defined automatically in memory section */ + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ +IPB Bus clocking configuration. + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define CFG_IPBSPEED_133 /* define for 133MHz speed */ +#if defined(CFG_IPBSPEED_133) +/* + * PCI Bus clocking configuration + * + * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if + * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't + * been tested with a IPB Bus Clock of 66 MHz. + */ +#define CFG_PCISPEED_66 /* define for 66MHz speed */ +#else +#undef CFG_PCISPEED_66 /* for 33MHz speed */ +#endif + +/* we only use CS-Boot */ +#define CFG_BOOTCS_START 0xFF000000 +#define CFG_BOOTCS_SIZE 0x01000000 + +#if CONFIG_MACH_PHYCORE_MPC5200B_TINY_REV == 1 +#define CFG_BOOTCS_CFG 0x0008FD00 +#else +#define CFG_BOOTCS_CFG 0x00083800 +#endif + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ + Memory map + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define CFG_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */ +#define CFG_SDRAM_BASE 0x00000000 + +/* Use SRAM until RAM will be available */ +#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM +#define CFG_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ +#define CONFIG_EARLY_INITDATA_SIZE 0x100 + +#define CFG_MALLOC_LEN (8 << 20) /* Reserve 8 MB for malloc() */ +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ + GPIO configuration + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define CFG_GPS_PORT_CONFIG 0x00558c10 /* PSC6=UART, PSC3=UART ; Ether=100MBit with MD */ + +/*------------------------------------------------------------------------------------------------------------------------------------------------------ + Various low-level settings + ------------------------------------------------------------------------------------------------------------------------------------------------------*/ +#define CFG_HID0_INIT HID0_ICE | HID0_ICFI +#define CFG_HID0_FINAL HID0_ICE + +#define CFG_CS_BURST 0x00000000 +#define CFG_CS_DEADCYCLE 0x33333333 + +#define OF_CPU "PowerPC,5200@0" +#define OF_TBCLK CFG_MPC5XXX_CLKIN +#define OF_SOC "soc5200@f0000000" + +#endif /* __CONFIG_H */ diff --git a/include/configs/pcm037.h b/include/configs/pcm037.h new file mode 100644 index 0000000000..ea987accb8 --- /dev/null +++ b/include/configs/pcm037.h @@ -0,0 +1,44 @@ +/* + * (C) Copyright 2007 Juergen Beisert + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include + +#define CONFIG_ARCH_NUMBER 1147 /* FIXME */ +#define CONFIG_BOOT_PARAMS 0x08000100 + +/* + * Definitions related to passing arguments to kernel. + */ + +#define CFG_MALLOC_LEN (4096 << 10) + +#define CONFIG_STACKSIZE (120<<10) /* stack size */ + +/* #define CONFIG_SYSPLL_CLK_FREQ 26000000 */ + +/* FIXME */ +#define CONFIG_MX31_HCLK_FREQ 26000000 +#define CONFIG_MX31_CLK32 32000 + +#endif + +/* nothing to do here yet */ diff --git a/include/configs/pcm038.h b/include/configs/pcm038.h new file mode 100644 index 0000000000..cbd3e1674d --- /dev/null +++ b/include/configs/pcm038.h @@ -0,0 +1,6 @@ +/* nothing yet */ +#define CONFIG_ARCH_NUMBER 9999 +#define CONFIG_BOOT_PARAMS 0xdeadbeef +#define CFG_MALLOC_LEN (4096 << 10) +#define CONFIG_STACKSIZE (120<<10) /* stack size */ + diff --git a/include/configs/phycore_imx31.h b/include/configs/phycore_imx31.h deleted file mode 100644 index ea987accb8..0000000000 --- a/include/configs/phycore_imx31.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * (C) Copyright 2007 Juergen Beisert - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -#define CONFIG_ARCH_NUMBER 1147 /* FIXME */ -#define CONFIG_BOOT_PARAMS 0x08000100 - -/* - * Definitions related to passing arguments to kernel. - */ - -#define CFG_MALLOC_LEN (4096 << 10) - -#define CONFIG_STACKSIZE (120<<10) /* stack size */ - -/* #define CONFIG_SYSPLL_CLK_FREQ 26000000 */ - -/* FIXME */ -#define CONFIG_MX31_HCLK_FREQ 26000000 -#define CONFIG_MX31_CLK32 32000 - -#endif - -/* nothing to do here yet */ diff --git a/include/configs/phycore_mpc5200b_tiny.h b/include/configs/phycore_mpc5200b_tiny.h deleted file mode 100644 index 339ea71f8b..0000000000 --- a/include/configs/phycore_mpc5200b_tiny.h +++ /dev/null @@ -1,111 +0,0 @@ -/* - * (C) Copyright 2003-2005 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2006 - * Eric Schumann, Phytec Messatechnik GmbH - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#include - -/* #define DEBUG */ - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ -High Level Configuration Options -(easy to change) - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */ -#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */ -#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ -#define BOOTFLAG_WARM 0x02 /* Software reboot */ - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ -Serial console configuration - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ - -#if (TEXT_BASE == 0xFF000000) /* Boot low */ -#define CFG_LOWBOOT 1 -#endif -/* RAMBOOT will be defined automatically in memory section */ - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ -IPB Bus clocking configuration. - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define CFG_IPBSPEED_133 /* define for 133MHz speed */ -#if defined(CFG_IPBSPEED_133) -/* - * PCI Bus clocking configuration - * - * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if - * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't - * been tested with a IPB Bus Clock of 66 MHz. - */ -#define CFG_PCISPEED_66 /* define for 66MHz speed */ -#else -#undef CFG_PCISPEED_66 /* for 33MHz speed */ -#endif - -/* we only use CS-Boot */ -#define CFG_BOOTCS_START 0xFF000000 -#define CFG_BOOTCS_SIZE 0x01000000 - -#if CONFIG_MACH_PHYCORE_MPC5200B_TINY_REV == 1 -#define CFG_BOOTCS_CFG 0x0008FD00 -#else -#define CFG_BOOTCS_CFG 0x00083800 -#endif - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ - Memory map - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define CFG_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */ -#define CFG_SDRAM_BASE 0x00000000 - -/* Use SRAM until RAM will be available */ -#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM -#define CFG_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */ -#define CONFIG_EARLY_INITDATA_SIZE 0x100 - -#define CFG_MALLOC_LEN (8 << 20) /* Reserve 8 MB for malloc() */ -#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ - GPIO configuration - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define CFG_GPS_PORT_CONFIG 0x00558c10 /* PSC6=UART, PSC3=UART ; Ether=100MBit with MD */ - -/*------------------------------------------------------------------------------------------------------------------------------------------------------ - Various low-level settings - ------------------------------------------------------------------------------------------------------------------------------------------------------*/ -#define CFG_HID0_INIT HID0_ICE | HID0_ICFI -#define CFG_HID0_FINAL HID0_ICE - -#define CFG_CS_BURST 0x00000000 -#define CFG_CS_DEADCYCLE 0x33333333 - -#define OF_CPU "PowerPC,5200@0" -#define OF_TBCLK CFG_MPC5XXX_CLKIN -#define OF_SOC "soc5200@f0000000" - -#endif /* __CONFIG_H */ diff --git a/include/configs/phycore_pcm038.h b/include/configs/phycore_pcm038.h deleted file mode 100644 index cbd3e1674d..0000000000 --- a/include/configs/phycore_pcm038.h +++ /dev/null @@ -1,6 +0,0 @@ -/* nothing yet */ -#define CONFIG_ARCH_NUMBER 9999 -#define CONFIG_BOOT_PARAMS 0xdeadbeef -#define CFG_MALLOC_LEN (4096 << 10) -#define CONFIG_STACKSIZE (120<<10) /* stack size */ - -- cgit v1.2.3