From b8a165d1e50377a4bfe0cd6d704a02f7ce9a941b Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 18 May 2009 09:06:58 +0200 Subject: pcm038: pll work Signed-off-by: Sascha Hauer --- board/pcm038/pcm038.c | 138 +++++++++++++++++++++++++++++--------------------- 1 file changed, 81 insertions(+), 57 deletions(-) diff --git a/board/pcm038/pcm038.c b/board/pcm038/pcm038.c index 20d6352255..e3db5d1311 100644 --- a/board/pcm038/pcm038.c +++ b/board/pcm038/pcm038.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include @@ -110,7 +111,10 @@ static struct device_d nand_dev = { static int pcm038_devices_init(void) { + struct device_d *nand, *dev; + char *envdev = "no"; int i; + unsigned int mode[] = { PD0_AIN_FEC_TXD0, PD1_AIN_FEC_TXD1, @@ -168,6 +172,49 @@ static int pcm038_devices_init(void) spi_register_board_info(pcm038_spi_board_info, ARRAY_SIZE(pcm038_spi_board_info)); register_device(&spi_dev); + register_device(&cfi_dev); + register_device(&nand_dev); + register_device(&sdram_dev); +#if 0 + register_device(&sram_dev); +#endif + + /* Register the fec device after the PLL re-initialisation + * as the fec depends on the (now higher) ipg clock + */ + register_device(&fec_dev); + + switch ((GPCR & GPCR_BOOT_MASK) >> GPCR_BOOT_SHIFT) { + case GPCR_BOOT_8BIT_NAND_2k: + case GPCR_BOOT_16BIT_NAND_2k: + case GPCR_BOOT_16BIT_NAND_512: + case GPCR_BOOT_8BIT_NAND_512: + nand = get_device_by_path("/dev/nand0"); + if (!nand) + break; + dev = dev_add_partition(nand, 0x00000, 0x40000, PARTITION_FIXED, "self_raw"); + if (!dev) + break; + dev_add_bb_dev(dev, "self0"); + + dev = dev_add_partition(nand, 0x40000, 0x20000, PARTITION_FIXED, "env_raw"); + if (!dev) + break; + dev_add_bb_dev(dev, "env0"); + envdev = "NAND"; + break; + default: + dev_add_partition(&cfi_dev, 0x00000, 0x40000, PARTITION_FIXED, "self"); + dev_add_partition(&cfi_dev, 0x40000, 0x20000, PARTITION_FIXED, "env"); + dev_protect(&cfi_dev, 0x40000, 0, 1); + envdev = "NOR"; + } + + printf("Using environment in %s Flash\n", envdev); + + armlinux_set_bootparams((void *)0xa0000100); + armlinux_set_architecture(MACH_TYPE_PCM038); + return 0; } @@ -181,19 +228,43 @@ static struct device_d pcm038_serial_device = { .type = DEVICE_TYPE_CONSOLE, }; +static int pcm038_console_init(void) +{ + /* bring PLLs to reset default */ + MPCTL0 = 0x00211803; + SPCTL0 = 0x1002700c; + CSCR = 0x33fc1307; + + register_device(&pcm038_serial_device); + + return 0; +} + +console_initcall(pcm038_console_init); + +static noinline void pll_wait(void) +{ + volatile int i; + + for (i = 0; i < 100000; i++); +} + static int pcm038_power_init(void) { - struct device_d *nand, *dev; - char *envdev = "no"; - int i = 0; int ret; + printf("initialising PLLs\n"); + + console_flush(); + ret = pmic_power(); - if (ret) - goto out; + if (ret) { + printf("Failed to initialize PMIC. Will continue with low CPU speed\n"); + return 0; + } /* wait for good power level */ - udelay(1000); + udelay(100000); #define CSCR_VAL CSCR_USB_DIV(3) | \ CSCR_SD_CNT(3) | \ @@ -209,20 +280,18 @@ static int pcm038_power_init(void) CSCR_SPEN | \ CSCR_MPEN - CSCR &= ~CSCR_MCU_SEL; - /* * pll clock initialization - see section 3.4.3 of the i.MX27 manual */ MPCTL0 = IMX_PLL_PD(0) | IMX_PLL_MFD(51) | IMX_PLL_MFI(7) | - IMX_PLL_MFN(35); /* MPLL = 2 * 26 * 3.83654 MHz = 199.5 MHz */ + IMX_PLL_MFN(35); /* MPLL = 399 MHz */ SPCTL0 = IMX_PLL_PD(1) | IMX_PLL_MFD(12) | IMX_PLL_MFI(9) | - IMX_PLL_MFN(3); /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */ + IMX_PLL_MFN(3); /* SPLL = 240 MHz */ /* * ARM clock = (399 MHz / 2) / (ARM divider = 1) = 200 MHz @@ -230,9 +299,9 @@ static int pcm038_power_init(void) * System clock (HCLK) = 133 MHz */ + pll_wait(); CSCR = CSCR_VAL | CSCR_AHB_DIV(1) | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART; - - udelay(1000); + pll_wait(); /* clock gating enable */ GPCR = 0x00050f08; @@ -243,51 +312,6 @@ static int pcm038_power_init(void) /* Clocks have changed. Notify clients */ clock_notifier_call_chain(); -out: - register_device(&pcm038_serial_device); - register_device(&cfi_dev); - register_device(&nand_dev); - register_device(&sdram_dev); -#if 0 - register_device(&sram_dev); -#endif - - /* Register the fec device after the PLL re-initialisation - * as the fec depends on the (now higher) ipg clock - */ - register_device(&fec_dev); - - switch ((GPCR & GPCR_BOOT_MASK) >> GPCR_BOOT_SHIFT) { - case GPCR_BOOT_8BIT_NAND_2k: - case GPCR_BOOT_16BIT_NAND_2k: - case GPCR_BOOT_16BIT_NAND_512: - case GPCR_BOOT_8BIT_NAND_512: - nand = get_device_by_path("/dev/nand0"); - if (!nand) - break; - dev = dev_add_partition(nand, 0x00000, 0x40000, PARTITION_FIXED, "self_raw"); - if (!dev) - break; - dev_add_bb_dev(dev, "self0"); - - dev = dev_add_partition(nand, 0x40000, 0x20000, PARTITION_FIXED, "env_raw"); - if (!dev) - break; - dev_add_bb_dev(dev, "env0"); - envdev = "NAND"; - break; - default: - dev_add_partition(&cfi_dev, 0x00000, 0x40000, PARTITION_FIXED, "self"); - dev_add_partition(&cfi_dev, 0x40000, 0x20000, PARTITION_FIXED, "env"); - dev_protect(&cfi_dev, 0x40000, 0, 1); - envdev = "NOR"; - } - - printf("Using environment in %s Flash\n", envdev); - - armlinux_set_bootparams((void *)0xa0000100); - armlinux_set_architecture(MACH_TYPE_PCM038); - return 0; } -- cgit v1.2.3