From d3700c0e818e20e0654338f7e25f147072bff991 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 24 Aug 2016 14:17:05 +0200 Subject: ARM: vector_table: Fix creation of second level page table The second level page tables can only start at a 1MiB section boundary, so instead of calling arm_create_pte() with the high vector address (which is 0xffff0000, not 1MiB aligned) we have to call it with 0xfff00000 to correctly create a second level page table. The old values broke SoCs which have peripherals in the upper 1MiB area, like for example the Atmel AT91RM9200. On these Socs we correctly created the vector page, but the pages around it did not have a 1:1 mapping anymore which led to unreachable peripherals. Fixes: f6b77fe9: ARM: Rework vector table setup Reported-by: Peter Kardos Signed-off-by: Sascha Hauer Tested-by: Peter Kardos --- arch/arm/cpu/mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/cpu/mmu.c b/arch/arm/cpu/mmu.c index a31bce4c50..459abe56ba 100644 --- a/arch/arm/cpu/mmu.c +++ b/arch/arm/cpu/mmu.c @@ -307,7 +307,7 @@ static void create_vector_table(unsigned long adr) vectors = xmemalign(PAGE_SIZE, PAGE_SIZE); pr_debug("Creating vector table, virt = 0x%p, phys = 0x%08lx\n", vectors, adr); - exc = arm_create_pte(adr); + exc = arm_create_pte(ALIGN_DOWN(adr, SZ_1M)); idx = (adr & (SZ_1M - 1)) >> PAGE_SHIFT; exc[idx] = (u32)vectors | PTE_TYPE_SMALL | pte_flags_cached; } -- cgit v1.2.3