From d70e809357d5836a5fd916a0e5f774879c74365f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 10 Jun 2020 09:11:47 +0200 Subject: dts: update to v5.7 Signed-off-by: Sascha Hauer --- dts/src/arm/am437x-gp-evm.dts | 2 +- dts/src/arm/am437x-idk-evm.dts | 2 +- dts/src/arm/am437x-sk-evm.dts | 4 ++-- dts/src/arm/am571x-idk.dts | 4 ++-- dts/src/arm/am57xx-beagle-x15-common.dtsi | 4 ++-- dts/src/arm/am57xx-idk-common.dtsi | 4 ++-- dts/src/arm/bcm-hr2.dtsi | 6 +++--- dts/src/arm/bcm2835-rpi-zero-w.dts | 2 +- dts/src/arm/dm814x.dtsi | 2 +- dts/src/arm/imx6q-b450v3.dts | 7 ------- dts/src/arm/imx6q-b650v3.dts | 7 ------- dts/src/arm/imx6q-b850v3.dts | 11 ----------- dts/src/arm/imx6q-bx50v3.dtsi | 15 +++++++++++++++ dts/src/arm/mmp3-dell-ariel.dts | 12 ++++++------ dts/src/arm/mmp3.dtsi | 8 +++----- dts/src/arm64/mediatek/mt8173.dtsi | 4 ++-- 16 files changed, 41 insertions(+), 53 deletions(-) diff --git a/dts/src/arm/am437x-gp-evm.dts b/dts/src/arm/am437x-gp-evm.dts index 811c8cae31..d692e3b281 100644 --- a/dts/src/arm/am437x-gp-evm.dts +++ b/dts/src/arm/am437x-gp-evm.dts @@ -943,7 +943,7 @@ &cpsw_emac0 { phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; }; &elm { diff --git a/dts/src/arm/am437x-idk-evm.dts b/dts/src/arm/am437x-idk-evm.dts index 9f66f96d09..a958f9ee4a 100644 --- a/dts/src/arm/am437x-idk-evm.dts +++ b/dts/src/arm/am437x-idk-evm.dts @@ -504,7 +504,7 @@ &cpsw_emac0 { phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; }; &rtc { diff --git a/dts/src/arm/am437x-sk-evm.dts b/dts/src/arm/am437x-sk-evm.dts index 25222497f8..4d5a7ca2e2 100644 --- a/dts/src/arm/am437x-sk-evm.dts +++ b/dts/src/arm/am437x-sk-evm.dts @@ -833,13 +833,13 @@ &cpsw_emac0 { phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy-handle = <ðphy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <2>; }; diff --git a/dts/src/arm/am571x-idk.dts b/dts/src/arm/am571x-idk.dts index 669559c9c9..c13756fa0f 100644 --- a/dts/src/arm/am571x-idk.dts +++ b/dts/src/arm/am571x-idk.dts @@ -190,13 +190,13 @@ &cpsw_port1 { phy-handle = <ðphy0_sw>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; ti,dual-emac-pvid = <1>; }; &cpsw_port2 { phy-handle = <ðphy1_sw>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; ti,dual-emac-pvid = <2>; }; diff --git a/dts/src/arm/am57xx-beagle-x15-common.dtsi b/dts/src/arm/am57xx-beagle-x15-common.dtsi index a813a0cf3f..565675354d 100644 --- a/dts/src/arm/am57xx-beagle-x15-common.dtsi +++ b/dts/src/arm/am57xx-beagle-x15-common.dtsi @@ -433,13 +433,13 @@ &cpsw_emac0 { phy-handle = <&phy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy-handle = <&phy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <2>; }; diff --git a/dts/src/arm/am57xx-idk-common.dtsi b/dts/src/arm/am57xx-idk-common.dtsi index aa5e55f981..a3ff1237d1 100644 --- a/dts/src/arm/am57xx-idk-common.dtsi +++ b/dts/src/arm/am57xx-idk-common.dtsi @@ -408,13 +408,13 @@ &cpsw_emac0 { phy-handle = <ðphy0>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <1>; }; &cpsw_emac1 { phy-handle = <ðphy1>; - phy-mode = "rgmii"; + phy-mode = "rgmii-rxid"; dual_emac_res_vlan = <2>; }; diff --git a/dts/src/arm/bcm-hr2.dtsi b/dts/src/arm/bcm-hr2.dtsi index 6142c67281..5e5f5ca3c8 100644 --- a/dts/src/arm/bcm-hr2.dtsi +++ b/dts/src/arm/bcm-hr2.dtsi @@ -75,7 +75,7 @@ timer@20200 { compatible = "arm,cortex-a9-global-timer"; reg = <0x20200 0x100>; - interrupts = ; + interrupts = ; clocks = <&periph_clk>; }; @@ -83,7 +83,7 @@ compatible = "arm,cortex-a9-twd-timer"; reg = <0x20600 0x20>; interrupts = ; + IRQ_TYPE_EDGE_RISING)>; clocks = <&periph_clk>; }; @@ -91,7 +91,7 @@ compatible = "arm,cortex-a9-twd-wdt"; reg = <0x20620 0x20>; interrupts = ; + IRQ_TYPE_EDGE_RISING)>; clocks = <&periph_clk>; }; diff --git a/dts/src/arm/bcm2835-rpi-zero-w.dts b/dts/src/arm/bcm2835-rpi-zero-w.dts index 4c3f606e5b..f65448c01e 100644 --- a/dts/src/arm/bcm2835-rpi-zero-w.dts +++ b/dts/src/arm/bcm2835-rpi-zero-w.dts @@ -24,7 +24,7 @@ leds { act { - gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; + gpios = <&gpio 47 GPIO_ACTIVE_LOW>; }; }; diff --git a/dts/src/arm/dm814x.dtsi b/dts/src/arm/dm814x.dtsi index 44ed5a7981..c28ca0540f 100644 --- a/dts/src/arm/dm814x.dtsi +++ b/dts/src/arm/dm814x.dtsi @@ -693,7 +693,7 @@ davinci_mdio: mdio@800 { compatible = "ti,cpsw-mdio", "ti,davinci_mdio"; - clocks = <&alwon_ethernet_clkctrl DM814_ETHERNET_CPGMAC0_CLKCTRL 0>; + clocks = <&cpsw_125mhz_gclk>; clock-names = "fck"; #address-cells = <1>; #size-cells = <0>; diff --git a/dts/src/arm/imx6q-b450v3.dts b/dts/src/arm/imx6q-b450v3.dts index 95b8f2d718..fb0980190a 100644 --- a/dts/src/arm/imx6q-b450v3.dts +++ b/dts/src/arm/imx6q-b450v3.dts @@ -65,13 +65,6 @@ }; }; -&clks { - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, - <&clks IMX6QDL_CLK_LDB_DI1_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, - <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -}; - &ldb { status = "okay"; diff --git a/dts/src/arm/imx6q-b650v3.dts b/dts/src/arm/imx6q-b650v3.dts index 611cb7ae7e..8f762d9c5a 100644 --- a/dts/src/arm/imx6q-b650v3.dts +++ b/dts/src/arm/imx6q-b650v3.dts @@ -65,13 +65,6 @@ }; }; -&clks { - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, - <&clks IMX6QDL_CLK_LDB_DI1_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, - <&clks IMX6QDL_CLK_PLL3_USB_OTG>; -}; - &ldb { status = "okay"; diff --git a/dts/src/arm/imx6q-b850v3.dts b/dts/src/arm/imx6q-b850v3.dts index e4cb118f88..1ea64ecf42 100644 --- a/dts/src/arm/imx6q-b850v3.dts +++ b/dts/src/arm/imx6q-b850v3.dts @@ -53,17 +53,6 @@ }; }; -&clks { - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, - <&clks IMX6QDL_CLK_LDB_DI1_SEL>, - <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, - <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>; - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, - <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, - <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, - <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; -}; - &ldb { fsl,dual-channel; status = "okay"; diff --git a/dts/src/arm/imx6q-bx50v3.dtsi b/dts/src/arm/imx6q-bx50v3.dtsi index fa27dcdf06..1938b04199 100644 --- a/dts/src/arm/imx6q-bx50v3.dtsi +++ b/dts/src/arm/imx6q-bx50v3.dtsi @@ -377,3 +377,18 @@ #interrupt-cells = <1>; }; }; + +&clks { + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, + <&clks IMX6QDL_CLK_LDB_DI1_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>, + <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>, + <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>, + <&clks IMX6QDL_CLK_IPU2_DI1_PRE_SEL>; + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>, + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>, + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>, + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>, + <&clks IMX6QDL_CLK_PLL2_PFD0_352M>; +}; diff --git a/dts/src/arm/mmp3-dell-ariel.dts b/dts/src/arm/mmp3-dell-ariel.dts index 15449c72c0..b0ec14c421 100644 --- a/dts/src/arm/mmp3-dell-ariel.dts +++ b/dts/src/arm/mmp3-dell-ariel.dts @@ -98,19 +98,19 @@ status = "okay"; }; -&ssp3 { +&ssp1 { status = "okay"; - cs-gpios = <&gpio 46 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio 46 GPIO_ACTIVE_LOW>; firmware-flash@0 { - compatible = "st,m25p80", "jedec,spi-nor"; + compatible = "winbond,w25q32", "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <40000000>; + spi-max-frequency = <104000000>; m25p,fast-read; }; }; -&ssp4 { - cs-gpios = <&gpio 56 GPIO_ACTIVE_HIGH>; +&ssp2 { + cs-gpios = <&gpio 56 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/dts/src/arm/mmp3.dtsi b/dts/src/arm/mmp3.dtsi index 9b5087a95e..826f0a5778 100644 --- a/dts/src/arm/mmp3.dtsi +++ b/dts/src/arm/mmp3.dtsi @@ -202,8 +202,7 @@ }; hsic_phy0: hsic-phy@f0001800 { - compatible = "marvell,mmp3-hsic-phy", - "usb-nop-xceiv"; + compatible = "marvell,mmp3-hsic-phy"; reg = <0xf0001800 0x40>; #phy-cells = <0>; status = "disabled"; @@ -224,8 +223,7 @@ }; hsic_phy1: hsic-phy@f0002800 { - compatible = "marvell,mmp3-hsic-phy", - "usb-nop-xceiv"; + compatible = "marvell,mmp3-hsic-phy"; reg = <0xf0002800 0x40>; #phy-cells = <0>; status = "disabled"; @@ -531,7 +529,7 @@ }; soc_clocks: clocks@d4050000 { - compatible = "marvell,mmp2-clock"; + compatible = "marvell,mmp3-clock"; reg = <0xd4050000 0x1000>, <0xd4282800 0x400>, <0xd4015000 0x1000>; diff --git a/dts/src/arm64/mediatek/mt8173.dtsi b/dts/src/arm64/mediatek/mt8173.dtsi index ccb8e88a60..d819e44d94 100644 --- a/dts/src/arm64/mediatek/mt8173.dtsi +++ b/dts/src/arm64/mediatek/mt8173.dtsi @@ -1402,8 +1402,8 @@ "venc_lt_sel"; assigned-clocks = <&topckgen CLK_TOP_VENC_SEL>, <&topckgen CLK_TOP_VENC_LT_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_VENCPLL_D2>, - <&topckgen CLK_TOP_UNIVPLL1_D2>; + assigned-clock-parents = <&topckgen CLK_TOP_VCODECPLL>, + <&topckgen CLK_TOP_VCODECPLL_370P5>; }; jpegdec: jpegdec@18004000 { -- cgit v1.2.3