From d97b8f93ee35b09d6a76cfb137c708470e3e47b2 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 14 Feb 2020 12:30:45 +0100 Subject: ARM: i.MX8M: Add some lowlevel clock functions U-Boot has some lowlevel clock functions which take a clock slice index as argument. Add them for barebox as well to make the code better comparable to U-Boot. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/imx8m.c | 24 ++++++++++++++++++++++++ arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h | 4 ++++ 2 files changed, 28 insertions(+) diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c index 031b25bfc1..596c4140b3 100644 --- a/arch/arm/mach-imx/imx8m.c +++ b/arch/arm/mach-imx/imx8m.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -28,6 +29,29 @@ #define FSL_SIP_BUILDINFO 0xC2000003 #define FSL_SIP_BUILDINFO_GET_COMMITHASH 0x00 +void imx8m_clock_set_target_val(int clock_id, u32 val) +{ + void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + + writel(val, ccm + IMX8M_CCM_TARGET_ROOTn(clock_id)); +} + +void imx8m_ccgr_clock_enable(int index) +{ + void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + + writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0), + ccm + IMX8M_CCM_CCGRn_SET(index)); +} + +void imx8m_ccgr_clock_disable(int index) +{ + void *ccm = IOMEM(MX8M_CCM_BASE_ADDR); + + writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0), + ccm + IMX8M_CCM_CCGRn_CLR(index)); +} + u64 imx8mq_uid(void) { return imx_ocotp_read_uid(IOMEM(MX8MQ_OCOTP_BASE_ADDR)); diff --git a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h index 66ace0f1c4..ff207b80f9 100644 --- a/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h +++ b/arch/arm/mach-imx/include/mach/imx8m-ccm-regs.h @@ -48,4 +48,8 @@ #define IMX8M_CCM_CCGR_SETTINGn_NEEDED_RUN_WAIT(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b10) #define IMX8M_CCM_CCGR_SETTINGn_NEEDED(n) IMX8M_CCM_CCGR_SETTINGn(n, 0b11) +void imx8m_clock_set_target_val(int clock_id, u32 val); +void imx8m_ccgr_clock_enable(int index); +void imx8m_ccgr_clock_disable(int index); + #endif -- cgit v1.2.3