From fd04aa73d8945b55ca604b490fc3f6c58bb7771b Mon Sep 17 00:00:00 2001 From: Antony Pavlov Date: Mon, 14 Jun 2021 17:27:53 +0300 Subject: Documentation: RISC-V: erizo: fix header level The "Running on DE0-Nano FPGA board" is a "Erizo" subsection not independent section. Signed-off-by: Antony Pavlov Link: https://lore.barebox.org/20210614142753.86477-1-antonynpavlov@gmail.com Signed-off-by: Sascha Hauer --- Documentation/boards/riscv.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/boards/riscv.rst b/Documentation/boards/riscv.rst index 59cdc00a99..387b86c588 100644 --- a/Documentation/boards/riscv.rst +++ b/Documentation/boards/riscv.rst @@ -122,7 +122,7 @@ Run barebox:: Running on DE0-Nano FPGA board ------------------------------- +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ See https://github.com/open-design/riscv-soc-cores/ for instructions on DE0-Nano bitstream generation and loading. -- cgit v1.2.3