From e243adbd76f30783100cafd3bdf89bdb7066bbe7 Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Thu, 30 Oct 2014 12:01:25 +0100 Subject: ARM: vincell: move to DT probing This enabled multi image support for the Garz&Fricke Vincell board. Also it adds the Vincell-LT as a second image with a separate device tree. Previously we used the same image on both the Vincell and the Vincell-LT image since the differences are not that significant for barebox. Still this was good for quite some confusion internally, so let's properly introduce a second image. Signed-off-by: Steffen Trumtrar Signed-off-by: Sascha Hauer --- arch/arm/dts/imx53-guf-vincell.dts | 402 +++++++++++++++++++++++++++++++++++++ 1 file changed, 402 insertions(+) create mode 100644 arch/arm/dts/imx53-guf-vincell.dts (limited to 'arch/arm/dts/imx53-guf-vincell.dts') diff --git a/arch/arm/dts/imx53-guf-vincell.dts b/arch/arm/dts/imx53-guf-vincell.dts new file mode 100644 index 0000000000..ffc157f0b2 --- /dev/null +++ b/arch/arm/dts/imx53-guf-vincell.dts @@ -0,0 +1,402 @@ +/* + * Copyright 2012 Pengutronix + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +/dts-v1/; +#include "imx53.dtsi" +#include +#include +#include + +/ { + model = "Garz & Fricke VINCELL"; + compatible = "guf,imx53-vincell", "fsl,imx53"; + + chosen { + linux,stdout-path = &uart2; + }; + + memory { + reg = <0x70000000 0x20000000>; + }; + + clocks { + ckih1 { + clock-frequency = <0>; + }; + }; + + panel: panel { + compatible = "ampire,am800480r3tmqwa1h", "simple-panel"; + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + backlight = <&backlight>; + + port { + panel_in: endpoint { + remote-endpoint = <&lvds0_out>; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + user { + label = "Heartbeat"; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; + + backlight: backlight { + compatible = "pwm-backlight"; + pwms = <&pwm2 0 50000>; + brightness-levels = <0 4 8 16 32 64 128 255>; + default-brightness-level = <6>; + enable-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + }; + + regulators { + compatible = "simple-bus"; + + reg_3p2v: 3p2v { + compatible = "regulator-fixed"; + regulator-name = "3P2V"; + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3200000>; + regulator-always-on; + }; + }; +}; + +&audmux { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_audmux>; + status = "okay"; +}; + +&esdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_esdhc1>; + cd-gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rmii"; + phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + bitrate = <100000>; + status = "okay"; + + pmic: dialog@48 { /* DA9053-3HHA1 PMIC */ + compatible = "dialog,da9053-aa", "dialog,da9052"; + reg = <0x48>; + interrupt-parent = <&gpio7>; + interrupts = <12 IRQ_TYPE_LEVEL_LOW>; + + regulators { + buck1 { /* CORE */ + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + regulator-boot-on; + }; + + buck2 { /* PRO */ + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2075000>; + regulator-always-on; + regulator-boot-on; + }; + + buck3 { /* MEM */ + regulator-min-microvolt = <925000>; + regulator-max-microvolt = <2500000>; + regulator-always-on; + regulator-boot-on; + }; + + buck4 { /* PERI */ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo1 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo2 { + regulator-min-microvolt = <600000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo3 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo4 { + regulator-min-microvolt = <1725000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo5 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo8 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo9 { + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <3650000>; + regulator-always-on; + regulator-boot-on; + }; + + ldo10 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + + temperature-sensor@49 { + compatible = "ti,lm73"; + reg = <0x49>; + }; + + eeprom@50 { + compatible = "st,m24c32"; + reg = <0x50>; + status = "disabled"; + }; + + rtc: nxp@51 { + compatible = "nxp,pcf8563"; + reg = <0x51>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + bitrate = <100000>; + status = "disabled"; +}; + +&ldb { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lvds0>; + status = "okay"; + + lvds-channel@0 { + status = "okay"; + fsl,data-mapping = "jeida"; + fsl,data-width = <24>; + + port@1 { + reg = <1>; + + lvds0_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "disabled"; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_hog>; + + imx53-vincell { + pinctrl_hog: hoggrp { + fsl,pins = < + MX53_PAD_DISP0_DAT8__GPIO4_29 0x80000000 + MX53_PAD_DISP0_DAT14__GPIO5_8 0x80000000 + MX53_PAD_DISP0_DAT15__GPIO5_9 0x80000000 + MX53_PAD_DISP0_DAT16__GPIO5_10 0x80000000 + MX53_PAD_DISP0_DAT17__GPIO5_11 0x80000000 + MX53_PAD_CSI0_PIXCLK__GPIO5_18 0x80000000 + MX53_PAD_CSI0_MCLK__GPIO5_19 0x80000000 + MX53_PAD_CSI0_DATA_EN__GPIO5_20 0x80000000 + MX53_PAD_CSI0_VSYNC__GPIO5_21 0x80000000 + MX53_PAD_CSI0_DAT4__GPIO5_22 0x80000000 + MX53_PAD_CSI0_DAT5__GPIO5_23 0x80000000 + MX53_PAD_CSI0_DAT6__GPIO5_24 0x80000000 + MX53_PAD_EIM_EB2__GPIO2_30 0x80000000 + MX53_PAD_GPIO_10__GPIO4_0 0x80000000 + MX53_PAD_GPIO_11__GPIO4_1 0x80000000 + MX53_PAD_GPIO_12__GPIO4_2 0x80000000 + MX53_PAD_GPIO_13__GPIO4_3 0x80000000 + MX53_PAD_PATA_DIOW__GPIO6_17 0x80000000 + MX53_PAD_PATA_DMACK__GPIO6_18 0x80000000 + MX53_PAD_PATA_RESET_B__GPIO7_4 0x80000000 + MX53_PAD_PATA_IORDY__GPIO7_5 0x80000000 + MX53_PAD_PATA_DA_0__GPIO7_6 0x80000000 + MX53_PAD_PATA_DA_2__GPIO7_8 0x80000000 + MX53_PAD_PATA_DATA0__GPIO2_0 0x80000000 + MX53_PAD_PATA_DATA1__GPIO2_1 0x80000000 + MX53_PAD_PATA_DATA2__GPIO2_2 0x000001c5 /* BL_ON */ + MX53_PAD_PATA_DATA3__GPIO2_3 0x000000c4 /* SEL6_8 */ + MX53_PAD_PATA_DATA4__PATA_DATA_4 0x80000000 + MX53_PAD_PATA_DATA5__GPIO2_5 0x000000c4 /* LCD_ENA */ + MX53_PAD_PATA_DATA6__GPIO2_6 0x80000000 + MX53_PAD_PATA_DATA7__GPIO2_7 0x80000000 + MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000 + MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000 + MX53_PAD_PATA_DATA10__GPIO2_10 0x80000000 + MX53_PAD_PATA_DATA11__GPIO2_11 0x80000000 + MX53_PAD_PATA_DATA13__GPIO2_13 0x80000000 + MX53_PAD_PATA_DATA14__GPIO2_14 0x80000000 + MX53_PAD_PATA_DATA15__GPIO2_15 0x80000000 + MX53_PAD_SD2_CLK__GPIO1_10 0x80000000 + MX53_PAD_SD2_DATA3__GPIO1_12 0x80000000 + MX53_PAD_GPIO_2__GPIO1_2 0x80000000 + MX53_PAD_GPIO_4__GPIO1_4 0x80000000 + MX53_PAD_GPIO_17__GPIO7_12 0x000000e0 /* PMIC_nIRQ, 100 KOhm pull up */ + MX53_PAD_GPIO_18__GPIO7_13 0x80000000 + MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x80000000 + MX53_PAD_DISP0_DAT9__PWM2_PWMO 0x000000c4 /* PWM2 out */ + >; + }; + + pinctrl_audmux: audmuxgrp { + fsl,pins = < + MX53_PAD_DISP0_DAT20__AUDMUX_AUD4_TXC 0x80000000 + MX53_PAD_DISP0_DAT21__AUDMUX_AUD4_TXD 0x80000000 + MX53_PAD_DISP0_DAT22__AUDMUX_AUD4_TXFS 0x80000000 + MX53_PAD_DISP0_DAT23__AUDMUX_AUD4_RXD 0x80000000 + >; + }; + + pinctrl_esdhc1: esdhc1grp { + fsl,pins = < + MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 + MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 + MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 + MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 + MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 + MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 + MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 + MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 + MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 + MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 + MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 + MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 + MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX53_PAD_CSI0_DAT8__I2C1_SDA 0xc0000000 + MX53_PAD_CSI0_DAT9__I2C1_SCL 0xc0000000 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX53_PAD_KEY_ROW3__I2C2_SDA 0xc0000000 + MX53_PAD_KEY_COL3__I2C2_SCL 0xc0000000 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1c5 + MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1c5 + MX53_PAD_PATA_INTRQ__UART2_CTS 0x1c5 + MX53_PAD_PATA_DIOR__UART2_RTS 0x1c5 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1c5 + MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1c5 + >; + }; + + pinctrl_lvds0: lvds0grp { + fsl,pins = < + MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK 0x80000000 + MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0 0x80000000 + MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1 0x80000000 + MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2 0x80000000 + MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3 0x80000000 + >; + }; + }; +}; -- cgit v1.2.3