From 0bc920babbd5f78459f280c46ebec43014980a45 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:07 -0700 Subject: ARM: i.MX: zii-vf610-dev-rev-b: Use SPDX tag in DTS Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/dts/vf610-zii-dev-rev-b.dts | 42 ++---------------------------------- 1 file changed, 2 insertions(+), 40 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/vf610-zii-dev-rev-b.dts b/arch/arm/dts/vf610-zii-dev-rev-b.dts index ac0807c49e..62112d848c 100644 --- a/arch/arm/dts/vf610-zii-dev-rev-b.dts +++ b/arch/arm/dts/vf610-zii-dev-rev-b.dts @@ -1,45 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + /* * Copyright (C) 2015, 2016 Zodiac Inflight Innovations - * - * Based on an original 'vf610-twr.dts' which is Copyright 2015, - * Freescale Semiconductor, Inc. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include -- cgit v1.2.3 From c176392929b8c22693a11b3bddce1e1c7ff98738 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:08 -0700 Subject: ARM: i.MX: zii-vf610-dev-rev-c: Use SPDX tag in DTS Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/dts/vf610-zii-dev-rev-c.dts | 42 ++---------------------------------- 1 file changed, 2 insertions(+), 40 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/vf610-zii-dev-rev-c.dts b/arch/arm/dts/vf610-zii-dev-rev-c.dts index c6341a0279..080d44614a 100644 --- a/arch/arm/dts/vf610-zii-dev-rev-c.dts +++ b/arch/arm/dts/vf610-zii-dev-rev-c.dts @@ -1,45 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + /* * Copyright (C) 2015, 2016 Zodiac Inflight Innovations - * - * Based on an original 'vf610-twr.dts' which is Copyright 2015, - * Freescale Semiconductor, Inc. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * version 2 as published by the Free Software Foundation. - * - * This file is distributed in the hope that it will be useful - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * Or, alternatively - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. */ #include -- cgit v1.2.3 From 961ebd022d8ef197a343ab949324214f22728450 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:09 -0700 Subject: ARM: i.MX: zii-vf610-dev-rev-b: Fix DTS warning Add missing #address-cells and #size-cells to fix a warning Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/dts/vf610-zii-dev-rev-b.dts | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/vf610-zii-dev-rev-b.dts b/arch/arm/dts/vf610-zii-dev-rev-b.dts index 62112d848c..c90af91a9f 100644 --- a/arch/arm/dts/vf610-zii-dev-rev-b.dts +++ b/arch/arm/dts/vf610-zii-dev-rev-b.dts @@ -11,6 +11,9 @@ / { spi0 { m25p128@0 { + #address-cells = <1>; + #size-cells = <0>; + partition@0 { label = "bootloader"; reg = <0x0 0x100000>; -- cgit v1.2.3 From 928a3cd8f8f05628b2ab38a2c6e839077956b3c7 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:10 -0700 Subject: ARM: i.MX: zii-vf610-dev-rev-c: Fix DTS warning Add missing #address-cells and #size-cells to fix a warning Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/dts/vf610-zii-dev-rev-c.dts | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/vf610-zii-dev-rev-c.dts b/arch/arm/dts/vf610-zii-dev-rev-c.dts index 080d44614a..ecec0b1830 100644 --- a/arch/arm/dts/vf610-zii-dev-rev-c.dts +++ b/arch/arm/dts/vf610-zii-dev-rev-c.dts @@ -22,6 +22,9 @@ &dspi0 { m25p128@0 { + #address-cells = <1>; + #size-cells = <0>; + partition@0 { label = "bootloader"; reg = <0x0 0x100000>; -- cgit v1.2.3 From 73835ac50e59366538293606032d5c48c7e42378 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:14 -0700 Subject: ARM: Rename zii-imx7d-rpu2 to zii-imx7d-dev To prepare for addition of another ZII i.MX7D based board, i.MX7D RMU2, rename zii-imx7d-rpu2 to zii-imx7d-dev to avoid any image naming confusion. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- .../boards/imx/zii-imx7d-dev/bootstrap.sh | 6 + Documentation/boards/imx/zii-imx7d-dev/openocd.cfg | 143 +++++++++++++++++++++ Documentation/boards/imx/zii-imx7d-dev/readme.rst | 47 +++++++ .../boards/imx/zii-imx7d-rpu2/bootstrap.sh | 6 - .../boards/imx/zii-imx7d-rpu2/openocd.cfg | 143 --------------------- Documentation/boards/imx/zii-imx7d-rpu2/readme.rst | 47 ------- arch/arm/boards/Makefile | 2 +- arch/arm/boards/zii-imx7d-dev/Makefile | 2 + arch/arm/boards/zii-imx7d-dev/board.c | 49 +++++++ .../flash-header-zii-imx7d-dev.imxcfg | 6 + arch/arm/boards/zii-imx7d-dev/lowlevel.c | 50 +++++++ arch/arm/boards/zii-imx7d-rpu2/Makefile | 2 - arch/arm/boards/zii-imx7d-rpu2/board.c | 49 ------- .../flash-header-zii-imx7d-rpu2.imxcfg | 6 - arch/arm/boards/zii-imx7d-rpu2/lowlevel.c | 50 ------- arch/arm/dts/Makefile | 2 +- arch/arm/mach-imx/Kconfig | 4 +- images/Makefile.imx | 8 +- 18 files changed, 311 insertions(+), 311 deletions(-) create mode 100755 Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh create mode 100644 Documentation/boards/imx/zii-imx7d-dev/openocd.cfg create mode 100644 Documentation/boards/imx/zii-imx7d-dev/readme.rst delete mode 100755 Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh delete mode 100644 Documentation/boards/imx/zii-imx7d-rpu2/openocd.cfg delete mode 100644 Documentation/boards/imx/zii-imx7d-rpu2/readme.rst create mode 100644 arch/arm/boards/zii-imx7d-dev/Makefile create mode 100644 arch/arm/boards/zii-imx7d-dev/board.c create mode 100644 arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg create mode 100644 arch/arm/boards/zii-imx7d-dev/lowlevel.c delete mode 100644 arch/arm/boards/zii-imx7d-rpu2/Makefile delete mode 100644 arch/arm/boards/zii-imx7d-rpu2/board.c delete mode 100644 arch/arm/boards/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg delete mode 100644 arch/arm/boards/zii-imx7d-rpu2/lowlevel.c (limited to 'arch/arm/dts') diff --git a/Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh b/Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh new file mode 100755 index 0000000000..49bab03200 --- /dev/null +++ b/Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh @@ -0,0 +1,6 @@ +#!/bin/sh + +OPENOCD=${OPENOCD:-openocd} +DIR=$(CDPATH= cd -- "$(dirname -- "$0")" && pwd) + +${OPENOCD} -f ${DIR}/openocd.cfg --command "adapter_khz 10000; init; safe_reset; start_barebox;" diff --git a/Documentation/boards/imx/zii-imx7d-dev/openocd.cfg b/Documentation/boards/imx/zii-imx7d-dev/openocd.cfg new file mode 100644 index 0000000000..f971c3fb21 --- /dev/null +++ b/Documentation/boards/imx/zii-imx7d-dev/openocd.cfg @@ -0,0 +1,143 @@ +# +# Board configuration file for the Zodiac RPU2 board +# + +interface ftdi +ftdi_vid_pid 0x0403 0x6011 + +ftdi_layout_init 0x0038 0x007b +ftdi_layout_signal nSRST -data 0x0010 +ftdi_layout_signal LED -data 0x0020 + +transport select jtag + +reset_config srst_only srst_push_pull connect_deassert_srst + +# set a slow default JTAG clock, can be overridden later +adapter_khz 1000 + +# need at least 100ms delay after SRST release for JTAG +adapter_nsrst_delay 100 + +# source the target file +source [find target/imx7.cfg] +source [find mem_helper.tcl] + +# function to disable the on-chip watchdog +proc disable_wdog { } { + echo "Bootstrap: Disabling SoC watchdog" + mwh phys 0x30280008 0x00 +} + +set ddr_init_failed 0 + +proc check_bits_set_32 { addr mask } { + while { [expr [mrw $addr] & $mask] == 0 } { } +} + +proc ddr_init { } { + echo "Bootstrap: Initializing DDR" + + mww phys 0x30340004 0x4F400005 + # Clear then set bit30 to ensure exit from DDR retention + mww phys 0x30360388 0x40000000 + mww phys 0x30360384 0x40000000 + + mww phys 0x30391000 0x00000002 + mww phys 0x307a0000 0x01040001 + mww phys 0x307a01a0 0x80400003 + mww phys 0x307a01a4 0x00100020 + mww phys 0x307a01a8 0x80100004 + mww phys 0x307a0064 0x00400046 + mww phys 0x307a0490 0x00000001 + mww phys 0x307a00d0 0x00020083 + mww phys 0x307a00d4 0x00690000 + mww phys 0x307a00dc 0x09300004 + mww phys 0x307a00e0 0x04080000 + mww phys 0x307a00e4 0x00100004 + mww phys 0x307a00f4 0x0000033f + mww phys 0x307a0100 0x09081109 + mww phys 0x307a0104 0x0007020d + mww phys 0x307a0108 0x03040407 + mww phys 0x307a010c 0x00002006 + mww phys 0x307a0110 0x04020205 + mww phys 0x307a0114 0x03030202 + mww phys 0x307a0120 0x00000803 + mww phys 0x307a0180 0x00800020 + mww phys 0x307a0184 0x02000100 + mww phys 0x307a0190 0x02098204 + mww phys 0x307a0194 0x00030303 + mww phys 0x307a0200 0x00000016 + mww phys 0x307a0204 0x00171717 + mww phys 0x307a0214 0x04040404 + mww phys 0x307a0218 0x0f040404 + mww phys 0x307a0240 0x06000604 + mww phys 0x307a0244 0x00000001 + mww phys 0x30391000 0x00000000 + mww phys 0x30790000 0x17420f40 + mww phys 0x30790004 0x10210100 + mww phys 0x30790010 0x00060807 + mww phys 0x307900b0 0x1010007e + mww phys 0x3079009c 0x00000d6e + mww phys 0x30790020 0x08080808 + mww phys 0x30790030 0x08080808 + mww phys 0x30790050 0x01000010 + mww phys 0x30790050 0x00000010 + + mww phys 0x307900c0 0x0e407304 + mww phys 0x307900c0 0x0e447304 + mww phys 0x307900c0 0x0e447306 + + check_bits_set_32 0x307900c4 0x1 + + mww phys 0x307900c0 0x0e447304 + mww phys 0x307900c0 0x0e407304 + + mww phys 0x30384130 0x00000000 + mww phys 0x30340020 0x00000178 + mww phys 0x30384130 0x00000002 + mww phys 0x30790018 0x0000000f + + check_bits_set_32 0x307900c4 0x1 +} + +# This function applies the initial configuration after a "reset init" +# command +proc board_init { } { + global ddr_init_failed + disable_wdog + + if {[catch {ddr_init} errmsg]} { + set ddr_init_failed 1 + } else { + set ddr_init_failed 0 + } +} + +proc safe_reset {} { + global ddr_init_failed + + set status 5 + while { $status != 0 } { + reset init + if { $ddr_init_failed == 1 } { + incr status -1 + } else { + set status 0 + } + } +} + +proc start_barebox { } { + set MX7_DDR_BASE_ADDR 0x80000000 + echo "Bootstrap: Loading Barebox" + halt + load_image images/barebox-zii-imx7d-dev.img $MX7_DDR_BASE_ADDR bin + arm core_state arm + echo [format "Bootstrap: Jumping to 0x%08x" $MX7_DDR_BASE_ADDR] + resume $MX7_DDR_BASE_ADDR +} + +# hook the init function into the reset-init event +${_TARGETNAME}.0 configure -event reset-init { board_init } + diff --git a/Documentation/boards/imx/zii-imx7d-dev/readme.rst b/Documentation/boards/imx/zii-imx7d-dev/readme.rst new file mode 100644 index 0000000000..d47bc90b01 --- /dev/null +++ b/Documentation/boards/imx/zii-imx7d-dev/readme.rst @@ -0,0 +1,47 @@ +ZII i.MX7D Based Boards +======================= + +Building Barebox +---------------- + +To build Barebox for ZII i.MX7 based boards do the following: + +.. code-block:: sh + + make ARCH=arm CROSS_COMPILE= mrproper + make ARCH=arm CROSS_COMPILE= imx_v7_defconfig + make ARCH=arm CROSS_COMPILE= + +Uploading Barebox via JTAG +-------------------------- + +Barebox can be bootstrapped via JTAG using OpenOCD (latest master) as +follows: + +.. code-block:: sh + + cd barebox + Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh + +A custom OpenOCD binary and options can be specified as follows: + +.. code-block:: sh + + OPENOCD="../openocd/src/openocd -s ../openocd/tcl " \ + Documentation/boards/imx/zii-imx7d-dev/bootstrap.sh + + +Disabling DSA in Embedeed Switch +-------------------------------- + +Booting the Linux kernel that the device ships with will re-configure the on-board +switch into DSA mode, which would make the Ethernet connection unusable in +Barebox. To undo that and re-configure the switch into dumb/pass-through +mode, do the following: + +.. code-block:: sh + + memset -b -d /dev/switch-eeprom 0x00 0xff 4 + +Once that is done, power cycling the device should force the switch to +re-read the EEPROM and reconfigure itself. diff --git a/Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh b/Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh deleted file mode 100755 index 49bab03200..0000000000 --- a/Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh +++ /dev/null @@ -1,6 +0,0 @@ -#!/bin/sh - -OPENOCD=${OPENOCD:-openocd} -DIR=$(CDPATH= cd -- "$(dirname -- "$0")" && pwd) - -${OPENOCD} -f ${DIR}/openocd.cfg --command "adapter_khz 10000; init; safe_reset; start_barebox;" diff --git a/Documentation/boards/imx/zii-imx7d-rpu2/openocd.cfg b/Documentation/boards/imx/zii-imx7d-rpu2/openocd.cfg deleted file mode 100644 index 33e3bce9dc..0000000000 --- a/Documentation/boards/imx/zii-imx7d-rpu2/openocd.cfg +++ /dev/null @@ -1,143 +0,0 @@ -# -# Board configuration file for the Zodiac RPU2 board -# - -interface ftdi -ftdi_vid_pid 0x0403 0x6011 - -ftdi_layout_init 0x0038 0x007b -ftdi_layout_signal nSRST -data 0x0010 -ftdi_layout_signal LED -data 0x0020 - -transport select jtag - -reset_config srst_only srst_push_pull connect_deassert_srst - -# set a slow default JTAG clock, can be overridden later -adapter_khz 1000 - -# need at least 100ms delay after SRST release for JTAG -adapter_nsrst_delay 100 - -# source the target file -source [find target/imx7.cfg] -source [find mem_helper.tcl] - -# function to disable the on-chip watchdog -proc disable_wdog { } { - echo "Bootstrap: Disabling SoC watchdog" - mwh phys 0x30280008 0x00 -} - -set ddr_init_failed 0 - -proc check_bits_set_32 { addr mask } { - while { [expr [mrw $addr] & $mask] == 0 } { } -} - -proc ddr_init { } { - echo "Bootstrap: Initializing DDR" - - mww phys 0x30340004 0x4F400005 - # Clear then set bit30 to ensure exit from DDR retention - mww phys 0x30360388 0x40000000 - mww phys 0x30360384 0x40000000 - - mww phys 0x30391000 0x00000002 - mww phys 0x307a0000 0x01040001 - mww phys 0x307a01a0 0x80400003 - mww phys 0x307a01a4 0x00100020 - mww phys 0x307a01a8 0x80100004 - mww phys 0x307a0064 0x00400046 - mww phys 0x307a0490 0x00000001 - mww phys 0x307a00d0 0x00020083 - mww phys 0x307a00d4 0x00690000 - mww phys 0x307a00dc 0x09300004 - mww phys 0x307a00e0 0x04080000 - mww phys 0x307a00e4 0x00100004 - mww phys 0x307a00f4 0x0000033f - mww phys 0x307a0100 0x09081109 - mww phys 0x307a0104 0x0007020d - mww phys 0x307a0108 0x03040407 - mww phys 0x307a010c 0x00002006 - mww phys 0x307a0110 0x04020205 - mww phys 0x307a0114 0x03030202 - mww phys 0x307a0120 0x00000803 - mww phys 0x307a0180 0x00800020 - mww phys 0x307a0184 0x02000100 - mww phys 0x307a0190 0x02098204 - mww phys 0x307a0194 0x00030303 - mww phys 0x307a0200 0x00000016 - mww phys 0x307a0204 0x00171717 - mww phys 0x307a0214 0x04040404 - mww phys 0x307a0218 0x0f040404 - mww phys 0x307a0240 0x06000604 - mww phys 0x307a0244 0x00000001 - mww phys 0x30391000 0x00000000 - mww phys 0x30790000 0x17420f40 - mww phys 0x30790004 0x10210100 - mww phys 0x30790010 0x00060807 - mww phys 0x307900b0 0x1010007e - mww phys 0x3079009c 0x00000d6e - mww phys 0x30790020 0x08080808 - mww phys 0x30790030 0x08080808 - mww phys 0x30790050 0x01000010 - mww phys 0x30790050 0x00000010 - - mww phys 0x307900c0 0x0e407304 - mww phys 0x307900c0 0x0e447304 - mww phys 0x307900c0 0x0e447306 - - check_bits_set_32 0x307900c4 0x1 - - mww phys 0x307900c0 0x0e447304 - mww phys 0x307900c0 0x0e407304 - - mww phys 0x30384130 0x00000000 - mww phys 0x30340020 0x00000178 - mww phys 0x30384130 0x00000002 - mww phys 0x30790018 0x0000000f - - check_bits_set_32 0x307900c4 0x1 -} - -# This function applies the initial configuration after a "reset init" -# command -proc board_init { } { - global ddr_init_failed - disable_wdog - - if {[catch {ddr_init} errmsg]} { - set ddr_init_failed 1 - } else { - set ddr_init_failed 0 - } -} - -proc safe_reset {} { - global ddr_init_failed - - set status 5 - while { $status != 0 } { - reset init - if { $ddr_init_failed == 1 } { - incr status -1 - } else { - set status 0 - } - } -} - -proc start_barebox { } { - set MX7_DDR_BASE_ADDR 0x80000000 - echo "Bootstrap: Loading Barebox" - halt - load_image images/barebox-zii-imx7d-rpu2.img $MX7_DDR_BASE_ADDR bin - arm core_state arm - echo [format "Bootstrap: Jumping to 0x%08x" $MX7_DDR_BASE_ADDR] - resume $MX7_DDR_BASE_ADDR -} - -# hook the init function into the reset-init event -${_TARGETNAME}.0 configure -event reset-init { board_init } - diff --git a/Documentation/boards/imx/zii-imx7d-rpu2/readme.rst b/Documentation/boards/imx/zii-imx7d-rpu2/readme.rst deleted file mode 100644 index dd984ac176..0000000000 --- a/Documentation/boards/imx/zii-imx7d-rpu2/readme.rst +++ /dev/null @@ -1,47 +0,0 @@ -ZII i.MX7D Based Boards -======================= - -Building Barebox ----------------- - -To build Barebox for ZII i.MX7 based boards do the following: - -.. code-block:: sh - - make ARCH=arm CROSS_COMPILE= mrproper - make ARCH=arm CROSS_COMPILE= imx_v7_defconfig - make ARCH=arm CROSS_COMPILE= - -Uploading Barebox via JTAG --------------------------- - -Barebox can be bootstrapped via JTAG using OpenOCD (latest master) as -follows: - -.. code-block:: sh - - cd barebox - Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh - -A custom OpenOCD binary and options can be specified as follows: - -.. code-block:: sh - - OPENOCD="../openocd/src/openocd -s ../openocd/tcl " \ - Documentation/boards/imx/zii-imx7d-rpu2/bootstrap.sh - - -Disabling DSA in Embedeed Switch --------------------------------- - -Booting the Linux kernel that the device ships with will re-configure the on-board -switch into DSA mode, which would make the Ethernet connection unusable in -Barebox. To undo that and re-configure the switch into dumb/pass-through -mode, do the following: - -.. code-block:: sh - - memset -b -d /dev/switch-eeprom 0x00 0xff 4 - -Once that is done, power cycling the device should force the switch to -re-read the EEPROM and reconfigure itself. diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index bdf78d068d..a814ab8239 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -164,7 +164,7 @@ obj-$(CONFIG_MACH_ZII_RDU1) += zii-imx51-rdu1/ obj-$(CONFIG_MACH_ZII_RDU2) += zii-imx6q-rdu2/ obj-$(CONFIG_MACH_ZII_IMX8MQ_DEV) += zii-imx8mq-dev/ obj-$(CONFIG_MACH_ZII_VF610_DEV) += zii-vf610-dev/ -obj-$(CONFIG_MACH_ZII_IMX7D_RPU2) += zii-imx7d-rpu2/ +obj-$(CONFIG_MACH_ZII_IMX7D_DEV) += zii-imx7d-dev/ obj-$(CONFIG_MACH_WAGO_PFC_AM35XX) += wago-pfc-am35xx/ obj-$(CONFIG_MACH_LS1046ARDB) += ls1046ardb/ obj-$(CONFIG_MACH_TQMLS1046A) += tqmls1046a/ diff --git a/arch/arm/boards/zii-imx7d-dev/Makefile b/arch/arm/boards/zii-imx7d-dev/Makefile new file mode 100644 index 0000000000..01c7a259e9 --- /dev/null +++ b/arch/arm/boards/zii-imx7d-dev/Makefile @@ -0,0 +1,2 @@ +obj-y += board.o +lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-imx7d-dev/board.c b/arch/arm/boards/zii-imx7d-dev/board.c new file mode 100644 index 0000000000..0a99976b7d --- /dev/null +++ b/arch/arm/boards/zii-imx7d-dev/board.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright (C) 2018 Zodiac Inflight Innovation + * Author: Andrey Smirnov + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static void zii_imx7d_rpu2_init_fec(void) +{ + void __iomem *gpr = IOMEM(MX7_IOMUXC_GPR_BASE_ADDR); + uint32_t gpr1; + + /* + * Make sure we do not drive ENETn_TX_CLK signal + */ + gpr1 = readl(gpr + IOMUXC_GPR1); + gpr1 &= ~(IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK | + IMX7D_GPR1_ENET1_CLK_DIR_MASK | + IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK | + IMX7D_GPR1_ENET2_CLK_DIR_MASK); + writel(gpr1, gpr + IOMUXC_GPR1); +} + +static int zii_imx7d_rpu2_coredevices_init(void) +{ + if (!of_machine_is_compatible("zii,imx7d-zii-rpu2")) + return 0; + + zii_imx7d_rpu2_init_fec(); + + imx7_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox", + BBU_HANDLER_FLAG_DEFAULT); + + imx7_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", 0); + + return 0; +} +coredevice_initcall(zii_imx7d_rpu2_coredevices_init); + diff --git a/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg b/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg new file mode 100644 index 0000000000..46f3d95048 --- /dev/null +++ b/arch/arm/boards/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg @@ -0,0 +1,6 @@ +soc imx7 +loadaddr 0x80000000 +dcdofs 0x400 + +#include + diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c new file mode 100644 index 0000000000..d7f8feb951 --- /dev/null +++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright (C) 2018 Zodiac Inflight Innovation + * Author: Andrey Smirnov + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern char __dtb_imx7d_zii_rpu2_start[]; + +static inline void setup_uart(void) +{ + void __iomem *iomux = IOMEM(MX7_IOMUXC_BASE_ADDR); + void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR); + + writel(CCM_CCGR_SETTINGn_NEEDED(0), + ccm + CCM_CCGRn_CLR(CCM_CCGR_UART2)); + writel(CCM_TARGET_ROOTn_ENABLE | UART2_CLK_ROOT__OSC_24M, + ccm + CCM_TARGET_ROOTn(UART2_CLK_ROOT)); + writel(CCM_CCGR_SETTINGn_NEEDED(0), + ccm + CCM_CCGRn_SET(CCM_CCGR_UART2)); + + mx7_setup_pad(iomux, MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX); + + imx7_uart_setup_ll(); + + putc_ll('>'); +} + +ENTRY_FUNCTION(start_zii_imx7d_dev, r0, r1, r2) +{ + imx7_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + imx7d_barebox_entry(__dtb_imx7d_zii_rpu2_start + get_runtime_offset()); +} diff --git a/arch/arm/boards/zii-imx7d-rpu2/Makefile b/arch/arm/boards/zii-imx7d-rpu2/Makefile deleted file mode 100644 index 01c7a259e9..0000000000 --- a/arch/arm/boards/zii-imx7d-rpu2/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-y += board.o -lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-imx7d-rpu2/board.c b/arch/arm/boards/zii-imx7d-rpu2/board.c deleted file mode 100644 index 0a99976b7d..0000000000 --- a/arch/arm/boards/zii-imx7d-rpu2/board.c +++ /dev/null @@ -1,49 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -/* - * Copyright (C) 2018 Zodiac Inflight Innovation - * Author: Andrey Smirnov - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static void zii_imx7d_rpu2_init_fec(void) -{ - void __iomem *gpr = IOMEM(MX7_IOMUXC_GPR_BASE_ADDR); - uint32_t gpr1; - - /* - * Make sure we do not drive ENETn_TX_CLK signal - */ - gpr1 = readl(gpr + IOMUXC_GPR1); - gpr1 &= ~(IMX7D_GPR1_ENET1_TX_CLK_SEL_MASK | - IMX7D_GPR1_ENET1_CLK_DIR_MASK | - IMX7D_GPR1_ENET2_TX_CLK_SEL_MASK | - IMX7D_GPR1_ENET2_CLK_DIR_MASK); - writel(gpr1, gpr + IOMUXC_GPR1); -} - -static int zii_imx7d_rpu2_coredevices_init(void) -{ - if (!of_machine_is_compatible("zii,imx7d-zii-rpu2")) - return 0; - - zii_imx7d_rpu2_init_fec(); - - imx7_bbu_internal_spi_i2c_register_handler("SPI", "/dev/m25p0.barebox", - BBU_HANDLER_FLAG_DEFAULT); - - imx7_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", 0); - - return 0; -} -coredevice_initcall(zii_imx7d_rpu2_coredevices_init); - diff --git a/arch/arm/boards/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg b/arch/arm/boards/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg deleted file mode 100644 index 46f3d95048..0000000000 --- a/arch/arm/boards/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg +++ /dev/null @@ -1,6 +0,0 @@ -soc imx7 -loadaddr 0x80000000 -dcdofs 0x400 - -#include - diff --git a/arch/arm/boards/zii-imx7d-rpu2/lowlevel.c b/arch/arm/boards/zii-imx7d-rpu2/lowlevel.c deleted file mode 100644 index 1eeab7d216..0000000000 --- a/arch/arm/boards/zii-imx7d-rpu2/lowlevel.c +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ - -/* - * Copyright (C) 2018 Zodiac Inflight Innovation - * Author: Andrey Smirnov - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -extern char __dtb_imx7d_zii_rpu2_start[]; - -static inline void setup_uart(void) -{ - void __iomem *iomux = IOMEM(MX7_IOMUXC_BASE_ADDR); - void __iomem *ccm = IOMEM(MX7_CCM_BASE_ADDR); - - writel(CCM_CCGR_SETTINGn_NEEDED(0), - ccm + CCM_CCGRn_CLR(CCM_CCGR_UART2)); - writel(CCM_TARGET_ROOTn_ENABLE | UART2_CLK_ROOT__OSC_24M, - ccm + CCM_TARGET_ROOTn(UART2_CLK_ROOT)); - writel(CCM_CCGR_SETTINGn_NEEDED(0), - ccm + CCM_CCGRn_SET(CCM_CCGR_UART2)); - - mx7_setup_pad(iomux, MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX); - - imx7_uart_setup_ll(); - - putc_ll('>'); -} - -ENTRY_FUNCTION(start_zii_imx7d_rpu2, r0, r1, r2) -{ - imx7_cpu_lowlevel_init(); - - if (IS_ENABLED(CONFIG_DEBUG_LL)) - setup_uart(); - - imx7d_barebox_entry(__dtb_imx7d_zii_rpu2_start + get_runtime_offset()); -} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 561653930b..4c79b9880c 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -133,7 +133,7 @@ pbl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o pbl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o pbl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_IMX7D_RPU2) += imx7d-zii-rpu2.dtb.o +pbl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o pbl-dtb-$(CONFIG_MACH_WAGO_PFC_AM35XX) += am35xx-pfc-750_820x.dtb.o pbl-dtb-$(CONFIG_MACH_LS1046ARDB) += fsl-ls1046a-rdb.dtb.o pbl-dtb-$(CONFIG_MACH_TQMLS1046A) += fsl-tqmls1046a-mbls10xxa.dtb.o diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 6a6aab634c..b9374fe1db 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -461,8 +461,8 @@ config MACH_ZII_VF610_DEV select ARCH_VF610 select CLKDEV_LOOKUP -config MACH_ZII_IMX7D_RPU2 - bool "ZII i.MX7D RPU2" +config MACH_ZII_IMX7D_DEV + bool "ZII i.MX7D based devices" select ARCH_IMX7 config MACH_PHYTEC_PHYCORE_IMX7 diff --git a/images/Makefile.imx b/images/Makefile.imx index 9a7187ac78..826e774aaf 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -551,10 +551,10 @@ CFG_start_imx7s_element14_warp7.pblb.imximg = $(board)/element14-warp7/flash-hea FILE_barebox-element14-imx7s-warp7.img = start_imx7s_element14_warp7.pblb.imximg image-$(CONFIG_MACH_WARP7) += barebox-element14-imx7s-warp7.img -pblb-$(CONFIG_MACH_ZII_IMX7D_RPU2) += start_zii_imx7d_rpu2 -CFG_start_zii_imx7d_rpu2.pblb.imximg = $(board)/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg -FILE_barebox-zii-imx7d-rpu2.img = start_zii_imx7d_rpu2.pblb.imximg -image-$(CONFIG_MACH_ZII_IMX7D_RPU2) += barebox-zii-imx7d-rpu2.img +pblb-$(CONFIG_MACH_ZII_IMX7D_DEV) += start_zii_imx7d_dev +CFG_start_zii_imx7d_dev.pblb.imximg = $(board)/zii-imx7d-dev/flash-header-zii-imx7d-dev.imxcfg +FILE_barebox-zii-imx7d-dev.img = start_zii_imx7d_dev.pblb.imximg +image-$(CONFIG_MACH_ZII_IMX7D_DEV) += barebox-zii-imx7d-dev.img # ----------------------- i.MX8mq based boards -------------------------- pblb-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += start_nxp_imx8mq_evk -- cgit v1.2.3 From 943a59d1808597496b5234cbd27cb967ab4ce070 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:15 -0700 Subject: ARM: imx7d-zii-rpu2: Switch to using kernel DTS Now that it is availible, switch to using kernel DTS. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/dts/imx7d-zii-rpu2.dts | 608 +--------------------------------------- 1 file changed, 7 insertions(+), 601 deletions(-) (limited to 'arch/arm/dts') diff --git a/arch/arm/dts/imx7d-zii-rpu2.dts b/arch/arm/dts/imx7d-zii-rpu2.dts index 24a6d40f77..f8d6e89046 100644 --- a/arch/arm/dts/imx7d-zii-rpu2.dts +++ b/arch/arm/dts/imx7d-zii-rpu2.dts @@ -3,19 +3,17 @@ /* * Copyright (C) 2018 Zodiac Inflight Innovations */ - -/dts-v1/; - -#include -#include +#include #include "imx7d-ddrc.dtsi" / { - model = "ZII RPU2 Board"; - compatible = "zii,imx7d-zii-rpu2","fsl,imx7d"; - chosen { + /* + * Kernel DTS incorrectly specifies stdout-path as + * &uart1, this can be removed once the fix trickles + * down + */ stdout-path = &uart2; }; @@ -25,598 +23,6 @@ * the switch shared DT node with it, so we use that * fact to create a desirable naming */ - switch-eeprom = &switch0; + switch-eeprom = &switch; }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-0 = <&pinctrl_leds_debug>; - pinctrl-names = "default"; - - debug { - label = "zii:green:debug1"; - gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - regulators { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - - reg_usb_otg1_vbus: regulator@0 { - compatible = "regulator-fixed"; - reg = <0>; - regulator-name = "usb_otg1_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_usb_otg2_vbus: regulator@1 { - compatible = "regulator-fixed"; - reg = <1>; - regulator-name = "usb_otg2_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - reg_sd1_vmmc: regulator@3 { - compatible = "regulator-fixed"; - regulator-name = "VDD_SD1"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; - startup-delay-us = <200000>; - enable-active-high; - }; - - reg_can1_3v3: regulator@4 { - compatible = "regulator-fixed"; - reg = <4>; - regulator-name = "can1-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 8 GPIO_ACTIVE_LOW>; - }; - - reg_can2_3v3: regulator@5 { - compatible = "regulator-fixed"; - reg = <5>; - regulator-name = "can2-3v3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - gpio = <&gpio1 9 GPIO_ACTIVE_LOW>; - }; - - reg_vref_1v8: regulator@6 { - compatible = "regulator-fixed"; - reg = <6>; - regulator-name = "vref-1v8"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - }; - - wlreg_on: fixedregulator@100 { - compatible = "regulator-fixed"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-name = "wlreg_on"; - gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; - startup-delay-us = <100>; - enable-active-high; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "GEN_3V3"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - reg_5p0v_main: regulator-5p0v-main { - compatible = "regulator-fixed"; - regulator-name = "5V_MAIN"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-always-on; - }; - }; -}; - -&adc1 { - vref-supply = <®_vref_1v8>; - status = "okay"; -}; - -&adc2 { - vref-supply = <®_vref_1v8>; - status = "okay"; -}; - -&cpu0 { - arm-supply = <&sw1a_reg>; }; - -&clks { - assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>; - assigned-clock-rates = <884736000>; -}; - -&ecspi1 { - fsl,spi-num-chipselects = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_ecspi1>; - status = "okay"; - - cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; - - nor_flash: nor-flash@0 { - compatible = "jedec,spi-nor"; - spi-max-frequency = <20000000>; - reg = <0>; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0xc0000>; - }; - - partition@c0000 { - label = "barebox-environment"; - reg = <0xc0000 0x40000>; - }; - }; -}; - -&fec1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet1>; - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; - assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; - assigned-clock-rates = <0>, <100000000>; - phy-mode = "rgmii-id"; - phy-handle = <&port_fec1>; - status = "okay"; - - mdio1: mdio { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - switch0: switch0@0 { - compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0>; - eeprom-length = <512>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - port@0 { - reg = <0>; - label = "eth_cu_1000_1"; - }; - port@1 { - reg = <1>; - label = "eth_cu_1000_2"; - }; - - port@2 { - reg = <2>; - label = "pic"; - - fixed-link { - speed = <100>; - full-duplex; - }; - }; - - port_fec1: port@5 { - reg = <5>; - label = "cpu"; - ethernet = <&fec1>; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port_fec2: port@6 { - reg = <6>; - label = "data"; - - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - }; - }; - }; -}; - -&fec2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet2>; - assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>, - <&clks IMX7D_ENET2_TIME_ROOT_CLK>; - assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; - assigned-clock-rates = <0>, <100000000>; - phy-mode = "rgmii-id"; - phy-handle = <&port_fec1>; - fsl,magic-packet; - status = "okay"; -}; - -&i2c1 { - clock-frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c1>; - pinctrl-1 = <&pinctrl_i2c1_gpio>; - scl-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>; - status = "okay"; - - nameplate_eeprom: at24c04@50 { - compatible = "atmel,24c04"; - #address-cells=<1>; - #size-cells=<1>; - reg = <0x50>; - }; - - sandbox_eeprom: at24c04@52 { - compatible = "atmel,24c04"; - reg = <0x52>; - }; -}; - -&i2c2 { - clock-frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c2>; - pinctrl-1 = <&pinctrl_i2c2_gpio>; - scl-gpios = <&gpio4 10 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio4 11 GPIO_ACTIVE_HIGH>; - status = "okay"; -}; - -&i2c3 { - clock-frequency = <100000>; - pinctrl-names = "default", "gpio"; - pinctrl-0 = <&pinctrl_i2c3>; - pinctrl-1 = <&pinctrl_i2c3_gpio>; - scl-gpios = <&gpio4 12 GPIO_ACTIVE_HIGH>; - sda-gpios = <&gpio4 13 GPIO_ACTIVE_HIGH>; - status = "okay"; - - pfuze3000@08 { - compatible = "fsl,pfuze3000"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1a { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw1c_reg: sw1b { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <1850000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1650000>; - regulator-boot-on; - regulator-always-on; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vldo1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen2_reg: vldo2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - regulator-always-on; - }; - - vgen3_reg: vccsd { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen4_reg: v33 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vldo4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; -}; - -&sdma { - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart2>; - assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; - status = "okay"; -}; - -&uart4 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart4>; - assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>; - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; - status = "okay"; - - rave-sp { - compatible = "zii,rave-sp-rdu2"; - current-speed = <1000000>; - #address-cells = <1>; - #size-cells = <1>; - - watchdog { - compatible = "zii,rave-sp-watchdog"; - nvmem-cells = <&boot_source>; - nvmem-cell-names = "boot-source"; - }; - - eeprom@a3 { - compatible = "zii,rave-sp-eeprom"; - reg = <0xa3 0x4000>; - #address-cells = <1>; - #size-cells = <1>; - zii,eeprom-name = "main-eeprom"; - - boot_source: boot-source@83 { - reg = <0x83 1>; - }; - }; - }; -}; - -&usbotg1 { - vbus-supply = <®_usb_otg1_vbus>; - srp-disable; - hnp-disable; - adp-disable; - status = "okay"; -}; - -&usbotg2 { - vbus-supply = <®_usb_otg2_vbus>; - dr_mode = "host"; - status = "okay"; -}; - -&usdhc1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc1>; - keep-power-in-suspend; - bus-width = <4>; - no-1-8-v; - status = "okay"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - bus-width = <8>; - non-removable; - no-1-8-v; - keep-power-in-suspend; - status = "okay"; -}; - -&wdog1 { - fsl,wdog_b; -}; - - -&iomuxc { - pinctrl_leds_debug: debuggrp { - fsl,pins = < - MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59 /* HB_LED */ - >; - }; - - pinctrl_enet1: enet1grp { - fsl,pins = < - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 - >; - }; - - pinctrl_enet2: enet2grp { - fsl,pins = < - MX7D_PAD_EPDC_GDSP__ENET2_RGMII_TXC 0x1 - MX7D_PAD_EPDC_SDCE2__ENET2_RGMII_TD0 0x1 - MX7D_PAD_EPDC_SDCE3__ENET2_RGMII_TD1 0x1 - MX7D_PAD_EPDC_GDCLK__ENET2_RGMII_TD2 0x1 - MX7D_PAD_EPDC_GDOE__ENET2_RGMII_TD3 0x1 - MX7D_PAD_EPDC_GDRL__ENET2_RGMII_TX_CTL 0x1 - MX7D_PAD_EPDC_SDCE1__ENET2_RGMII_RXC 0x1 - MX7D_PAD_EPDC_SDCLK__ENET2_RGMII_RD0 0x1 - MX7D_PAD_EPDC_SDLE__ENET2_RGMII_RD1 0x1 - MX7D_PAD_EPDC_SDOE__ENET2_RGMII_RD2 0x1 - MX7D_PAD_EPDC_SDSHR__ENET2_RGMII_RD3 0x1 - MX7D_PAD_EPDC_SDCE0__ENET2_RGMII_RX_CTL 0x1 - MX7D_PAD_UART1_TX_DATA__ENET2_1588_EVENT0_OUT 0x1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f - MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f - >; - }; - - pinctrl_i2c1_gpio: i2c1gpiogrp { - fsl,pins = < - MX7D_PAD_I2C1_SDA__GPIO4_IO9 0x4000007f - MX7D_PAD_I2C1_SCL__GPIO4_IO8 0x4000007f - >; - }; - - pinctrl_i2c2: i2c2grp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f - MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f - >; - }; - - pinctrl_i2c2_gpio: i2c2gpiogrp { - fsl,pins = < - MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x4000007f - MX7D_PAD_I2C2_SCL__GPIO4_IO10 0x4000007f - >; - }; - - pinctrl_i2c3: i2c3grp { - fsl,pins = < - MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f - MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f - >; - }; - - pinctrl_i2c3_gpio: i2c3gpiogrp { - fsl,pins = < - MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x4000007f - MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x4000007f - >; - }; - - pinctrl_i2c4: i2c4grp { - fsl,pins = < - MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f - MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f - >; - }; - - pinctrl_i2c4_gpio: i2c4gpiogrp { - fsl,pins = < - MX7D_PAD_SAI1_RX_BCLK__GPIO6_IO17 0x4000007f - MX7D_PAD_SAI1_RX_SYNC__GPIO6_IO16 0x4000007f - >; - }; - - pinctrl_ecspi1: ecspi1grp { - fsl,pins = < - MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2 - MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2 - MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2 - MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59 - >; - }; - - pinctrl_uart2: uart2grp { - fsl,pins = < - MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79 - MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79 - >; - }; - - pinctrl_uart4: uart4grp { - fsl,pins = < - MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79 - MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79 - >; - }; - - pinctrl_usdhc1: usdhc1grp { - fsl,pins = < - MX7D_PAD_SD1_CMD__SD1_CMD 0x59 - MX7D_PAD_SD1_CLK__SD1_CLK 0x19 - MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 - MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 - MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 - MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX7D_PAD_SD3_CMD__SD3_CMD 0x59 - MX7D_PAD_SD3_CLK__SD3_CLK 0x19 - MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 - MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 - MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 - MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 - MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 - MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 - MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 - MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 - MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59 - >; - }; -}; - -- cgit v1.2.3 From bc482d1ab37b8aeb8cbb0aa380df93ff6e73c9bc Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Fri, 21 Jun 2019 01:11:16 -0700 Subject: ARM: zii-imx7d-dev: Add support for RMU2 board Add support for Remote Modem Unit i.MX7D board. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx7d-dev/Makefile | 1 + arch/arm/boards/zii-imx7d-dev/board.c | 3 +- arch/arm/boards/zii-imx7d-dev/lowlevel.c | 60 ++++- arch/arm/dts/Makefile | 2 +- arch/arm/dts/imx7d-zii-rmu2.dts | 8 + arch/arm/dts/imx7d-zii-rmu2.dtsi | 361 +++++++++++++++++++++++++++++++ 6 files changed, 432 insertions(+), 3 deletions(-) create mode 100644 arch/arm/dts/imx7d-zii-rmu2.dts create mode 100644 arch/arm/dts/imx7d-zii-rmu2.dtsi (limited to 'arch/arm/dts') diff --git a/arch/arm/boards/zii-imx7d-dev/Makefile b/arch/arm/boards/zii-imx7d-dev/Makefile index 01c7a259e9..e1baed17ba 100644 --- a/arch/arm/boards/zii-imx7d-dev/Makefile +++ b/arch/arm/boards/zii-imx7d-dev/Makefile @@ -1,2 +1,3 @@ +CFLAGS_pbl-lowlevel.o := -fno-tree-switch-conversion -fno-jump-tables obj-y += board.o lwl-y += lowlevel.o diff --git a/arch/arm/boards/zii-imx7d-dev/board.c b/arch/arm/boards/zii-imx7d-dev/board.c index 0a99976b7d..89f0515306 100644 --- a/arch/arm/boards/zii-imx7d-dev/board.c +++ b/arch/arm/boards/zii-imx7d-dev/board.c @@ -33,7 +33,8 @@ static void zii_imx7d_rpu2_init_fec(void) static int zii_imx7d_rpu2_coredevices_init(void) { - if (!of_machine_is_compatible("zii,imx7d-zii-rpu2")) + if (!of_machine_is_compatible("zii,imx7d-zii-rpu2") && + !of_machine_is_compatible("zii,imx7d-rmu2")) return 0; zii_imx7d_rpu2_init_fec(); diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c index d7f8feb951..3ad4940da8 100644 --- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c @@ -19,6 +19,7 @@ #include extern char __dtb_imx7d_zii_rpu2_start[]; +extern char __dtb_imx7d_zii_rmu2_start[]; static inline void setup_uart(void) { @@ -39,12 +40,69 @@ static inline void setup_uart(void) putc_ll('>'); } +enum zii_platform_imx7d_type { + ZII_PLATFORM_IMX7D_RPU2 = 0b0000, + ZII_PLATFORM_IMX7D_RMU2 = 0b1000, +}; + +static unsigned int get_system_type(void) +{ +#define GPIO_DR 0x000 +#define GPIO_GDIR 0x004 +#define SYSTEM_TYPE GENMASK(15, 12) + + u32 gdir, dr; + void __iomem *gpio2 = IOMEM(MX7_GPIO2_BASE_ADDR); + void __iomem *iomuxbase = IOMEM(MX7_IOMUXC_BASE_ADDR); + + /* + * System type is encoded as a 4-bit number specified by the + * following pins (pulled up or down with resistors on the + * board). + */ + imx_setup_pad(iomuxbase, MX7D_PAD_EPDC_DATA12__GPIO2_IO12); + imx_setup_pad(iomuxbase, MX7D_PAD_EPDC_DATA13__GPIO2_IO13); + imx_setup_pad(iomuxbase, MX7D_PAD_EPDC_DATA14__GPIO2_IO14); + imx_setup_pad(iomuxbase, MX7D_PAD_EPDC_DATA15__GPIO2_IO15); + + gdir = readl(gpio2 + GPIO_GDIR); + gdir &= ~SYSTEM_TYPE; + writel(gdir, gpio2 + GPIO_GDIR); + + dr = readl(gpio2 + GPIO_DR); + + return FIELD_GET(SYSTEM_TYPE, dr); +} + ENTRY_FUNCTION(start_zii_imx7d_dev, r0, r1, r2) { + void *fdt; + const unsigned int system_type = get_system_type(); + imx7_cpu_lowlevel_init(); if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); - imx7d_barebox_entry(__dtb_imx7d_zii_rpu2_start + get_runtime_offset()); + switch (system_type) { + default: + if (IS_ENABLED(CONFIG_DEBUG_LL)) { + relocate_to_current_adr(); + setup_c(); + puts_ll("\n*********************************\n"); + puts_ll("* Unknown system type: "); + puthex_ll(system_type); + puts_ll("\n* Assuming RPU2\n"); + puts_ll("*********************************\n"); + } + /* FALLTHROUGH */ + case ZII_PLATFORM_IMX7D_RPU2: + fdt = __dtb_imx7d_zii_rpu2_start; + break; + case ZII_PLATFORM_IMX7D_RMU2: + fdt = __dtb_imx7d_zii_rmu2_start; + break; + } + + imx7d_barebox_entry(fdt + get_runtime_offset()); } diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 4c79b9880c..010408bd59 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -133,7 +133,7 @@ pbl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o pbl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o pbl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o -pbl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o +pbl-dtb-$(CONFIG_MACH_ZII_IMX7D_DEV) += imx7d-zii-rpu2.dtb.o imx7d-zii-rmu2.dtb.o pbl-dtb-$(CONFIG_MACH_WAGO_PFC_AM35XX) += am35xx-pfc-750_820x.dtb.o pbl-dtb-$(CONFIG_MACH_LS1046ARDB) += fsl-ls1046a-rdb.dtb.o pbl-dtb-$(CONFIG_MACH_TQMLS1046A) += fsl-tqmls1046a-mbls10xxa.dtb.o diff --git a/arch/arm/dts/imx7d-zii-rmu2.dts b/arch/arm/dts/imx7d-zii-rmu2.dts new file mode 100644 index 0000000000..1d0d631de7 --- /dev/null +++ b/arch/arm/dts/imx7d-zii-rmu2.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) + +/* + * Copyright (C) 2019 Zodiac Inflight Innovations + */ + +#include "imx7d-zii-rmu2.dtsi" +#include "imx7d-ddrc.dtsi" diff --git a/arch/arm/dts/imx7d-zii-rmu2.dtsi b/arch/arm/dts/imx7d-zii-rmu2.dtsi new file mode 100644 index 0000000000..7b36b1c0e3 --- /dev/null +++ b/arch/arm/dts/imx7d-zii-rmu2.dtsi @@ -0,0 +1,361 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Device tree file for ZII's RMU2 board + * + * RMU - Remote Modem Unit + * + * Copyright (C) 2019 Zodiac Inflight Innovations + */ + +/dts-v1/; +#include +#include + +/ { + model = "ZII RMU2 Board"; + compatible = "zii,imx7d-rmu2", "fsl,imx7d"; + + chosen { + stdout-path = &uart2; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pinctrl_leds_debug>; + pinctrl-names = "default"; + + debug { + label = "zii:green:debug1"; + gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "heartbeat"; + }; + }; +}; + +&cpu0 { + arm-supply = <&sw1a_reg>; +}; + +&ecspi1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <&gpio4 19 GPIO_ACTIVE_HIGH>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + spi-max-frequency = <20000000>; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + }; +}; + +&fec1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1>; + assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, + <&clks IMX7D_ENET1_TIME_ROOT_CLK>; + assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; + assigned-clock-rates = <0>, <100000000>; + phy-mode = "rgmii"; + phy-handle = <&fec1_phy>; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + fec1_phy: phy@0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet1_phy_reset>, + <&pinctrl_enet1_phy_interrupt>; + reg = <0>; + interrupt-parent = <&gpio1>; + interrupts = <2 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c1 { + clock-frequency = <100000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; + + pmic: pmic@8 { + compatible = "fsl,pfuze3000"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1a { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1b { + regulator-min-microvolt = <700000>; + regulator-max-microvolt = <1475000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1850000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3 { + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <1650000>; + regulator-boot-on; + regulator-always-on; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vldo1 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen2_reg: vldo2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + regulator-always-on; + }; + + vgen3_reg: vccsd { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen4_reg: v33 { + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vldo3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vldo4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + eeprom@50 { + compatible = "atmel,24c04"; + reg = <0x50>; + }; + + eeprom@52 { + compatible = "atmel,24c04"; + reg = <0x52>; + }; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + assigned-clocks = <&clks IMX7D_UART4_ROOT_SRC>; + assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; + status = "okay"; + + rave-sp { + compatible = "zii,rave-sp-rdu2"; + current-speed = <1000000>; + #address-cells = <1>; + #size-cells = <1>; + + watchdog { + compatible = "zii,rave-sp-watchdog"; + }; + + eeprom@a3 { + compatible = "zii,rave-sp-eeprom"; + reg = <0xa3 0x4000>; + #address-cells = <1>; + #size-cells = <1>; + zii,eeprom-name = "main-eeprom"; + }; + }; +}; + +&usbotg2 { + dr_mode = "host"; + disable-over-current; + status = "okay"; +}; + +&usdhc1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + bus-width = <4>; + no-1-8-v; + no-sdio; + keep-power-in-suspend; + status = "okay"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + bus-width = <8>; + no-1-8-v; + non-removable; + no-sdio; + no-sd; + keep-power-in-suspend; + status = "okay"; +}; + +&wdog1 { + status = "disabled"; +}; + +&snvs_rtc { + status = "disabled"; +}; + +&snvs_pwrkey { + status = "disabled"; +}; + +&iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = < + MX7D_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x2 + MX7D_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x2 + MX7D_PAD_ECSPI1_MISO__ECSPI1_MISO 0x2 + MX7D_PAD_ECSPI1_SS0__GPIO4_IO19 0x59 + >; + }; + + pinctrl_enet1: enet1grp { + fsl,pins = < + MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 + MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 + MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 + MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 + MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 + MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 + MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 + MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 + MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 + MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 + MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 + MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 + MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 + >; + }; + + pinctrl_enet1_phy_reset: enet1phyresetgrp { + fsl,pins = < + MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x14 + + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f + MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f + >; + }; + + pinctrl_leds_debug: debuggrp { + fsl,pins = < + MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x59 + >; + }; + + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX7D_PAD_UART2_RX_DATA__UART2_DCE_RX 0x79 + MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX 0x79 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX7D_PAD_SD2_DATA0__UART4_DCE_RX 0x79 + MX7D_PAD_SD2_DATA1__UART4_DCE_TX 0x79 + >; + }; + + pinctrl_usdhc1: usdhc1grp { + fsl,pins = < + MX7D_PAD_SD1_CMD__SD1_CMD 0x59 + MX7D_PAD_SD1_CLK__SD1_CLK 0x19 + MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 + MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 + MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 + MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX7D_PAD_SD3_CMD__SD3_CMD 0x59 + MX7D_PAD_SD3_CLK__SD3_CLK 0x19 + MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 + MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 + MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 + MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 + MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 + MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 + MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 + MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 + MX7D_PAD_SD3_RESET_B__SD3_RESET_B 0x59 + >; + }; +}; + +&iomuxc_lpsr { + pinctrl_enet1_phy_interrupt: enet1phyinterruptgrp { + fsl,phy = < + MX7D_PAD_LPSR_GPIO1_IO02__GPIO1_IO2 0x08 + >; + }; +}; -- cgit v1.2.3