From b2282c18a4bcbd54f5b88e889b89db7104abba4e Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 10 Jan 2017 07:09:03 -0800 Subject: i.MX: iomuxv3: Add low-level pad code to headers Add a basic low-level pad configuration function that can be used to implement early boot pin configuration code as well as shared with various iomuxv3 and vf610 drivers. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/iomux-v3.h | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm/mach-imx/include/mach/iomux-v3.h') diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h index b8cc9af68a..3bf457f212 100644 --- a/arch/arm/mach-imx/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/include/mach/iomux-v3.h @@ -16,6 +16,8 @@ #ifndef __MACH_IOMUX_V3_H__ #define __MACH_IOMUX_V3_H__ +#include + /* * build IOMUX_PAD structure * @@ -104,6 +106,32 @@ typedef u64 iomux_v3_cfg_t; #define IOMUX_CONFIG_SION (0x1 << 4) +#define SHARE_MUX_CONF_REG 0x1 +#define ZERO_OFFSET_VALID 0x2 + +static inline void iomux_v3_setup_pad(void __iomem *iomux, unsigned int flags, + u32 mux_reg, u32 conf_reg, u32 input_reg, + u32 mux_val, u32 conf_val, u32 input_val) +{ + const bool mux_ok = !!mux_reg || (flags & ZERO_OFFSET_VALID); + const bool conf_ok = !!conf_reg; + const bool input_ok = !!input_reg; + + if (flags & SHARE_MUX_CONF_REG) { + mux_val |= conf_val; + } else { + if (conf_ok) + writel(conf_val, iomux + conf_reg); + } + + if (mux_ok) + writel(mux_val, iomux + mux_reg); + + if (input_ok) + writel(input_val, iomux + input_reg); +} + + /* * setups a single pad in the iomuxer */ -- cgit v1.2.3 From 17a112fe7256b399497be0d44fa974073e606364 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 10 Jan 2017 07:09:04 -0800 Subject: i.MX: iomuxv3: Add helper macros to deconstruct iomux_v3_cfg_t values Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/iomux-v3.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-imx/include/mach/iomux-v3.h') diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h index 3bf457f212..1ecd11befb 100644 --- a/arch/arm/mach-imx/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/include/mach/iomux-v3.h @@ -78,6 +78,14 @@ typedef u64 iomux_v3_cfg_t; ((iomux_v3_cfg_t)(_sel_input_ofs) << MUX_SEL_INPUT_OFS_SHIFT) | \ ((iomux_v3_cfg_t)(_sel_input) << MUX_SEL_INPUT_SHIFT)) +#define IOMUX_PAD_FIELD(name, pad) (((pad) & name##_MASK) >> name##_SHIFT) +#define IOMUX_CTRL_OFS(pad) IOMUX_PAD_FIELD(MUX_CTRL_OFS, pad) +#define IOMUX_MODE(pad) IOMUX_PAD_FIELD(MUX_MODE, pad) +#define IOMUX_SEL_INPUT_OFS(pad) IOMUX_PAD_FIELD(MUX_SEL_INPUT_OFS, pad) +#define IOMUX_SEL_INPUT(pad) IOMUX_PAD_FIELD(MUX_SEL_INPUT, pad) +#define IOMUX_PAD_CTRL_OFS(pad) IOMUX_PAD_FIELD(MUX_PAD_CTRL_OFS, pad) +#define IOMUX_PAD_CTRL(pad) IOMUX_PAD_FIELD(MUX_PAD_CTRL, pad) + #define NEW_PAD_CTRL(cfg, pad) (((cfg) & ~MUX_PAD_CTRL_MASK) | MUX_PAD_CTRL(pad)) /* * Use to set PAD control -- cgit v1.2.3 From 107d6954a62dce2cfd3fd7a2d5b3b6c3a3a32148 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Tue, 10 Jan 2017 07:09:05 -0800 Subject: i.MX: iomuxv3: Add low-level pad configuration routine Add low-level pad configuration routine that can be used by early boot code as well as leveraged by pinmux driver. Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/iomux-v3.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'arch/arm/mach-imx/include/mach/iomux-v3.h') diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h index 1ecd11befb..f877aad89b 100644 --- a/arch/arm/mach-imx/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/include/mach/iomux-v3.h @@ -139,6 +139,23 @@ static inline void iomux_v3_setup_pad(void __iomem *iomux, unsigned int flags, writel(input_val, iomux + input_reg); } +static inline void imx_setup_pad(void __iomem *iomux, iomux_v3_cfg_t pad) +{ + uint32_t pad_ctrl; + + pad_ctrl = IOMUX_PAD_CTRL(pad); + pad_ctrl = (pad_ctrl & NO_PAD_CTRL) ? 0 : pad_ctrl, + + iomux_v3_setup_pad(iomux, 0, + IOMUX_CTRL_OFS(pad), + IOMUX_PAD_CTRL_OFS(pad), + IOMUX_SEL_INPUT_OFS(pad), + IOMUX_MODE(pad), + pad_ctrl, + IOMUX_SEL_INPUT(pad)); +} + + /* * setups a single pad in the iomuxer -- cgit v1.2.3 From ad200f0dc31c1dc89e36e0d2f71707c51e2bc0a1 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 1 Feb 2017 08:19:43 +0100 Subject: pinctrl: i.MX7: Fix LPSR sel_imput setting The i.MX7 has two pinmux controllers, the regular and the LPSR controller. The LPSR pinmux controller doesn't have any sel_input registers, instead they can be found in the regular pinmux controller. This means whenever we want to apply the the sel_input setting for the LPSR controller, we have to apply them to the regular controller instead. In barebox take the easy way out and just add the difference of the two base addresses to the register offset. The same issue is present in the Kernel aswell, but when the bootloader already configured the pins correctly nobody notices when the Kernel sel_input setup effectively is a no-op. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/iomux-v3.h | 8 ++++++++ drivers/pinctrl/imx-iomux-v3.c | 2 +- 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-imx/include/mach/iomux-v3.h') diff --git a/arch/arm/mach-imx/include/mach/iomux-v3.h b/arch/arm/mach-imx/include/mach/iomux-v3.h index f877aad89b..271fe94a00 100644 --- a/arch/arm/mach-imx/include/mach/iomux-v3.h +++ b/arch/arm/mach-imx/include/mach/iomux-v3.h @@ -116,6 +116,7 @@ typedef u64 iomux_v3_cfg_t; #define SHARE_MUX_CONF_REG 0x1 #define ZERO_OFFSET_VALID 0x2 +#define IMX7_PINMUX_LPSR 0x4 static inline void iomux_v3_setup_pad(void __iomem *iomux, unsigned int flags, u32 mux_reg, u32 conf_reg, u32 input_reg, @@ -125,6 +126,13 @@ static inline void iomux_v3_setup_pad(void __iomem *iomux, unsigned int flags, const bool conf_ok = !!conf_reg; const bool input_ok = !!input_reg; + /* + * The sel_input registers for the LPSR controller pins are in the regular pinmux + * controller, so bend the register offset over to the other controller. + */ + if (flags & IMX7_PINMUX_LPSR) + input_reg += 0x70000; + if (flags & SHARE_MUX_CONF_REG) { mux_val |= conf_val; } else { diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index dea4324643..50d7177367 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -177,7 +177,7 @@ static int imx_iomux_v3_probe(struct device_d *dev) } static struct imx_iomux_v3_data imx_iomux_imx7_lpsr_data = { - .flags = ZERO_OFFSET_VALID, + .flags = ZERO_OFFSET_VALID | IMX7_PINMUX_LPSR, }; static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = { -- cgit v1.2.3