From 6a2262de50b2000dd353f1a2d3b00316bc9e18c1 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Sun, 9 Sep 2012 21:02:09 +0200 Subject: ARM i.MX: implement clocksource as driver To get rid of the register definitions in the SoC header files. platform_device_id is used to distinguish between gpt types. Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/imx1-regs.h | 23 ----------------------- arch/arm/mach-imx/include/mach/imx21-regs.h | 24 ------------------------ arch/arm/mach-imx/include/mach/imx25-regs.h | 27 --------------------------- arch/arm/mach-imx/include/mach/imx27-regs.h | 23 ----------------------- arch/arm/mach-imx/include/mach/imx31-regs.h | 27 --------------------------- arch/arm/mach-imx/include/mach/imx35-regs.h | 28 ---------------------------- arch/arm/mach-imx/include/mach/imx51-regs.h | 19 ------------------- arch/arm/mach-imx/include/mach/imx53-regs.h | 19 ------------------- arch/arm/mach-imx/include/mach/imx6-regs.h | 19 ------------------- 9 files changed, 209 deletions(-) (limited to 'arch/arm/mach-imx/include/mach') diff --git a/arch/arm/mach-imx/include/mach/imx1-regs.h b/arch/arm/mach-imx/include/mach/imx1-regs.h index f940cdb4b2..d5ee3f58a6 100644 --- a/arch/arm/mach-imx/include/mach/imx1-regs.h +++ b/arch/arm/mach-imx/include/mach/imx1-regs.h @@ -207,27 +207,4 @@ #define PD31_PF_TMR2OUT ( GPIO_PORTD | GPIO_PF | 31 ) #define PD31_BIN_SPI2_TXD ( GPIO_PORTD | GPIO_BIN | 31 ) -/* - * Definitions for the clocksource driver - */ -/* Part 1: Registers */ -# define GPT_TCTL 0x00 -# define GPT_TPRER 0x04 -# define GPT_TCMP 0x08 -# define GPT_TCR 0x0c -# define GPT_TCN 0x10 -# define GPT_TSTAT 0x14 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<8) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (1) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #endif /* _IMX1_REGS_H */ diff --git a/arch/arm/mach-imx/include/mach/imx21-regs.h b/arch/arm/mach-imx/include/mach/imx21-regs.h index a2c4d03643..98e73ef27e 100644 --- a/arch/arm/mach-imx/include/mach/imx21-regs.h +++ b/arch/arm/mach-imx/include/mach/imx21-regs.h @@ -107,30 +107,6 @@ #define CCSR_32K_SR (1 << 15) -/* - * Definitions for the clocksource driver - */ -/* Part 1: Registers */ -# define GPT_TCTL 0x00 -# define GPT_TPRER 0x04 -# define GPT_TCMP 0x08 -# define GPT_TCR 0x0c -# define GPT_TCN 0x10 -# define GPT_TSTAT 0x14 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_CC (1<<10) /* counter clear */ -#define TCTL_FRR (1<<8) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_CAPEN (1<<5) /* compare interrupt enable */ -#define TCTL_COMPEN (1<<4) /* compare interrupt enable */ -#define TCTL_CLKSOURCE (1) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #define IMX_CS0_BASE 0xC8000000 #define IMX_CS1_BASE 0xCC000000 #define IMX_CS2_BASE 0xD0000000 diff --git a/arch/arm/mach-imx/include/mach/imx25-regs.h b/arch/arm/mach-imx/include/mach/imx25-regs.h index 73307c452e..a35d9e3475 100644 --- a/arch/arm/mach-imx/include/mach/imx25-regs.h +++ b/arch/arm/mach-imx/include/mach/imx25-regs.h @@ -107,33 +107,6 @@ #define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10) #define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10) -/* - * Definitions for the clocksource driver - * - * These defines are using the i.MX1/27 notation - * to reuse the clocksource code for these CPUs - * on the i.MX35 - */ -/* Part 1: Registers */ -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - /* * Watchdog Registers */ diff --git a/arch/arm/mach-imx/include/mach/imx27-regs.h b/arch/arm/mach-imx/include/mach/imx27-regs.h index 19dcad9e9b..8686a9dfc3 100644 --- a/arch/arm/mach-imx/include/mach/imx27-regs.h +++ b/arch/arm/mach-imx/include/mach/imx27-regs.h @@ -221,29 +221,6 @@ #define ESDCFG_TWTR (1 << 20) #define ESDCFG_TXP(x) (((x) & 0x3) << 21) -/* - * Definitions for the clocksource driver - */ -/* Part 1: Registers */ -# define GPT_TCTL 0x00 -# define GPT_TPRER 0x04 -# define GPT_TCMP 0x08 -# define GPT_TCR 0x0c -# define GPT_TCN 0x10 -# define GPT_TSTAT 0x14 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<8) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (1) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #define IMX_CS0_BASE 0xC0000000 #define IMX_CS1_BASE 0xC8000000 #define IMX_CS2_BASE 0xD0000000 diff --git a/arch/arm/mach-imx/include/mach/imx31-regs.h b/arch/arm/mach-imx/include/mach/imx31-regs.h index 536bf0dad4..062af751c8 100644 --- a/arch/arm/mach-imx/include/mach/imx31-regs.h +++ b/arch/arm/mach-imx/include/mach/imx31-regs.h @@ -57,33 +57,6 @@ #define IMX_CS5_BASE 0xB6000000 #define IMX_CS5_RANGE (32 * 1024 * 1024) -/* - * Definitions for the clocksource driver - * - * These defines are using the i.MX1/27 notation - * to reuse the clocksource code for these CPUs - * on the i.MX31 - */ -/* Part 1: Registers */ -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #if 0 #define IMX_IO_BASE 0x00200000 diff --git a/arch/arm/mach-imx/include/mach/imx35-regs.h b/arch/arm/mach-imx/include/mach/imx35-regs.h index 91d4b9bf52..5f000521f4 100644 --- a/arch/arm/mach-imx/include/mach/imx35-regs.h +++ b/arch/arm/mach-imx/include/mach/imx35-regs.h @@ -116,32 +116,4 @@ #define CSCR_L(x) (WEIM_BASE + 4 + (x) * 0x10) #define CSCR_A(x) (WEIM_BASE + 8 + (x) * 0x10) -/* - * Definitions for the clocksource driver - * - * These defines are using the i.MX1/27 notation - * to reuse the clocksource code for these CPUs - * on the i.MX35 - */ -/* Part 1: Registers */ -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #endif /* __ASM_ARCH_MX35_REGS_H */ - diff --git a/arch/arm/mach-imx/include/mach/imx51-regs.h b/arch/arm/mach-imx/include/mach/imx51-regs.h index b51aa67c6f..c451004ecc 100644 --- a/arch/arm/mach-imx/include/mach/imx51-regs.h +++ b/arch/arm/mach-imx/include/mach/imx51-regs.h @@ -5,13 +5,6 @@ #define IMX_WDT_BASE 0x73f98000 #define IMX_IOMUXC_BASE 0x73fa8000 -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - /* WEIM registers */ #define WEIM_CSxGCR1(n) (((n) * 0x18) + 0x00) #define WEIM_CSxGCR2(n) (((n) * 0x18) + 0x04) @@ -22,18 +15,6 @@ #define WEIM_WIAR 0x94 #define WEIM_EAR 0x98 -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #define MX51_IROM_BASE_ADDR 0x0 /* diff --git a/arch/arm/mach-imx/include/mach/imx53-regs.h b/arch/arm/mach-imx/include/mach/imx53-regs.h index 8fefc5463e..e57d1abdd0 100644 --- a/arch/arm/mach-imx/include/mach/imx53-regs.h +++ b/arch/arm/mach-imx/include/mach/imx53-regs.h @@ -5,25 +5,6 @@ #define IMX_WDT_BASE 0X53F98000 #define IMX_IOMUXC_BASE 0X53FA8000 -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #define MX53_IROM_BASE_ADDR 0x0 /* diff --git a/arch/arm/mach-imx/include/mach/imx6-regs.h b/arch/arm/mach-imx/include/mach/imx6-regs.h index c7b7481d0f..eca4fa663a 100644 --- a/arch/arm/mach-imx/include/mach/imx6-regs.h +++ b/arch/arm/mach-imx/include/mach/imx6-regs.h @@ -5,25 +5,6 @@ #define IMX_WDT_BASE 0x020bc000 #define IMX_IOMUXC_BASE 0x020e0000 -#define GPT_TCTL 0x00 -#define GPT_TPRER 0x04 -#define GPT_TCMP 0x10 -#define GPT_TCR 0x1c -#define GPT_TCN 0x24 -#define GPT_TSTAT 0x08 - -/* Part 2: Bitfields */ -#define TCTL_SWR (1<<15) /* Software reset */ -#define TCTL_FRR (1<<9) /* Freerun / restart */ -#define TCTL_CAP (3<<6) /* Capture Edge */ -#define TCTL_OM (1<<5) /* output mode */ -#define TCTL_IRQEN (1<<4) /* interrupt enable */ -#define TCTL_CLKSOURCE (6) /* Clock source bit position */ -#define TCTL_TEN (1) /* Timer enable */ -#define TPRER_PRES (0xff) /* Prescale */ -#define TSTAT_CAPT (1<<1) /* Capture event */ -#define TSTAT_COMP (1) /* Compare event */ - #define MX6_AIPS1_ARB_BASE_ADDR 0x02000000 #define MX6_AIPS2_ARB_BASE_ADDR 0x02100000 -- cgit v1.2.3