From 5ffc6f9210ffcffbd2fe494b5e8811eebad813a8 Mon Sep 17 00:00:00 2001 From: Michael Tretter Date: Fri, 7 Dec 2018 11:11:56 +0100 Subject: ARM: zynqmp: add support for Xilinx ZCU104 board Add support for the Xilinx Zynq Ultrascale+ MPSoC architecture (ZynqMP) and the Xilinx ZCU104 board. Barebox is booted as BL33 in EL-1 and expects that a BL2 (i.e. the FSBL) already took care of initializing the RAM. Also for debug_ll, the UART is expected to be already setup correctly. Thus, you have to add the Barebox binary to a boot image as described in "Chapter 11: Boot and Configuration" of "Zynq Ultrascale+ Device Technical Reference Manual". Signed-off-by: Michael Tretter Signed-off-by: Sascha Hauer --- arch/arm/mach-zynqmp/Makefile | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 arch/arm/mach-zynqmp/Makefile (limited to 'arch/arm/mach-zynqmp/Makefile') diff --git a/arch/arm/mach-zynqmp/Makefile b/arch/arm/mach-zynqmp/Makefile new file mode 100644 index 0000000000..c601374f6c --- /dev/null +++ b/arch/arm/mach-zynqmp/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +obj- := __dummy__.o -- cgit v1.2.3