From 5bb32548c55295cf0296d6db18e627980b616a53 Mon Sep 17 00:00:00 2001 From: Thomas Haemmerle Date: Thu, 21 Feb 2019 12:13:50 +0000 Subject: firmware-zynqmp: port from linux Port Xilinx Zynq MPSoC Firmware layer driver from linux. Signed-off-by: Thomas Haemmerle Signed-off-by: Sascha Hauer --- .../arm/mach-zynqmp/include/mach/firmware-zynqmp.h | 66 ++++++++++++++++++++++ 1 file changed, 66 insertions(+) create mode 100644 arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h (limited to 'arch/arm/mach-zynqmp/include') diff --git a/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h new file mode 100644 index 0000000000..7a65f781fb --- /dev/null +++ b/arch/arm/mach-zynqmp/include/mach/firmware-zynqmp.h @@ -0,0 +1,66 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Xilinx Zynq MPSoC Firmware layer + * + * Copyright (c) 2018 Thomas Haemmerle + * + * based on Linux xlnx-zynqmp + * + * Michal Simek + * Davorin Mista + * Jolly Shah + * Rajan Vaja + */ + +#ifndef FIRMWARE_ZYNQMP_H_ +#define FIRMWARE_ZYNQMP_H_ + +enum pm_ioctl_id { + IOCTL_SET_PLL_FRAC_MODE = 8, + IOCTL_GET_PLL_FRAC_MODE, + IOCTL_SET_PLL_FRAC_DATA, + IOCTL_GET_PLL_FRAC_DATA, +}; + +enum pm_query_id { + PM_QID_INVALID, + PM_QID_CLOCK_GET_NAME, + PM_QID_CLOCK_GET_TOPOLOGY, + PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS, + PM_QID_CLOCK_GET_PARENTS, + PM_QID_CLOCK_GET_ATTRIBUTES, + PM_QID_CLOCK_GET_NUM_CLOCKS = 12, +}; + +/** + * struct zynqmp_pm_query_data - PM query data + * @qid: query ID + * @arg1: Argument 1 of query data + * @arg2: Argument 2 of query data + * @arg3: Argument 3 of query data + */ +struct zynqmp_pm_query_data { + u32 qid; + u32 arg1; + u32 arg2; + u32 arg3; +}; + +struct zynqmp_eemi_ops { + int (*get_api_version)(u32 *version); + int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out); + int (*clock_enable)(u32 clock_id); + int (*clock_disable)(u32 clock_id); + int (*clock_getstate)(u32 clock_id, u32 *state); + int (*clock_setdivider)(u32 clock_id, u32 divider); + int (*clock_getdivider)(u32 clock_id, u32 *divider); + int (*clock_setrate)(u32 clock_id, u64 rate); + int (*clock_getrate)(u32 clock_id, u64 *rate); + int (*clock_setparent)(u32 clock_id, u32 parent_id); + int (*clock_getparent)(u32 clock_id, u32 *parent_id); + int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); +}; + +const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); + +#endif /* FIRMWARE_ZYNQMP_H_ */ -- cgit v1.2.3