From 3b30c7349879cab35113f54fc6390739c4767eea Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 22 May 2021 16:34:31 +0200 Subject: arm: imx: Replace license and copyright boilerplate by SPDX identifiers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Converts the files that licensecheck can determine to be licensed under GPL-2.0-only or GPL-2.0-or-later and also convert their copyright statements to SPDX. Signed-off-by: Uwe Kleine-König Link: https://lore.barebox.org/20210522143431.824057-1-u.kleine-koenig@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/boot.c | 13 +------------ arch/arm/mach-imx/cpu_init.c | 15 ++------------- arch/arm/mach-imx/esdctl-v4.c | 18 ++++-------------- arch/arm/mach-imx/esdctl.c | 18 ++++-------------- arch/arm/mach-imx/external-nand-boot.c | 13 +------------ arch/arm/mach-imx/iim.c | 13 +++---------- arch/arm/mach-imx/imx-bbu-external-nand.c | 14 +++----------- arch/arm/mach-imx/imx-bbu-internal.c | 14 +++----------- arch/arm/mach-imx/imx.c | 13 +------------ arch/arm/mach-imx/imx1.c | 13 +------------ arch/arm/mach-imx/imx21.c | 13 +------------ arch/arm/mach-imx/imx25.c | 13 +------------ arch/arm/mach-imx/imx27.c | 13 +------------ arch/arm/mach-imx/imx31.c | 13 +------------ arch/arm/mach-imx/imx35.c | 13 +------------ arch/arm/mach-imx/imx50.c | 13 +------------ arch/arm/mach-imx/imx51.c | 13 +------------ arch/arm/mach-imx/imx53.c | 13 +------------ arch/arm/mach-imx/imx6-mmdc.c | 16 +++------------- arch/arm/mach-imx/imx6.c | 13 +------------ arch/arm/mach-imx/imx7.c | 13 +------------ arch/arm/mach-imx/imx8m.c | 13 +------------ arch/arm/mach-imx/nand.c | 13 +------------ arch/arm/mach-imx/src.c | 10 ++-------- arch/arm/mach-imx/vf610.c | 13 +------------ arch/arm/mach-imx/xload-gpmi-nand.c | 11 +---------- arch/arm/mach-imx/xload-imx-nand.c | 14 ++------------ 27 files changed, 44 insertions(+), 320 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/mach-imx/boot.c b/arch/arm/mach-imx/boot.c index e9b5a49443..2b66bbf71e 100644 --- a/arch/arm/mach-imx/boot.c +++ b/arch/arm/mach-imx/boot.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/cpu_init.c b/arch/arm/mach-imx/cpu_init.c index 9d86353e22..a034b5a9a5 100644 --- a/arch/arm/mach-imx/cpu_init.c +++ b/arch/arm/mach-imx/cpu_init.c @@ -1,16 +1,5 @@ -/* - * Copyright (C) 2014 Lucas Stach, Pengutronix - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2014 Lucas Stach, Pengutronix #include #include diff --git a/arch/arm/mach-imx/esdctl-v4.c b/arch/arm/mach-imx/esdctl-v4.c index d9f6e919a1..14a967d521 100644 --- a/arch/arm/mach-imx/esdctl-v4.c +++ b/arch/arm/mach-imx/esdctl-v4.c @@ -1,17 +1,7 @@ -/* - * esdctl-v4.c - i.MX sdram controller functions for i.MX53 - * - * Copyright (c) 2012 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 Sascha Hauer , Pengutronix + +/* esdctl-v4.c - i.MX sdram controller functions for i.MX53 */ #include #include diff --git a/arch/arm/mach-imx/esdctl.c b/arch/arm/mach-imx/esdctl.c index 135a16d111..f297cd35d5 100644 --- a/arch/arm/mach-imx/esdctl.c +++ b/arch/arm/mach-imx/esdctl.c @@ -1,17 +1,7 @@ -/* - * esdctl.c - i.MX sdram controller functions - * - * Copyright (c) 2012 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 Sascha Hauer , Pengutronix + +/* esdctl.c - i.MX sdram controller functions */ #include #include diff --git a/arch/arm/mach-imx/external-nand-boot.c b/arch/arm/mach-imx/external-nand-boot.c index 893bfdb77f..92dcaeaaf8 100644 --- a/arch/arm/mach-imx/external-nand-boot.c +++ b/arch/arm/mach-imx/external-nand-boot.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/iim.c b/arch/arm/mach-imx/iim.c index b60c5de7e1..40b9b00cec 100644 --- a/arch/arm/mach-imx/iim.c +++ b/arch/arm/mach-imx/iim.c @@ -1,19 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2010 Baruch Siach , Orex Computed Radiography + /* * iim.c - i.MX IIM fusebox driver * * Provide an interface for programming and sensing the information that are * stored in on-chip fuse elements. This functionality is part of the IC * Identification Module (IIM), which is present on some i.MX CPUs. - * - * Copyright (c) 2010 Baruch Siach , - * Orex Computed Radiography - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html */ #include diff --git a/arch/arm/mach-imx/imx-bbu-external-nand.c b/arch/arm/mach-imx/imx-bbu-external-nand.c index 8aa4f152a1..e0a12fdb71 100644 --- a/arch/arm/mach-imx/imx-bbu-external-nand.c +++ b/arch/arm/mach-imx/imx-bbu-external-nand.c @@ -1,17 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2013 Sascha Hauer , Pengutronix + /* * imx-bbu-external-nand.c - i.MX specific update functions for external * nand boot - * - * Copyright (c) 2013 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-imx/imx-bbu-internal.c b/arch/arm/mach-imx/imx-bbu-internal.c index c6d427a46c..880f8b2496 100644 --- a/arch/arm/mach-imx/imx-bbu-internal.c +++ b/arch/arm/mach-imx/imx-bbu-internal.c @@ -1,16 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2012 Sascha Hauer , Pengutronix + /* * imx-bbu-internal.c - i.MX specific update functions for internal boot - * - * Copyright (c) 2012 Sascha Hauer , Pengutronix - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ #include diff --git a/arch/arm/mach-imx/imx.c b/arch/arm/mach-imx/imx.c index bd7e9ac423..0d2a5b2063 100644 --- a/arch/arm/mach-imx/imx.c +++ b/arch/arm/mach-imx/imx.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx1.c b/arch/arm/mach-imx/imx1.c index 6a09b276c8..6cf95667c9 100644 --- a/arch/arm/mach-imx/imx1.c +++ b/arch/arm/mach-imx/imx1.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx21.c b/arch/arm/mach-imx/imx21.c index 7a19ed3986..223a390c9c 100644 --- a/arch/arm/mach-imx/imx21.c +++ b/arch/arm/mach-imx/imx21.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx25.c b/arch/arm/mach-imx/imx25.c index d27680e428..a855ff0714 100644 --- a/arch/arm/mach-imx/imx25.c +++ b/arch/arm/mach-imx/imx25.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx27.c b/arch/arm/mach-imx/imx27.c index d4949babeb..97e6792d87 100644 --- a/arch/arm/mach-imx/imx27.c +++ b/arch/arm/mach-imx/imx27.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx31.c b/arch/arm/mach-imx/imx31.c index 137c77a923..b524d0105e 100644 --- a/arch/arm/mach-imx/imx31.c +++ b/arch/arm/mach-imx/imx31.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx35.c b/arch/arm/mach-imx/imx35.c index d37bdfda7b..c6ded7407d 100644 --- a/arch/arm/mach-imx/imx35.c +++ b/arch/arm/mach-imx/imx35.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx50.c b/arch/arm/mach-imx/imx50.c index b76e3794e3..20670a7446 100644 --- a/arch/arm/mach-imx/imx50.c +++ b/arch/arm/mach-imx/imx50.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx51.c b/arch/arm/mach-imx/imx51.c index 7404254bee..214a4031ec 100644 --- a/arch/arm/mach-imx/imx51.c +++ b/arch/arm/mach-imx/imx51.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c index f8e34a39da..3906a48917 100644 --- a/arch/arm/mach-imx/imx53.c +++ b/arch/arm/mach-imx/imx53.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx6-mmdc.c b/arch/arm/mach-imx/imx6-mmdc.c index 8f661e3dfe..00b8d30d69 100644 --- a/arch/arm/mach-imx/imx6-mmdc.c +++ b/arch/arm/mach-imx/imx6-mmdc.c @@ -1,19 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2013 Sascha Hauer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * */ #include #include diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index 6a9ea23c71..9ccb391384 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx7.c b/arch/arm/mach-imx/imx7.c index d875bf44f1..8f9d5034ab 100644 --- a/arch/arm/mach-imx/imx7.c +++ b/arch/arm/mach-imx/imx7.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/imx8m.c b/arch/arm/mach-imx/imx8m.c index 350d203539..8672d5fe39 100644 --- a/arch/arm/mach-imx/imx8m.c +++ b/arch/arm/mach-imx/imx8m.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/nand.c b/arch/arm/mach-imx/nand.c index 7574fe80b2..718cada052 100644 --- a/arch/arm/mach-imx/nand.c +++ b/arch/arm/mach-imx/nand.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index 73350d15e1..8272d5b720 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -1,11 +1,5 @@ -/* - * Copyright 2016 Sascha Hauer - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ +// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-FileCopyrightText: 2016 Sascha Hauer #include #include diff --git a/arch/arm/mach-imx/vf610.c b/arch/arm/mach-imx/vf610.c index 2fbd6393ea..ccef9d48d9 100644 --- a/arch/arm/mach-imx/vf610.c +++ b/arch/arm/mach-imx/vf610.c @@ -1,15 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later #include #include diff --git a/arch/arm/mach-imx/xload-gpmi-nand.c b/arch/arm/mach-imx/xload-gpmi-nand.c index b3fd479cb4..e6d19a7279 100644 --- a/arch/arm/mach-imx/xload-gpmi-nand.c +++ b/arch/arm/mach-imx/xload-gpmi-nand.c @@ -1,13 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0-only #define pr_fmt(fmt) "xload-gpmi-nand: " fmt diff --git a/arch/arm/mach-imx/xload-imx-nand.c b/arch/arm/mach-imx/xload-imx-nand.c index ff54941a0c..3838d9164d 100644 --- a/arch/arm/mach-imx/xload-imx-nand.c +++ b/arch/arm/mach-imx/xload-imx-nand.c @@ -1,15 +1,5 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - */ +// SPDX-License-Identifier: GPL-2.0-or-later + #define pr_fmt(fmt) "imx-nand-boot: " fmt #include -- cgit v1.2.3 From 43b9f2ce4109cc835df7772f98dd1b7bcf426d8b Mon Sep 17 00:00:00 2001 From: Holger Assmann Date: Fri, 21 May 2021 16:43:13 +0200 Subject: ARM: webasto-ccbv2: Add variant with 512MB RAM Add variant for 512MB RAM board. Two firmware files will be generated - one for 256MB and 512MB respectively; the choice for shipment has to be done and depends on the underlying hardware. Signed-off-by: Holger Assmann v4 ARM: webasto-ccbv2: Add variant with 512MB RAM Link: https://lore.barebox.org/20210521144313.14990-1-h.assmann@pengutronix.de Signed-off-by: Sascha Hauer --- .../flash-header-imx6ul-webasto-ccbv2-256.imxcfg | 88 ++++++++++++++++++++++ .../flash-header-imx6ul-webasto-ccbv2-512.imxcfg | 88 ++++++++++++++++++++++ .../flash-header-imx6ul-webasto-ccbv2.imxcfg | 88 ---------------------- arch/arm/boards/webasto-ccbv2/lowlevel.c | 18 ++++- images/Makefile.imx | 4 +- 5 files changed, 195 insertions(+), 91 deletions(-) create mode 100644 arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg create mode 100644 arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg delete mode 100644 arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg (limited to 'arch/arm') diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg new file mode 100644 index 0000000000..ea327b2630 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256.imxcfg @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +loadaddr 0x80000000 +soc imx6 +ivtofs 0x400 + +/* Enable all clocks */ +wm 32 0x020c4068 0xffffffff +wm 32 0x020c406c 0xffffffff +wm 32 0x020c4070 0xffffffff +wm 32 0x020c4074 0xffffffff +wm 32 0x020c4078 0xffffffff +wm 32 0x020c407c 0xffffffff +wm 32 0x020c4080 0xffffffff + +/* IOMUX */ +/* DDR IO type */ +wm 32 0x020E04B4 0x000C0000 +wm 32 0x020E04AC 0x00000000 +/* Clock */ +wm 32 0x020E027C 0x00000028 +/* Control */ +wm 32 0x020E0250 0x00000028 +wm 32 0x020E024C 0x00000028 +wm 32 0x020E0490 0x00000028 +wm 32 0x020E0288 0x00000028 +wm 32 0x020E0270 0x00000000 +wm 32 0x020E0260 0x00000028 +wm 32 0x020E0264 0x00000028 +wm 32 0x020E04A0 0x00000028 +/* Data strobe */ +wm 32 0x020E0494 0x00020000 +wm 32 0x020E0280 0x00000028 +wm 32 0x020E0284 0x00000028 +/* Data */ +wm 32 0x020E04B0 0x00020000 +wm 32 0x020E0498 0x00000028 +wm 32 0x020E04A4 0x00000028 +wm 32 0x020E0244 0x00000028 +wm 32 0x020E0248 0x00000028 + +/* DDR Controller registers */ +wm 32 0x021B001C 0x00008000 +wm 32 0x021B0800 0xA1390003 +/* Calibration values */ +wm 32 0x021B080C 0x000C0000 +wm 32 0x021B083C 0x01610162 +wm 32 0x021B0848 0x40405050 +wm 32 0x021B0850 0x4040544C +wm 32 0x021B081C 0x33333333 +wm 32 0x021B0820 0x33333333 +wm 32 0x021B082C 0xf3333333 +wm 32 0x021B0830 0xf3333333 +/* END of calibration values */ +wm 32 0x021B08C0 0x00921012 +wm 32 0x021B08b8 0x00000800 + +/* MMDC init */ +wm 32 0x021B0004 0x0002002D +wm 32 0x021B0008 0x1b333030 +wm 32 0x021B000C 0x3F4352F3 +wm 32 0x021B0010 0xB66D0B63 +wm 32 0x021B0014 0x01FF00DB +/* Consider reducing RALAT (currently set to 5) */ +wm 32 0x021B0018 0x00211740 +wm 32 0x021B001C 0x00008000 +wm 32 0x021B002C 0x000026D2 +wm 32 0x021B0030 0x00431023 +wm 32 0x021B0040 0x00000047 +wm 32 0x021B0000 0x83180000 + +/* Mode registers writes for CS0 */ +wm 32 0x021B001C 0x02008032 +wm 32 0x021B001C 0x00008033 +wm 32 0x021B001C 0x00048031 +wm 32 0x021B001C 0x15208030 +wm 32 0x021B001C 0x04008040 + +/* Final DDR setup */ +wm 32 0x021B0020 0x00007800 +wm 32 0x021B0818 0x00000227 +wm 32 0x021B0004 0x0002556D +wm 32 0x021B0404 0x00011006 +wm 32 0x021B001C 0x00000000 + +/* Disable TZASC bypass */ +wm 32 0x020E4024 0x00000001 + +#include diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg new file mode 100644 index 0000000000..d438a665f1 --- /dev/null +++ b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512.imxcfg @@ -0,0 +1,88 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +loadaddr 0x80000000 +soc imx6 +ivtofs 0x400 + +/* Enable all clocks */ +wm 32 0x020c4068 0xffffffff +wm 32 0x020c406c 0xffffffff +wm 32 0x020c4070 0xffffffff +wm 32 0x020c4074 0xffffffff +wm 32 0x020c4078 0xffffffff +wm 32 0x020c407c 0xffffffff +wm 32 0x020c4080 0xffffffff + +/* IOMUX */ +/* DDR IO type */ +wm 32 0x020E04B4 0x000C0000 +wm 32 0x020E04AC 0x00000000 +/* Clock */ +wm 32 0x020E027C 0x00000028 +/* Control */ +wm 32 0x020E0250 0x00000028 +wm 32 0x020E024C 0x00000028 +wm 32 0x020E0490 0x00000028 +wm 32 0x020E0288 0x00000028 +wm 32 0x020E0270 0x00000000 +wm 32 0x020E0260 0x00000028 +wm 32 0x020E0264 0x00000028 +wm 32 0x020E04A0 0x00000028 +/* Data strobe */ +wm 32 0x020E0494 0x00020000 +wm 32 0x020E0280 0x00000028 +wm 32 0x020E0284 0x00000028 +/* Data */ +wm 32 0x020E04B0 0x00020000 +wm 32 0x020E0498 0x00000028 +wm 32 0x020E04A4 0x00000028 +wm 32 0x020E0244 0x00000028 +wm 32 0x020E0248 0x00000028 + +/* DDR Controller registers */ +wm 32 0x021B001C 0x00008000 +wm 32 0x021B0800 0xA1390003 +/* Calibration values */ +wm 32 0x021B080C 0x00090000 +wm 32 0x021B083C 0x01580158 +wm 32 0x021B0848 0x40405050 +wm 32 0x021B0850 0x4040524C +wm 32 0x021B081C 0x33333333 +wm 32 0x021B0820 0x33333333 +wm 32 0x021B082C 0xf3333333 +wm 32 0x021B0830 0xf3333333 +/* END of calibration values */ +wm 32 0x021B08C0 0x00921012 +wm 32 0x021B08b8 0x00000800 + +/* MMDC init */ +wm 32 0x021B0004 0x0002002D +wm 32 0x021B0008 0x1b333030 +wm 32 0x021B000C 0x676B52F3 +wm 32 0x021B0010 0xB66D0B63 +wm 32 0x021B0014 0x01FF00DB +/* Consider reducing RALAT (currently set to 5) */ +wm 32 0x021B0018 0x00211740 +wm 32 0x021B001C 0x00008000 +wm 32 0x021B002C 0x000026D2 +wm 32 0x021B0030 0x006B1023 +wm 32 0x021B0040 0x0000004F +wm 32 0x021B0000 0x84180000 + +/* Mode registers writes for CS0 */ +wm 32 0x021B001C 0x02008032 +wm 32 0x021B001C 0x00008033 +wm 32 0x021B001C 0x00048031 +wm 32 0x021B001C 0x15208030 +wm 32 0x021B001C 0x04008040 + +/* Final DDR setup */ +wm 32 0x021B0020 0x00007800 +wm 32 0x021B0818 0x00000227 +wm 32 0x021B0004 0x0002556D +wm 32 0x021B0404 0x00011006 +wm 32 0x021B001C 0x00000000 + +/* Disable TZASC bypass */ +wm 32 0x020E4024 0x00000001 + +#include diff --git a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg b/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg deleted file mode 100644 index ea327b2630..0000000000 --- a/arch/arm/boards/webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2.imxcfg +++ /dev/null @@ -1,88 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -loadaddr 0x80000000 -soc imx6 -ivtofs 0x400 - -/* Enable all clocks */ -wm 32 0x020c4068 0xffffffff -wm 32 0x020c406c 0xffffffff -wm 32 0x020c4070 0xffffffff -wm 32 0x020c4074 0xffffffff -wm 32 0x020c4078 0xffffffff -wm 32 0x020c407c 0xffffffff -wm 32 0x020c4080 0xffffffff - -/* IOMUX */ -/* DDR IO type */ -wm 32 0x020E04B4 0x000C0000 -wm 32 0x020E04AC 0x00000000 -/* Clock */ -wm 32 0x020E027C 0x00000028 -/* Control */ -wm 32 0x020E0250 0x00000028 -wm 32 0x020E024C 0x00000028 -wm 32 0x020E0490 0x00000028 -wm 32 0x020E0288 0x00000028 -wm 32 0x020E0270 0x00000000 -wm 32 0x020E0260 0x00000028 -wm 32 0x020E0264 0x00000028 -wm 32 0x020E04A0 0x00000028 -/* Data strobe */ -wm 32 0x020E0494 0x00020000 -wm 32 0x020E0280 0x00000028 -wm 32 0x020E0284 0x00000028 -/* Data */ -wm 32 0x020E04B0 0x00020000 -wm 32 0x020E0498 0x00000028 -wm 32 0x020E04A4 0x00000028 -wm 32 0x020E0244 0x00000028 -wm 32 0x020E0248 0x00000028 - -/* DDR Controller registers */ -wm 32 0x021B001C 0x00008000 -wm 32 0x021B0800 0xA1390003 -/* Calibration values */ -wm 32 0x021B080C 0x000C0000 -wm 32 0x021B083C 0x01610162 -wm 32 0x021B0848 0x40405050 -wm 32 0x021B0850 0x4040544C -wm 32 0x021B081C 0x33333333 -wm 32 0x021B0820 0x33333333 -wm 32 0x021B082C 0xf3333333 -wm 32 0x021B0830 0xf3333333 -/* END of calibration values */ -wm 32 0x021B08C0 0x00921012 -wm 32 0x021B08b8 0x00000800 - -/* MMDC init */ -wm 32 0x021B0004 0x0002002D -wm 32 0x021B0008 0x1b333030 -wm 32 0x021B000C 0x3F4352F3 -wm 32 0x021B0010 0xB66D0B63 -wm 32 0x021B0014 0x01FF00DB -/* Consider reducing RALAT (currently set to 5) */ -wm 32 0x021B0018 0x00211740 -wm 32 0x021B001C 0x00008000 -wm 32 0x021B002C 0x000026D2 -wm 32 0x021B0030 0x00431023 -wm 32 0x021B0040 0x00000047 -wm 32 0x021B0000 0x83180000 - -/* Mode registers writes for CS0 */ -wm 32 0x021B001C 0x02008032 -wm 32 0x021B001C 0x00008033 -wm 32 0x021B001C 0x00048031 -wm 32 0x021B001C 0x15208030 -wm 32 0x021B001C 0x04008040 - -/* Final DDR setup */ -wm 32 0x021B0020 0x00007800 -wm 32 0x021B0818 0x00000227 -wm 32 0x021B0004 0x0002556D -wm 32 0x021B0404 0x00011006 -wm 32 0x021B001C 0x00000000 - -/* Disable TZASC bypass */ -wm 32 0x020E4024 0x00000001 - -#include diff --git a/arch/arm/boards/webasto-ccbv2/lowlevel.c b/arch/arm/boards/webasto-ccbv2/lowlevel.c index 8529ea3735..32117b0a77 100644 --- a/arch/arm/boards/webasto-ccbv2/lowlevel.c +++ b/arch/arm/boards/webasto-ccbv2/lowlevel.c @@ -48,7 +48,7 @@ static void noinline start_ccbv2(u32 r0) */ if(IS_ENABLED(CONFIG_FIRMWARE_CCBV2_OPTEE) && !(r0 > MX6_MMDC_P0_BASE_ADDR - && r0 < MX6_MMDC_P0_BASE_ADDR + SZ_256M)) { + && r0 < MX6_MMDC_P0_BASE_ADDR + SZ_512M)) { get_builtin_firmware(ccbv2_optee_bin, &tee, &tee_size); memset((void *)OPTEE_OVERLAY_LOCATION, 0, 0x1000); @@ -59,7 +59,21 @@ static void noinline start_ccbv2(u32 r0) imx6ul_barebox_entry(__dtb_z_imx6ul_webasto_ccbv2_start); } -ENTRY_FUNCTION(start_imx6ul_ccbv2, r0, r1, r2) +ENTRY_FUNCTION(start_imx6ul_ccbv2_256m, r0, r1, r2) +{ + + imx6ul_cpu_lowlevel_init(); + + arm_setup_stack(0x00910000); + + relocate_to_current_adr(); + setup_c(); + barrier(); + + start_ccbv2(r0); +} + +ENTRY_FUNCTION(start_imx6ul_ccbv2_512m, r0, r1, r2) { imx6ul_cpu_lowlevel_init(); diff --git a/images/Makefile.imx b/images/Makefile.imx index 382493488b..f312712840 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -366,7 +366,9 @@ $(call build_imx_habv4img, CONFIG_MACH_TECHNEXION_PICO_HOBBIT, start_imx6ul_pico $(call build_imx_habv4img, CONFIG_MACH_DIGI_CCIMX6ULSBCPRO, start_imx6ul_ccimx6ulsbcpro, digi-ccimx6ulsom/flash-header-imx6ul-ccimx6ulsbcpro, imx6ul-ccimx6ulsbcpro) -$(call build_imx_habv4img, CONFIG_MACH_WEBASTO_CCBV2, start_imx6ul_ccbv2, webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2, imx6ul-webasto-ccbv2) +$(call build_imx_habv4img, CONFIG_MACH_WEBASTO_CCBV2, start_imx6ul_ccbv2_256m, webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-256, imx6ul-webasto-ccbv2-256m) + +$(call build_imx_habv4img, CONFIG_MACH_WEBASTO_CCBV2, start_imx6ul_ccbv2_512m, webasto-ccbv2/flash-header-imx6ul-webasto-ccbv2-512, imx6ul-webasto-ccbv2-512m) # ----------------------- vf6xx based boards --------------------------- pblb-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr -- cgit v1.2.3 From 4389bb4f8b32fa873e564665a7454b278d85cfec Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Thu, 15 Apr 2021 15:16:16 +0200 Subject: ARM: i.MX: Update sabresdb dcd data from U-Boot The DCD data for the SabreSD board goes back to 2013. This updates the DCD data with the values from U-Boot-2021.04 which are likely better maintained. Signed-off-by: Sascha Hauer --- .../flash-header-mx6-sabresd.imxcfg | 144 ++++++++------------- 1 file changed, 53 insertions(+), 91 deletions(-) (limited to 'arch/arm') diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg index 133f499ab9..d0a0b40189 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg +++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg @@ -1,128 +1,90 @@ loadaddr 0x10000000 soc imx6 ivtofs 0x400 +wm 32 0x20e056c 0x00020030 +wm 32 0x20e0578 0x00020030 +wm 32 0x20e0588 0x00020030 +wm 32 0x20e0594 0x00020030 +wm 32 0x20e0798 0x000C0000 +wm 32 0x20e0758 0x00000000 +wm 32 0x20e0588 0x00000030 +wm 32 0x20e0594 0x00000030 +wm 32 0x20e056c 0x00000030 +wm 32 0x20e0578 0x00000030 +wm 32 0x20e074c 0x00000030 +wm 32 0x20e057c 0x00000030 +wm 32 0x20e058c 0x00000000 +wm 32 0x20e059c 0x00000030 +wm 32 0x20e05a0 0x00000030 +wm 32 0x20e078c 0x00000030 +wm 32 0x20e0750 0x00020000 wm 32 0x20e05a8 0x00000030 wm 32 0x20e05b0 0x00000030 wm 32 0x20e0524 0x00000030 wm 32 0x20e051c 0x00000030 - wm 32 0x20e0518 0x00000030 wm 32 0x20e050c 0x00000030 wm 32 0x20e05b8 0x00000030 wm 32 0x20e05c0 0x00000030 - -wm 32 0x20e05ac 0x00020030 -wm 32 0x20e05b4 0x00020030 -wm 32 0x20e0528 0x00020030 -wm 32 0x20e0520 0x00020030 - -wm 32 0x20e0514 0x00020030 -wm 32 0x20e0510 0x00020030 -wm 32 0x20e05bc 0x00020030 -wm 32 0x20e05c4 0x00020030 - -wm 32 0x20e056c 0x00020030 -wm 32 0x20e0578 0x00020030 -wm 32 0x20e0588 0x00020030 -wm 32 0x20e0594 0x00020030 - -wm 32 0x20e057c 0x00020030 -wm 32 0x20e0590 0x00003000 -wm 32 0x20e0598 0x00003000 -wm 32 0x20e058c 0x00000000 - -wm 32 0x20e059c 0x00003030 -wm 32 0x20e05a0 0x00003030 +wm 32 0x20e0774 0x00020000 wm 32 0x20e0784 0x00000030 wm 32 0x20e0788 0x00000030 - wm 32 0x20e0794 0x00000030 wm 32 0x20e079c 0x00000030 wm 32 0x20e07a0 0x00000030 wm 32 0x20e07a4 0x00000030 - wm 32 0x20e07a8 0x00000030 wm 32 0x20e0748 0x00000030 -wm 32 0x20e074c 0x00000030 -wm 32 0x20e0750 0x00020000 - -wm 32 0x20e0758 0x00000000 -wm 32 0x20e0774 0x00020000 -wm 32 0x20e078c 0x00000030 -wm 32 0x20e0798 0x000C0000 - +wm 32 0x20e05ac 0x00000030 +wm 32 0x20e05b4 0x00000030 +wm 32 0x20e0528 0x00000030 +wm 32 0x20e0520 0x00000030 +wm 32 0x20e0514 0x00000030 +wm 32 0x20e0510 0x00000030 +wm 32 0x20e05bc 0x00000030 +wm 32 0x20e05c4 0x00000030 +wm 32 0x21b0800 0xa1390003 +wm 32 0x21b080c 0x001F001F +wm 32 0x21b0810 0x001F001F +wm 32 0x21b480c 0x001F001F +wm 32 0x21b4810 0x001F001F +wm 32 0x21b083c 0x43270338 +wm 32 0x21b0840 0x03200314 +wm 32 0x21b483c 0x431A032F +wm 32 0x21b4840 0x03200263 +wm 32 0x21b0848 0x4B434748 +wm 32 0x21b4848 0x4445404C +wm 32 0x21b0850 0x38444542 +wm 32 0x21b4850 0x4935493A wm 32 0x21b081c 0x33333333 wm 32 0x21b0820 0x33333333 wm 32 0x21b0824 0x33333333 wm 32 0x21b0828 0x33333333 - wm 32 0x21b481c 0x33333333 wm 32 0x21b4820 0x33333333 wm 32 0x21b4824 0x33333333 wm 32 0x21b4828 0x33333333 - -wm 32 0x21b0018 0x00081740 - -wm 32 0x21b001c 0x00008000 +wm 32 0x21b08b8 0x00000800 +wm 32 0x21b48b8 0x00000800 +wm 32 0x21b0004 0x00020036 +wm 32 0x21b0008 0x09444040 wm 32 0x21b000c 0x555A7975 -wm 32 0x21b0010 0xFF538E64 +wm 32 0x21b0010 0xFF538F64 wm 32 0x21b0014 0x01FF00DB -wm 32 0x21b002c 0x000026D2 - -wm 32 0x21b0030 0x005B0E21 -wm 32 0x21b0008 0x09444040 -wm 32 0x21b0004 0x00025576 +wm 32 0x21b0018 0x00001740 +wm 32 0x21b001c 0x00008000 +wm 32 0x21b002c 0x000026d2 +wm 32 0x21b0030 0x005A1023 wm 32 0x21b0040 0x00000027 wm 32 0x21b0000 0x831A0000 - wm 32 0x21b001c 0x04088032 -wm 32 0x21b001c 0x0408803A wm 32 0x21b001c 0x00008033 -wm 32 0x21b001c 0x0000803B -wm 32 0x21b001c 0x00428031 -wm 32 0x21b001c 0x00428039 +wm 32 0x21b001c 0x00048031 wm 32 0x21b001c 0x09408030 -wm 32 0x21b001c 0x09408038 - wm 32 0x21b001c 0x04008040 -wm 32 0x21b001c 0x04008048 -wm 32 0x21b0800 0xA1380003 -wm 32 0x21b4800 0xA1380003 wm 32 0x21b0020 0x00005800 -wm 32 0x21b0818 0x00022227 -wm 32 0x21b4818 0x00022227 - -wm 32 0x21b083c 0x434B0350 -wm 32 0x21b0840 0x034C0359 -wm 32 0x21b483c 0x434B0350 -wm 32 0x21b4840 0x03650348 -wm 32 0x21b0848 0x4436383B -wm 32 0x21b4848 0x39393341 -wm 32 0x21b0850 0x35373933 -wm 32 0x21b4850 0x48254A36 - -wm 32 0x21b080c 0x001F001F -wm 32 0x21b0810 0x001F001F - -wm 32 0x21b480c 0x00440044 -wm 32 0x21b4810 0x00440044 - -wm 32 0x21b08b8 0x00000800 -wm 32 0x21b48b8 0x00000800 - -wm 32 0x21b001c 0x00000000 +wm 32 0x21b0818 0x00011117 +wm 32 0x21b4818 0x00011117 +wm 32 0x21b0004 0x00025576 wm 32 0x21b0404 0x00011006 - -wm 32 0x020c4068 0x00c03f3f -wm 32 0x020c406c 0x0030fc03 -wm 32 0x020c4070 0x0fffc000 -wm 32 0x020c4074 0x3ff00000 -wm 32 0x020c4078 0x00fff300 -wm 32 0x020c407c 0x0f0000c3 -wm 32 0x020c4080 0x000003ff - -# enable AXI cache for VDOA/VPU/IPU -wm 32 0x20e0010 0xf00000cf -# set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 -wm 32 0x20e0018 0x007f007f -wm 32 0x20e001c 0x007f007f +wm 32 0x21b001c 0x00000000 -- cgit v1.2.3 From 40e2e0efb84c3647980a199c6ae80e8d91a18ccd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 26 May 2021 08:42:49 +0200 Subject: ARM: i.MX: sabresd: Add support for i.MX6QP board variant The SabreSD comes with different SoC variants. This patch adds support for the i.MX6QP based board. the DCD data has been taken from U-Boot 2021.04 Signed-off-by: Sascha Hauer Link: https://lore.barebox.org/20210415140313.29161-1-s.hauer@pengutronix.de Link: https://lore.barebox.org/20210526064249.25378-1-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/boards/freescale-mx6-sabresd/board.c | 6 +- .../flash-header-mx6-sabresd.imxcfg | 90 -------------------- .../flash-header-mx6q-sabresd.imxcfg | 90 ++++++++++++++++++++ .../flash-header-mx6qp-sabresd.imxcfg | 96 ++++++++++++++++++++++ arch/arm/boards/freescale-mx6-sabresd/lowlevel.c | 16 ++++ arch/arm/dts/Makefile | 2 +- arch/arm/dts/imx6qp-sabresd.dts | 42 ++++++++++ images/Makefile.imx | 4 +- 8 files changed, 252 insertions(+), 94 deletions(-) delete mode 100644 arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg create mode 100644 arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg create mode 100644 arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg create mode 100644 arch/arm/dts/imx6qp-sabresd.dts (limited to 'arch/arm') diff --git a/arch/arm/boards/freescale-mx6-sabresd/board.c b/arch/arm/boards/freescale-mx6-sabresd/board.c index b710c05a47..82da8bb1dd 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/board.c +++ b/arch/arm/boards/freescale-mx6-sabresd/board.c @@ -55,7 +55,8 @@ static int ar8031_phy_fixup(struct phy_device *dev) static int sabresd_devices_init(void) { - if (!of_machine_is_compatible("fsl,imx6q-sabresd")) + if (!of_machine_is_compatible("fsl,imx6q-sabresd") && + !of_machine_is_compatible("fsl,imx6qp-sabresd")) return 0; armlinux_set_architecture(3980); @@ -67,7 +68,8 @@ device_initcall(sabresd_devices_init); static int sabresd_coredevices_init(void) { - if (!of_machine_is_compatible("fsl,imx6q-sabresd")) + if (!of_machine_is_compatible("fsl,imx6q-sabresd") && + !of_machine_is_compatible("fsl,imx6qp-sabresd")) return 0; phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg deleted file mode 100644 index d0a0b40189..0000000000 --- a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg +++ /dev/null @@ -1,90 +0,0 @@ -loadaddr 0x10000000 -soc imx6 -ivtofs 0x400 -wm 32 0x20e056c 0x00020030 -wm 32 0x20e0578 0x00020030 -wm 32 0x20e0588 0x00020030 -wm 32 0x20e0594 0x00020030 -wm 32 0x20e0798 0x000C0000 -wm 32 0x20e0758 0x00000000 -wm 32 0x20e0588 0x00000030 -wm 32 0x20e0594 0x00000030 -wm 32 0x20e056c 0x00000030 -wm 32 0x20e0578 0x00000030 -wm 32 0x20e074c 0x00000030 -wm 32 0x20e057c 0x00000030 -wm 32 0x20e058c 0x00000000 -wm 32 0x20e059c 0x00000030 -wm 32 0x20e05a0 0x00000030 -wm 32 0x20e078c 0x00000030 -wm 32 0x20e0750 0x00020000 -wm 32 0x20e05a8 0x00000030 -wm 32 0x20e05b0 0x00000030 -wm 32 0x20e0524 0x00000030 -wm 32 0x20e051c 0x00000030 -wm 32 0x20e0518 0x00000030 -wm 32 0x20e050c 0x00000030 -wm 32 0x20e05b8 0x00000030 -wm 32 0x20e05c0 0x00000030 -wm 32 0x20e0774 0x00020000 -wm 32 0x20e0784 0x00000030 -wm 32 0x20e0788 0x00000030 -wm 32 0x20e0794 0x00000030 -wm 32 0x20e079c 0x00000030 -wm 32 0x20e07a0 0x00000030 -wm 32 0x20e07a4 0x00000030 -wm 32 0x20e07a8 0x00000030 -wm 32 0x20e0748 0x00000030 -wm 32 0x20e05ac 0x00000030 -wm 32 0x20e05b4 0x00000030 -wm 32 0x20e0528 0x00000030 -wm 32 0x20e0520 0x00000030 -wm 32 0x20e0514 0x00000030 -wm 32 0x20e0510 0x00000030 -wm 32 0x20e05bc 0x00000030 -wm 32 0x20e05c4 0x00000030 -wm 32 0x21b0800 0xa1390003 -wm 32 0x21b080c 0x001F001F -wm 32 0x21b0810 0x001F001F -wm 32 0x21b480c 0x001F001F -wm 32 0x21b4810 0x001F001F -wm 32 0x21b083c 0x43270338 -wm 32 0x21b0840 0x03200314 -wm 32 0x21b483c 0x431A032F -wm 32 0x21b4840 0x03200263 -wm 32 0x21b0848 0x4B434748 -wm 32 0x21b4848 0x4445404C -wm 32 0x21b0850 0x38444542 -wm 32 0x21b4850 0x4935493A -wm 32 0x21b081c 0x33333333 -wm 32 0x21b0820 0x33333333 -wm 32 0x21b0824 0x33333333 -wm 32 0x21b0828 0x33333333 -wm 32 0x21b481c 0x33333333 -wm 32 0x21b4820 0x33333333 -wm 32 0x21b4824 0x33333333 -wm 32 0x21b4828 0x33333333 -wm 32 0x21b08b8 0x00000800 -wm 32 0x21b48b8 0x00000800 -wm 32 0x21b0004 0x00020036 -wm 32 0x21b0008 0x09444040 -wm 32 0x21b000c 0x555A7975 -wm 32 0x21b0010 0xFF538F64 -wm 32 0x21b0014 0x01FF00DB -wm 32 0x21b0018 0x00001740 -wm 32 0x21b001c 0x00008000 -wm 32 0x21b002c 0x000026d2 -wm 32 0x21b0030 0x005A1023 -wm 32 0x21b0040 0x00000027 -wm 32 0x21b0000 0x831A0000 -wm 32 0x21b001c 0x04088032 -wm 32 0x21b001c 0x00008033 -wm 32 0x21b001c 0x00048031 -wm 32 0x21b001c 0x09408030 -wm 32 0x21b001c 0x04008040 -wm 32 0x21b0020 0x00005800 -wm 32 0x21b0818 0x00011117 -wm 32 0x21b4818 0x00011117 -wm 32 0x21b0004 0x00025576 -wm 32 0x21b0404 0x00011006 -wm 32 0x21b001c 0x00000000 diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg new file mode 100644 index 0000000000..d0a0b40189 --- /dev/null +++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6q-sabresd.imxcfg @@ -0,0 +1,90 @@ +loadaddr 0x10000000 +soc imx6 +ivtofs 0x400 +wm 32 0x20e056c 0x00020030 +wm 32 0x20e0578 0x00020030 +wm 32 0x20e0588 0x00020030 +wm 32 0x20e0594 0x00020030 +wm 32 0x20e0798 0x000C0000 +wm 32 0x20e0758 0x00000000 +wm 32 0x20e0588 0x00000030 +wm 32 0x20e0594 0x00000030 +wm 32 0x20e056c 0x00000030 +wm 32 0x20e0578 0x00000030 +wm 32 0x20e074c 0x00000030 +wm 32 0x20e057c 0x00000030 +wm 32 0x20e058c 0x00000000 +wm 32 0x20e059c 0x00000030 +wm 32 0x20e05a0 0x00000030 +wm 32 0x20e078c 0x00000030 +wm 32 0x20e0750 0x00020000 +wm 32 0x20e05a8 0x00000030 +wm 32 0x20e05b0 0x00000030 +wm 32 0x20e0524 0x00000030 +wm 32 0x20e051c 0x00000030 +wm 32 0x20e0518 0x00000030 +wm 32 0x20e050c 0x00000030 +wm 32 0x20e05b8 0x00000030 +wm 32 0x20e05c0 0x00000030 +wm 32 0x20e0774 0x00020000 +wm 32 0x20e0784 0x00000030 +wm 32 0x20e0788 0x00000030 +wm 32 0x20e0794 0x00000030 +wm 32 0x20e079c 0x00000030 +wm 32 0x20e07a0 0x00000030 +wm 32 0x20e07a4 0x00000030 +wm 32 0x20e07a8 0x00000030 +wm 32 0x20e0748 0x00000030 +wm 32 0x20e05ac 0x00000030 +wm 32 0x20e05b4 0x00000030 +wm 32 0x20e0528 0x00000030 +wm 32 0x20e0520 0x00000030 +wm 32 0x20e0514 0x00000030 +wm 32 0x20e0510 0x00000030 +wm 32 0x20e05bc 0x00000030 +wm 32 0x20e05c4 0x00000030 +wm 32 0x21b0800 0xa1390003 +wm 32 0x21b080c 0x001F001F +wm 32 0x21b0810 0x001F001F +wm 32 0x21b480c 0x001F001F +wm 32 0x21b4810 0x001F001F +wm 32 0x21b083c 0x43270338 +wm 32 0x21b0840 0x03200314 +wm 32 0x21b483c 0x431A032F +wm 32 0x21b4840 0x03200263 +wm 32 0x21b0848 0x4B434748 +wm 32 0x21b4848 0x4445404C +wm 32 0x21b0850 0x38444542 +wm 32 0x21b4850 0x4935493A +wm 32 0x21b081c 0x33333333 +wm 32 0x21b0820 0x33333333 +wm 32 0x21b0824 0x33333333 +wm 32 0x21b0828 0x33333333 +wm 32 0x21b481c 0x33333333 +wm 32 0x21b4820 0x33333333 +wm 32 0x21b4824 0x33333333 +wm 32 0x21b4828 0x33333333 +wm 32 0x21b08b8 0x00000800 +wm 32 0x21b48b8 0x00000800 +wm 32 0x21b0004 0x00020036 +wm 32 0x21b0008 0x09444040 +wm 32 0x21b000c 0x555A7975 +wm 32 0x21b0010 0xFF538F64 +wm 32 0x21b0014 0x01FF00DB +wm 32 0x21b0018 0x00001740 +wm 32 0x21b001c 0x00008000 +wm 32 0x21b002c 0x000026d2 +wm 32 0x21b0030 0x005A1023 +wm 32 0x21b0040 0x00000027 +wm 32 0x21b0000 0x831A0000 +wm 32 0x21b001c 0x04088032 +wm 32 0x21b001c 0x00008033 +wm 32 0x21b001c 0x00048031 +wm 32 0x21b001c 0x09408030 +wm 32 0x21b001c 0x04008040 +wm 32 0x21b0020 0x00005800 +wm 32 0x21b0818 0x00011117 +wm 32 0x21b4818 0x00011117 +wm 32 0x21b0004 0x00025576 +wm 32 0x21b0404 0x00011006 +wm 32 0x21b001c 0x00000000 diff --git a/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg new file mode 100644 index 0000000000..aa52776afb --- /dev/null +++ b/arch/arm/boards/freescale-mx6-sabresd/flash-header-mx6qp-sabresd.imxcfg @@ -0,0 +1,96 @@ +loadaddr 0x10000000 +soc imx6 +ivtofs 0x400 +wm 32 0x20e0798 0x000c0000 +wm 32 0x20e0758 0x00000000 +wm 32 0x20e0588 0x00000030 +wm 32 0x20e0594 0x00000030 +wm 32 0x20e056c 0x00000030 +wm 32 0x20e0578 0x00000030 +wm 32 0x20e074c 0x00000030 +wm 32 0x20e057c 0x00000030 +wm 32 0x20e058c 0x00000000 +wm 32 0x20e059c 0x00000030 +wm 32 0x20e05a0 0x00000030 +wm 32 0x20e078c 0x00000030 +wm 32 0x20e0750 0x00020000 +wm 32 0x20e05a8 0x00000030 +wm 32 0x20e05b0 0x00000030 +wm 32 0x20e0524 0x00000030 +wm 32 0x20e051c 0x00000030 +wm 32 0x20e0518 0x00000030 +wm 32 0x20e050c 0x00000030 +wm 32 0x20e05b8 0x00000030 +wm 32 0x20e05c0 0x00000030 +wm 32 0x20e0774 0x00020000 +wm 32 0x20e0784 0x00000030 +wm 32 0x20e0788 0x00000030 +wm 32 0x20e0794 0x00000030 +wm 32 0x20e079c 0x00000030 +wm 32 0x20e07a0 0x00000030 +wm 32 0x20e07a4 0x00000030 +wm 32 0x20e07a8 0x00000030 +wm 32 0x20e0748 0x00000030 +wm 32 0x20e05ac 0x00000030 +wm 32 0x20e05b4 0x00000030 +wm 32 0x20e0528 0x00000030 +wm 32 0x20e0520 0x00000030 +wm 32 0x20e0514 0x00000030 +wm 32 0x20e0510 0x00000030 +wm 32 0x20e05bc 0x00000030 +wm 32 0x20e05c4 0x00000030 +wm 32 0x21b0800 0xa1390003 +wm 32 0x21b080c 0x001b001e +wm 32 0x21b0810 0x002e0029 +wm 32 0x21b480c 0x001b002a +wm 32 0x21b4810 0x0019002c +wm 32 0x21b083c 0x43240334 +wm 32 0x21b0840 0x0324031a +wm 32 0x21b483c 0x43340344 +wm 32 0x21b4840 0x03280276 +wm 32 0x21b0848 0x44383A3E +wm 32 0x21b4848 0x3C3C3846 +wm 32 0x21b0850 0x2e303230 +wm 32 0x21b4850 0x38283E34 +wm 32 0x21b081c 0x33333333 +wm 32 0x21b0820 0x33333333 +wm 32 0x21b0824 0x33333333 +wm 32 0x21b0828 0x33333333 +wm 32 0x21b481c 0x33333333 +wm 32 0x21b4820 0x33333333 +wm 32 0x21b4824 0x33333333 +wm 32 0x21b4828 0x33333333 +wm 32 0x21b08c0 0x24912249 +wm 32 0x21b48c0 0x24914289 +wm 32 0x21b08b8 0x00000800 +wm 32 0x21b48b8 0x00000800 +wm 32 0x21b0004 0x00020036 +wm 32 0x21b0008 0x24444040 +wm 32 0x21b000c 0x555A7955 +wm 32 0x21b0010 0xFF320F64 +wm 32 0x21b0014 0x01ff00db +wm 32 0x21b0018 0x00001740 +wm 32 0x21b001c 0x00008000 +wm 32 0x21b002c 0x000026d2 +wm 32 0x21b0030 0x005A1023 +wm 32 0x21b0040 0x00000027 +wm 32 0x21b0400 0x14420000 +wm 32 0x21b0000 0x831A0000 +wm 32 0x21b0890 0x00400C58 +wm 32 0x0bb0008 0x00000000 +wm 32 0x0bb000c 0x2891E41A +wm 32 0x0bb0038 0x00000564 +wm 32 0x0bb0014 0x00000040 +wm 32 0x0bb0028 0x00000020 +wm 32 0x0bb002c 0x00000020 +wm 32 0x21b001c 0x04088032 +wm 32 0x21b001c 0x00008033 +wm 32 0x21b001c 0x00048031 +wm 32 0x21b001c 0x09408030 +wm 32 0x21b001c 0x04008040 +wm 32 0x21b0020 0x00005800 +wm 32 0x21b0818 0x00011117 +wm 32 0x21b4818 0x00011117 +wm 32 0x21b0004 0x00025576 +wm 32 0x21b0404 0x00011006 +wm 32 0x21b001c 0x00000000 diff --git a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c index ae847feaa6..7f83366e7a 100644 --- a/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c +++ b/arch/arm/boards/freescale-mx6-sabresd/lowlevel.c @@ -35,3 +35,19 @@ ENTRY_FUNCTION(start_imx6q_sabresd, r0, r1, r2) barebox_arm_entry(0x10000000, SZ_1G, fdt); } + +extern char __dtb_imx6qp_sabresd_start[]; + +ENTRY_FUNCTION(start_imx6qp_sabresd, r0, r1, r2) +{ + void *fdt; + + imx6_cpu_lowlevel_init(); + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + setup_uart(); + + fdt = __dtb_imx6qp_sabresd_start + get_runtime_offset(); + + barebox_arm_entry(0x10000000, SZ_1G, fdt); +} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a637869fb6..795087f41b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -100,7 +100,7 @@ lwl-$(CONFIG_MACH_RPI2) += bcm2836-rpi-2.dtb.o lwl-$(CONFIG_MACH_RPI3) += bcm2837-rpi-3.dtb.o lwl-$(CONFIG_MACH_RPI_CM3) += bcm2837-rpi-cm3.dtb.o lwl-$(CONFIG_MACH_SABRELITE) += imx6q-sabrelite.dtb.o imx6dl-sabrelite.dtb.o -lwl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o +lwl-$(CONFIG_MACH_SABRESD) += imx6q-sabresd.dtb.o imx6qp-sabresd.dtb.o lwl-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += imx6sx-sdb.dtb.o lwl-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += socfpga_cyclone5_socdk.dtb.o lwl-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += socfpga_cyclone5_socrates.dtb.o diff --git a/arch/arm/dts/imx6qp-sabresd.dts b/arch/arm/dts/imx6qp-sabresd.dts new file mode 100644 index 0000000000..1fb20cb0b4 --- /dev/null +++ b/arch/arm/dts/imx6qp-sabresd.dts @@ -0,0 +1,42 @@ +/* + * Copyright 2012 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include + +/ { + model = "Freescale i.MX6 Quad Plus SABRE Smart Device Board"; + compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; + + chosen { + stdout-path = &uart1; + + environment { + compatible = "barebox,environment"; + device-path = &environment_usdhc3; + }; + }; +}; + +&usdhc3 { + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + environment_usdhc3: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; +}; diff --git a/images/Makefile.imx b/images/Makefile.imx index f312712840..0ee12786b5 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -215,7 +215,9 @@ $(call build_imx_habv4img, CONFIG_MACH_SABRELITE, start_imx6q_sabrelite, freesca $(call build_imx_habv4img, CONFIG_MACH_SABRELITE, start_imx6dl_sabrelite, freescale-mx6-sabrelite/flash-header-mx6-sabrelite, freescale-imx6dl-sabrelite) -$(call build_imx_habv4img, CONFIG_MACH_SABRESD, start_imx6q_sabresd, freescale-mx6-sabresd/flash-header-mx6-sabresd, freescale-imx6q-sabresd) +$(call build_imx_habv4img, CONFIG_MACH_SABRESD, start_imx6q_sabresd, freescale-mx6-sabresd/flash-header-mx6q-sabresd, freescale-imx6q-sabresd) + +$(call build_imx_habv4img, CONFIG_MACH_SABRESD, start_imx6qp_sabresd, freescale-mx6-sabresd/flash-header-mx6qp-sabresd, freescale-imx6qp-sabresd) $(call build_imx_habv4img, CONFIG_MACH_UDOO_NEO, start_imx6sx_udoo_neo, udoo-neo/flash-header-mx6sx-udoo-neo_full, udoo-neo) -- cgit v1.2.3 From 6eaf7cad597cb78db666b44dc911167631560384 Mon Sep 17 00:00:00 2001 From: David Jander Date: Fri, 28 May 2021 15:30:39 +0200 Subject: ARM: protonic: add initial support for the Protonic PRT8MM family of boards This board is a low-cost 7" touchscreen virtual terminal for agricultural applications. There is no upstream Linux DT yet, so we add a minimal DT for use with the bootloader in this patch. Signed-off-by: David Jander [lst: fixed and cleaned up for upstream] Signed-off-by: Lucas Stach Link: https://lore.barebox.org/20210528133041.1109923-2-l.stach@pengutronix.de Signed-off-by: Sascha Hauer --- Documentation/boards/imx/protonic-prt8mm.rst | 10 + arch/arm/boards/Makefile | 1 + arch/arm/boards/protonic-imx8m/Makefile | 3 + arch/arm/boards/protonic-imx8m/board.c | 84 + .../defaultenv-prt8m/boot/prt8mm-default | 7 + .../defaultenv-prt8m/network/eth0-discover | 4 + .../defaultenv-prt8m/nv/boot.default | 1 + .../protonic-imx8m/flash-header-prt8mm.imxcfg | 5 + arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c | 122 ++ .../boards/protonic-imx8m/lpddr4-timing-prt8mm.c | 1994 ++++++++++++++++++++ arch/arm/dts/Makefile | 1 + arch/arm/dts/imx8mm-prt8mm.dts | 251 +++ arch/arm/mach-imx/Kconfig | 10 + images/Makefile.imx | 5 + 14 files changed, 2498 insertions(+) create mode 100644 Documentation/boards/imx/protonic-prt8mm.rst create mode 100644 arch/arm/boards/protonic-imx8m/Makefile create mode 100644 arch/arm/boards/protonic-imx8m/board.c create mode 100644 arch/arm/boards/protonic-imx8m/defaultenv-prt8m/boot/prt8mm-default create mode 100644 arch/arm/boards/protonic-imx8m/defaultenv-prt8m/network/eth0-discover create mode 100644 arch/arm/boards/protonic-imx8m/defaultenv-prt8m/nv/boot.default create mode 100644 arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg create mode 100644 arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c create mode 100644 arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c create mode 100644 arch/arm/dts/imx8mm-prt8mm.dts (limited to 'arch/arm') diff --git a/Documentation/boards/imx/protonic-prt8mm.rst b/Documentation/boards/imx/protonic-prt8mm.rst new file mode 100644 index 0000000000..f8c8b2c88d --- /dev/null +++ b/Documentation/boards/imx/protonic-prt8mm.rst @@ -0,0 +1,10 @@ +Protonic Holland PRT8MM board +============================= + +This board is a low-cost 7inch touchscreen virtual terminal for agricultural applications. +HW specs: + +* SoC: i.MX8M mini +* RAM: 1GiB LPDDR4 +* eMMC: 16GiB +* Display: 7inch 800x480 with capacitive touchscreen. diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 40b0af8d30..51f5f60857 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -105,6 +105,7 @@ obj-$(CONFIG_MACH_PM9261) += pm9261/ obj-$(CONFIG_MACH_PM9263) += pm9263/ obj-$(CONFIG_MACH_PM9G45) += pm9g45/ obj-$(CONFIG_MACH_PROTONIC_IMX6) += protonic-imx6/ +obj-$(CONFIG_MACH_PROTONIC_IMX8M) += protonic-imx8m/ obj-$(CONFIG_MACH_QIL_A9260) += qil-a926x/ obj-$(CONFIG_MACH_QIL_A9G20) += qil-a926x/ obj-$(CONFIG_MACH_RADXA_ROCK) += radxa-rock/ diff --git a/arch/arm/boards/protonic-imx8m/Makefile b/arch/arm/boards/protonic-imx8m/Makefile new file mode 100644 index 0000000000..51a27f0c2d --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/Makefile @@ -0,0 +1,3 @@ +obj-y += board.o +lwl-y += lowlevel-prt8mm.o lpddr4-timing-prt8mm.o +bbenv-y += defaultenv-prt8m diff --git a/arch/arm/boards/protonic-imx8m/board.c b/arch/arm/boards/protonic-imx8m/board.c new file mode 100644 index 0000000000..87264f0c97 --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/board.c @@ -0,0 +1,84 @@ +// SPDX-License-Identifier: GPL-2.0-only +// SPDX-FileCopyrightText: 2020 David Jander, Protonic Holland + +#include +#include +#include +#include +#include +#include +#include + +static int prt_prt8mm_init_power(void) +{ + struct i2c_adapter *adapter = NULL; + struct i2c_client client; + int ret; + char buf[2]; + + client.addr = 0x60; + adapter = i2c_get_adapter(1); + if (!adapter) { + printf("i2c bus not found\n"); + return -ENODEV; + } + client.adapter = adapter; + + buf[0] = 0xe3; + ret = i2c_write_reg(&client, 0x00, buf, 1); // VSEL0 = 0.95V, force PWM + if (ret < 0) { + printf("i2c write error\n"); + return -ENODEV; + } + buf[0] = 0xe0; + ret = i2c_write_reg(&client, 0x01, buf, 1); // VSEL1 = 0.92V, force PWM + if (ret < 0) { + printf("i2c write error\n"); + return -ENODEV; + } + return 0; +} + +static int prt_prt8mm_probe(struct device_d *dev) +{ + int emmc_bbu_flag = 0; + int sd_bbu_flag = 0; + + prt_prt8mm_init_power(); + + barebox_set_hostname("prt8mm"); + + if (bootsource_get() == BOOTSOURCE_MMC) { + if (bootsource_get_instance() == 2) { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } else { + of_device_enable_path("/chosen/environment-sd"); + sd_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + } else { + of_device_enable_path("/chosen/environment-emmc"); + emmc_bbu_flag = BBU_HANDLER_FLAG_DEFAULT; + } + + imx8m_bbu_internal_mmc_register_handler("SD", "/dev/mmc1.barebox", + sd_bbu_flag); + imx8m_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc2", + emmc_bbu_flag); + + defaultenv_append_directory(defaultenv_prt8m); + + return 0; +} + +static const struct of_device_id prt_imx8mm_of_match[] = { + { .compatible = "prt,prt8mm", }, + { /* sentinel */ }, +}; + +static struct driver_d prt_prt8mm_board_driver = { + .name = "board-protonic-imx8mm", + .probe = prt_prt8mm_probe, + .of_compatible = DRV_OF_COMPAT(prt_imx8mm_of_match), +}; +device_platform_driver(prt_prt8mm_board_driver); diff --git a/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/boot/prt8mm-default b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/boot/prt8mm-default new file mode 100644 index 0000000000..ca8bef306d --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/boot/prt8mm-default @@ -0,0 +1,7 @@ +#!/bin/sh + +if [ "$bootsource_instance" = "2" ]; then + boot mmc2 +else + boot mmc3 +fi diff --git a/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/network/eth0-discover b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/network/eth0-discover new file mode 100644 index 0000000000..18f2446387 --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/network/eth0-discover @@ -0,0 +1,4 @@ +#!/bin/sh + +# PRT8M doesn't have a ETH port, but may have USB network attached +usb diff --git a/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/nv/boot.default b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/nv/boot.default new file mode 100644 index 0000000000..ba8938923a --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/defaultenv-prt8m/nv/boot.default @@ -0,0 +1 @@ +prt8mm-default diff --git a/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg b/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg new file mode 100644 index 0000000000..b013173113 --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/flash-header-prt8mm.imxcfg @@ -0,0 +1,5 @@ +soc imx8mm + +loadaddr 0x007e1000 +max_load_size 0x3f000 +ivtofs 0x400 diff --git a/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c new file mode 100644 index 0000000000..3b8b53b36e --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/lowlevel-prt8mm.c @@ -0,0 +1,122 @@ +// SPDX-License-Identifier: GPL-2.0-only + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +extern char __dtb_imx8mm_prt8mm_start[]; + +#define UART_PAD_CTRL MUX_PAD_CTRL(PAD_CTL_DSE_3P3V_45_OHM) + +static void setup_uart(void) +{ + void __iomem *uart = IOMEM(MX8M_UART4_BASE_ADDR); + + imx8m_early_setup_uart_clock(); + + imx8mm_setup_pad(IMX8MM_PAD_UART4_TXD_UART4_TX | UART_PAD_CTRL); + imx8m_uart_setup(uart); + + pbl_set_putc(imx_uart_putc, uart); + + putc_ll('>'); +} + +extern struct dram_timing_info prt8mm_dram_timing; + +static void start_atf(void) +{ + size_t bl31_size; + const u8 *bl31; + enum bootsource src; + int instance; + + /* + * If we are in EL3 we are running for the first time and need to + * initialize the DRAM and run TF-A (BL31). The TF-A will then jump + * to DRAM in EL2. + */ + if (current_el() != 3) + return; + + imx8mm_early_clock_init(); + + imx8mm_ddr_init(&prt8mm_dram_timing); + + imx8mm_get_boot_source(&src, &instance); + switch (src) { + case BOOTSOURCE_MMC: + imx8m_esdhc_load_image(instance, false); + break; + case BOOTSOURCE_SERIAL: + imx8mm_barebox_load_usb((void *)MX8M_ATF_BL33_BASE_ADDR); + break; + default: + printf("Unhandled bootsource BOOTSOURCE_%d\n", src); + hang(); + } + + /* + * On completion the TF-A will jump to MX8M_ATF_BL33_BASE_ADDR + * in EL2. Copy the image there, but replace the PBL part of + * that image with ourselves. On a high assurance boot only the + * currently running code is validated and contains the checksum + * for the piggy data, so we need to ensure that we are running + * the same code in DRAM. + */ + memcpy((void *)MX8MM_ATF_BL33_BASE_ADDR, + __image_start, barebox_pbl_size); + + get_builtin_firmware(imx8mm_bl31_bin, &bl31, &bl31_size); + imx8mm_atf_load_bl31(bl31, bl31_size); + + /* not reached */ +} + +/* + * Power-on execution flow of start_prt_prt8mm() might not be + * obvious for a very first read, so here's, hopefully helpful, + * summary: + * + * 1. MaskROM uploads PBL into OCRAM and that's where this function is + * executed for the first time. At entry the exception level is EL3. + * + * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL + * part is copied from OCRAM to the TF-A return address in DRAM. + * + * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us + * from EL3 to EL2. + * + * 4. Standard barebox boot flow continues + */ +static __noreturn noinline void prt_prt8mm_start(void) +{ + setup_uart(); + + start_atf(); + + /* + * Standard entry we hit once we initialized both DDR and ATF + */ + imx8mm_barebox_entry(__dtb_imx8mm_prt8mm_start); +} + +ENTRY_FUNCTION(start_prt_prt8mm, r0, r1, r2) +{ + imx8mm_cpu_lowlevel_init(); + + relocate_to_current_adr(); + setup_c(); + + prt_prt8mm_start(); +} diff --git a/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c new file mode 100644 index 0000000000..2c55e7d451 --- /dev/null +++ b/arch/arm/boards/protonic-imx8m/lpddr4-timing-prt8mm.c @@ -0,0 +1,1994 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include +#include + +#define DDR_ONE_RANK +#include + +static struct dram_cfg_param lpddr4_ddrc_cfg[] = { + /* Start to config, default 3200mbps */ + { DDRC_DBG1(0), 0x00000001 }, + { DDRC_PWRCTL(0), 0x00000001 }, + { DDRC_MSTR(0), 0xa1080020 }, + { DDRC_RFSHTMG(0), 0x005b0087 }, + { DDRC_INIT0(0), 0xc00305ba }, + { DDRC_INIT1(0), 0x00940000 }, + { DDRC_INIT3(0), 0x00D4002D }, + { DDRC_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 }, + { DDRC_INIT6(0), 0x0066004d }, + { DDRC_INIT7(0), 0x0016004d }, + + { DDRC_DRAMTMG0(0), 0x191e1920 }, + { DDRC_DRAMTMG1(0), 0x00060630 }, + { DDRC_DRAMTMG3(0), 0x00B0B000 }, + { DDRC_DRAMTMG4(0), 0x0e04080e }, + { DDRC_DRAMTMG5(0), 0x02040C0C }, + { DDRC_DRAMTMG6(0), 0x01010007 }, + { DDRC_DRAMTMG7(0), 0x00000401 }, + { DDRC_DRAMTMG12(0), 0x00020600 }, + { DDRC_DRAMTMG13(0), 0x0c100002 }, + { DDRC_DRAMTMG14(0), 0x0000008d }, + { DDRC_DRAMTMG17(0), 0x0090004b }, + + //{ DDRC_DERATEEN(0), 0x00000203 }, + //{ DDRC_DERATEINT(0), 0x0003a980 }, + + { DDRC_ZQCTL0(0), 0x02ee0017 }, + { DDRC_ZQCTL1(0), 0x02605b8e }, + { DDRC_ZQCTL2(0), 0x00000000 }, + + { DDRC_DFITMG0(0), 0x0497820A }, + { DDRC_DFITMG2(0), 0x0000170A }, + { DDRC_DRAMTMG2(0), 0x070e1617 }, + { DDRC_DBICTL(0), 0x00000001 }, + + { DDRC_DFITMG1(0), 0x00080303 }, + { DDRC_DFIUPD0(0), 0xE0400018 }, + { DDRC_DFIUPD1(0), 0x00DF00E4 }, + { DDRC_DFIUPD2(0), 0x80000000 }, + { DDRC_DFIMISC(0), 0x00000011 }, + + { DDRC_DFIPHYMSTR(0), 0x00000000 }, + { DDRC_RANKCTL(0), 0x00000c99 }, + + /* address mapping */ + { DDRC_ADDRMAP0(0), 0x0000001f }, + { DDRC_ADDRMAP1(0), 0x00080808 }, + { DDRC_ADDRMAP2(0), 0x00000000 }, + { DDRC_ADDRMAP3(0), 0x00000000 }, + { DDRC_ADDRMAP4(0), 0x00001f1f }, + { DDRC_ADDRMAP5(0), 0x07070707 }, + { DDRC_ADDRMAP6(0), 0x0F070707 }, + { DDRC_ADDRMAP7(0), 0x00000f0f }, + + /* performance setting */ + { DDRC_SCHED(0), 0x29001701 }, + { DDRC_SCHED1(0), 0x0000002c }, + { DDRC_PERFHPR1(0), 0x04000030 }, + { DDRC_PERFLPR1(0), 0x900093e7 }, + { DDRC_PERFWR1(0), 0x02005574 }, + { DDRC_PCCFG(0), 0x00000111 }, + { DDRC_PCFGW_0(0), 0x000072ff }, + { DDRC_PCFGQOS0_0(0), 0x02100e07 }, + { DDRC_PCFGQOS1_0(0), 0x00620096 }, + { DDRC_PCFGWQOS0_0(0), 0x01100e07 }, + { DDRC_PCFGWQOS1_0(0), 0x00c8012c }, + + /* frequency P1&P2 */ + /* Frequency 1: 400MHz */ + { DDRC_FREQ1_DRAMTMG0(0), 0x0c080609 }, + { DDRC_FREQ1_DRAMTMG1(0), 0x0003040d }, + { DDRC_FREQ1_DRAMTMG2(0), 0x0305090c }, + { DDRC_FREQ1_DRAMTMG3(0), 0x00505000 }, + { DDRC_FREQ1_DRAMTMG4(0), 0x04040204 }, + { DDRC_FREQ1_DRAMTMG5(0), 0x02030303 }, + { DDRC_FREQ1_DRAMTMG6(0), 0x01010004 }, + { DDRC_FREQ1_DRAMTMG7(0), 0x00000301 }, + //{ DDRC_FREQ1_DRAMTMG12(0), 0x00020300 }, + //{ DDRC_FREQ1_DRAMTMG13(0), 0x0a100002 }, + { DDRC_FREQ1_DRAMTMG14(0), 0x00000026 }, + { DDRC_FREQ1_DRAMTMG15(0), 0x00000000 }, + { DDRC_FREQ1_DRAMTMG17(0), 0x00280014 }, + //{ DDRC_FREQ1_DERATEEN(0), 0x00000001 }, + { DDRC_FREQ1_DERATEINT(0), 0x00007a00 }, + //{ DDRC_FREQ1_RFSHCTL0(0), 0x0020d040 }, + //{ DDRC_FREQ1_ZQCTL0(0), 0x00c80006 }, + { DDRC_FREQ1_DFITMG0(0), 0x03858202 }, + //{ DDRC_FREQ1_DFITMG1(0), 0x00080303 }, + { DDRC_FREQ1_DFITMG2(0), 0x00000502 }, + { DDRC_FREQ1_RFSHTMG(0), 0x00180024 }, + { DDRC_FREQ1_INIT3(0), 0x00940009 }, + { DDRC_FREQ1_INIT4(0), 0x00310000 }, + { DDRC_FREQ1_INIT6(0), 0x0066004d }, + { DDRC_FREQ1_INIT7(0), 0x0016004d }, + // { DDRC_FREQ1_RANKCTL(0), 0x00000c99 }, + + /* Frequency 2: 100MHz */ + { DDRC_FREQ2_DRAMTMG0(0), 0x0a020103 }, + { DDRC_FREQ2_DRAMTMG1(0), 0x00030405 }, + { DDRC_FREQ2_DRAMTMG2(0), 0x0203060b }, + { DDRC_FREQ2_DRAMTMG3(0), 0x00505000 }, + { DDRC_FREQ2_DRAMTMG4(0), 0x02040202 }, + { DDRC_FREQ2_DRAMTMG5(0), 0x02030202 }, + { DDRC_FREQ2_DRAMTMG6(0), 0x01010004 }, + { DDRC_FREQ2_DRAMTMG7(0), 0x00000301 }, + //{ DDRC_FREQ2_DRAMTMG12(0), 0x00020300 }, + //{ DDRC_FREQ2_DRAMTMG13(0), 0x0a100002 }, + { DDRC_FREQ2_DRAMTMG14(0), 0x0000000a }, + { DDRC_FREQ2_DRAMTMG17(0), 0x000a0005 }, + //{ DDRC_FREQ2_DERATEEN(0), 0x00000001 }, + { DDRC_FREQ2_DERATEINT(0), 0x00003e80 }, + //{ DDRC_FREQ2_RFSHCTL0(0), 0x0020d040 }, + //{ DDRC_FREQ2_ZQCTL0(0), 0x00320004 }, + { DDRC_FREQ2_DFITMG0(0), 0x03818200 }, + //{ DDRC_FREQ2_DFITMG1(0), 0x00080303 }, + { DDRC_FREQ2_DFITMG2(0), 0x00000100 }, + { DDRC_FREQ2_RFSHTMG(0), 0x00060009 }, + { DDRC_FREQ2_INIT3(0), 0x00840000 }, + { DDRC_FREQ2_INIT4(0), 0x00310008 }, + //{ DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 }, + { DDRC_FREQ2_INIT6(0), 0x0066004d }, + { DDRC_FREQ2_INIT7(0), 0x0016004d }, + // { DDRC_FREQ2_RANKCTL(0), 0x00000c99 }, + + /* boot start point */ + { DDRC_MSTR2(0), 0x0 }, //DDRC_MSTR2 +}; + +/* PHY Initialize Configuration */ +static struct dram_cfg_param lpddr4_ddrphy_cfg[] = { + { 0x1005f, 0x1ff }, + { 0x1015f, 0x1ff }, + { 0x1105f, 0x1ff }, + { 0x1115f, 0x1ff }, + { 0x1205f, 0x1ff }, + { 0x1215f, 0x1ff }, + { 0x1305f, 0x1ff }, + { 0x1315f, 0x1ff }, + + { 0x11005f, 0x1ff }, + { 0x11015f, 0x1ff }, + { 0x11105f, 0x1ff }, + { 0x11115f, 0x1ff }, + { 0x11205f, 0x1ff }, + { 0x11215f, 0x1ff }, + { 0x11305f, 0x1ff }, + { 0x11315f, 0x1ff }, + + { 0x21005f, 0x1ff }, + { 0x21015f, 0x1ff }, + { 0x21105f, 0x1ff }, + { 0x21115f, 0x1ff }, + { 0x21205f, 0x1ff }, + { 0x21215f, 0x1ff }, + { 0x21305f, 0x1ff }, + { 0x21315f, 0x1ff }, + + { 0x55, 0x1ff }, + { 0x1055, 0x1ff }, + { 0x2055, 0x1ff }, + { 0x3055, 0x1ff }, + { 0x4055, 0x1ff }, + { 0x5055, 0x1ff }, + { 0x6055, 0x1ff }, + { 0x7055, 0x1ff }, + { 0x8055, 0x1ff }, + { 0x9055, 0x1ff }, + + { 0x200c5, 0x19 }, + { 0x1200c5, 0x7 }, + { 0x2200c5, 0x7 }, + + { 0x2002e, 0x2 }, + { 0x12002e, 0x2 }, + { 0x22002e, 0x2 }, + + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + + { 0x20024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x120024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x220024, 0xab }, + { 0x2003a, 0x0 }, + + { 0x20056, 0x3 }, + { 0x120056, 0xa }, + { 0x220056, 0xa }, + + { 0x1004d, 0xe00 }, + { 0x1014d, 0xe00 }, + { 0x1104d, 0xe00 }, + { 0x1114d, 0xe00 }, + { 0x1204d, 0xe00 }, + { 0x1214d, 0xe00 }, + { 0x1304d, 0xe00 }, + { 0x1314d, 0xe00 }, + + { 0x11004d, 0xe00 }, + { 0x11014d, 0xe00 }, + { 0x11104d, 0xe00 }, + { 0x11114d, 0xe00 }, + { 0x11204d, 0xe00 }, + { 0x11214d, 0xe00 }, + { 0x11304d, 0xe00 }, + { 0x11314d, 0xe00 }, + + { 0x21004d, 0xe00 }, + { 0x21014d, 0xe00 }, + { 0x21104d, 0xe00 }, + { 0x21114d, 0xe00 }, + { 0x21204d, 0xe00 }, + { 0x21214d, 0xe00 }, + { 0x21304d, 0xe00 }, + { 0x21314d, 0xe00 }, + + { 0x10049, 0xfbe }, + { 0x10149, 0xfbe }, + { 0x11049, 0xfbe }, + { 0x11149, 0xfbe }, + { 0x12049, 0xfbe }, + { 0x12149, 0xfbe }, + { 0x13049, 0xfbe }, + { 0x13149, 0xfbe }, + + { 0x110049, 0xfbe }, + { 0x110149, 0xfbe }, + { 0x111049, 0xfbe }, + { 0x111149, 0xfbe }, + { 0x112049, 0xfbe }, + { 0x112149, 0xfbe }, + { 0x113049, 0xfbe }, + { 0x113149, 0xfbe }, + + { 0x210049, 0xfbe }, + { 0x210149, 0xfbe }, + { 0x211049, 0xfbe }, + { 0x211149, 0xfbe }, + { 0x212049, 0xfbe }, + { 0x212149, 0xfbe }, + { 0x213049, 0xfbe }, + { 0x213149, 0xfbe }, + + { 0x43, 0x63 }, + { 0x1043, 0x63 }, + { 0x2043, 0x63 }, + { 0x3043, 0x63 }, + { 0x4043, 0x63 }, + { 0x5043, 0x63 }, + { 0x6043, 0x63 }, + { 0x7043, 0x63 }, + { 0x8043, 0x63 }, + { 0x9043, 0x63 }, + + { 0x20018, 0x3 }, + { 0x20075, 0x4 }, + { 0x20050, 0x0 }, + { 0x20008, 0x2ee }, + { 0x120008, 0x64 }, + { 0x220008, 0x19 }, + { 0x20088, 0x9 }, + + { 0x200b2, 0x1d4 }, + { 0x10043, 0x5a1 }, + { 0x10143, 0x5a1 }, + { 0x11043, 0x5a1 }, + { 0x11143, 0x5a1 }, + { 0x12043, 0x5a1 }, + { 0x12143, 0x5a1 }, + { 0x13043, 0x5a1 }, + { 0x13143, 0x5a1 }, + + { 0x1200b2, 0xdc }, + { 0x110043, 0x5a1 }, + { 0x110143, 0x5a1 }, + { 0x111043, 0x5a1 }, + { 0x111143, 0x5a1 }, + { 0x112043, 0x5a1 }, + { 0x112143, 0x5a1 }, + { 0x113043, 0x5a1 }, + { 0x113143, 0x5a1 }, + + { 0x2200b2, 0xdc }, + { 0x210043, 0x5a1 }, + { 0x210143, 0x5a1 }, + { 0x211043, 0x5a1 }, + { 0x211143, 0x5a1 }, + { 0x212043, 0x5a1 }, + { 0x212143, 0x5a1 }, + { 0x213043, 0x5a1 }, + { 0x213143, 0x5a1 }, + + { 0x200fa, 0x1 }, + { 0x1200fa, 0x1 }, + { 0x2200fa, 0x1 }, + + { 0x20019, 0x1 }, + { 0x120019, 0x1 }, + { 0x220019, 0x1 }, + + { 0x200f0, 0x660 }, + { 0x200f1, 0x0 }, + { 0x200f2, 0x4444 }, + { 0x200f3, 0x8888 }, + { 0x200f4, 0x5665 }, + { 0x200f5, 0x0 }, + { 0x200f6, 0x0 }, + { 0x200f7, 0xf000 }, + + { 0x20025, 0x0 }, + { 0x2002d, LPDDR4_PHY_DMIPinPresent }, + { 0x12002d, LPDDR4_PHY_DMIPinPresent }, + { 0x22002d, LPDDR4_PHY_DMIPinPresent }, + { 0x200c7, 0x21 }, + { 0x200ca, 0x24 }, + { 0x1200c7, 0x21 }, + { 0x1200ca, 0x24 }, + { 0x2200c7, 0x21 }, + { 0x2200ca, 0x24 }, +}; + +/* ddr phy trained csr */ +static struct dram_cfg_param lpddr4_ddrphy_trained_csr[] = { + { 0x200b2, 0x0 }, + { 0x1200b2, 0x0 }, + { 0x2200b2, 0x0 }, + { 0x200cb, 0x0 }, + { 0x10043, 0x0 }, + { 0x110043, 0x0 }, + { 0x210043, 0x0 }, + { 0x10143, 0x0 }, + { 0x110143, 0x0 }, + { 0x210143, 0x0 }, + { 0x11043, 0x0 }, + { 0x111043, 0x0 }, + { 0x211043, 0x0 }, + { 0x11143, 0x0 }, + { 0x111143, 0x0 }, + { 0x211143, 0x0 }, + { 0x12043, 0x0 }, + { 0x112043, 0x0 }, + { 0x212043, 0x0 }, + { 0x12143, 0x0 }, + { 0x112143, 0x0 }, + { 0x212143, 0x0 }, + { 0x13043, 0x0 }, + { 0x113043, 0x0 }, + { 0x213043, 0x0 }, + { 0x13143, 0x0 }, + { 0x113143, 0x0 }, + { 0x213143, 0x0 }, + { 0x80, 0x0 }, + { 0x100080, 0x0 }, + { 0x200080, 0x0 }, + { 0x1080, 0x0 }, + { 0x101080, 0x0 }, + { 0x201080, 0x0 }, + { 0x2080, 0x0 }, + { 0x102080, 0x0 }, + { 0x202080, 0x0 }, + { 0x3080, 0x0 }, + { 0x103080, 0x0 }, + { 0x203080, 0x0 }, + { 0x4080, 0x0 }, + { 0x104080, 0x0 }, + { 0x204080, 0x0 }, + { 0x5080, 0x0 }, + { 0x105080, 0x0 }, + { 0x205080, 0x0 }, + { 0x6080, 0x0 }, + { 0x106080, 0x0 }, + { 0x206080, 0x0 }, + { 0x7080, 0x0 }, + { 0x107080, 0x0 }, + { 0x207080, 0x0 }, + { 0x8080, 0x0 }, + { 0x108080, 0x0 }, + { 0x208080, 0x0 }, + { 0x9080, 0x0 }, + { 0x109080, 0x0 }, + { 0x209080, 0x0 }, + { 0x10080, 0x0 }, + { 0x110080, 0x0 }, + { 0x210080, 0x0 }, + { 0x10180, 0x0 }, + { 0x110180, 0x0 }, + { 0x210180, 0x0 }, + { 0x11080, 0x0 }, + { 0x111080, 0x0 }, + { 0x211080, 0x0 }, + { 0x11180, 0x0 }, + { 0x111180, 0x0 }, + { 0x211180, 0x0 }, + { 0x12080, 0x0 }, + { 0x112080, 0x0 }, + { 0x212080, 0x0 }, + { 0x12180, 0x0 }, + { 0x112180, 0x0 }, + { 0x212180, 0x0 }, + { 0x13080, 0x0 }, + { 0x113080, 0x0 }, + { 0x213080, 0x0 }, + { 0x13180, 0x0 }, + { 0x113180, 0x0 }, + { 0x213180, 0x0 }, + { 0x10081, 0x0 }, + { 0x110081, 0x0 }, + { 0x210081, 0x0 }, + { 0x10181, 0x0 }, + { 0x110181, 0x0 }, + { 0x210181, 0x0 }, + { 0x11081, 0x0 }, + { 0x111081, 0x0 }, + { 0x211081, 0x0 }, + { 0x11181, 0x0 }, + { 0x111181, 0x0 }, + { 0x211181, 0x0 }, + { 0x12081, 0x0 }, + { 0x112081, 0x0 }, + { 0x212081, 0x0 }, + { 0x12181, 0x0 }, + { 0x112181, 0x0 }, + { 0x212181, 0x0 }, + { 0x13081, 0x0 }, + { 0x113081, 0x0 }, + { 0x213081, 0x0 }, + { 0x13181, 0x0 }, + { 0x113181, 0x0 }, + { 0x213181, 0x0 }, + { 0x100d0, 0x0 }, + { 0x1100d0, 0x0 }, + { 0x2100d0, 0x0 }, + { 0x101d0, 0x0 }, + { 0x1101d0, 0x0 }, + { 0x2101d0, 0x0 }, + { 0x110d0, 0x0 }, + { 0x1110d0, 0x0 }, + { 0x2110d0, 0x0 }, + { 0x111d0, 0x0 }, + { 0x1111d0, 0x0 }, + { 0x2111d0, 0x0 }, + { 0x120d0, 0x0 }, + { 0x1120d0, 0x0 }, + { 0x2120d0, 0x0 }, + { 0x121d0, 0x0 }, + { 0x1121d0, 0x0 }, + { 0x2121d0, 0x0 }, + { 0x130d0, 0x0 }, + { 0x1130d0, 0x0 }, + { 0x2130d0, 0x0 }, + { 0x131d0, 0x0 }, + { 0x1131d0, 0x0 }, + { 0x2131d0, 0x0 }, + { 0x100d1, 0x0 }, + { 0x1100d1, 0x0 }, + { 0x2100d1, 0x0 }, + { 0x101d1, 0x0 }, + { 0x1101d1, 0x0 }, + { 0x2101d1, 0x0 }, + { 0x110d1, 0x0 }, + { 0x1110d1, 0x0 }, + { 0x2110d1, 0x0 }, + { 0x111d1, 0x0 }, + { 0x1111d1, 0x0 }, + { 0x2111d1, 0x0 }, + { 0x120d1, 0x0 }, + { 0x1120d1, 0x0 }, + { 0x2120d1, 0x0 }, + { 0x121d1, 0x0 }, + { 0x1121d1, 0x0 }, + { 0x2121d1, 0x0 }, + { 0x130d1, 0x0 }, + { 0x1130d1, 0x0 }, + { 0x2130d1, 0x0 }, + { 0x131d1, 0x0 }, + { 0x1131d1, 0x0 }, + { 0x2131d1, 0x0 }, + { 0x10068, 0x0 }, + { 0x10168, 0x0 }, + { 0x10268, 0x0 }, + { 0x10368, 0x0 }, + { 0x10468, 0x0 }, + { 0x10568, 0x0 }, + { 0x10668, 0x0 }, + { 0x10768, 0x0 }, + { 0x10868, 0x0 }, + { 0x11068, 0x0 }, + { 0x11168, 0x0 }, + { 0x11268, 0x0 }, + { 0x11368, 0x0 }, + { 0x11468, 0x0 }, + { 0x11568, 0x0 }, + { 0x11668, 0x0 }, + { 0x11768, 0x0 }, + { 0x11868, 0x0 }, + { 0x12068, 0x0 }, + { 0x12168, 0x0 }, + { 0x12268, 0x0 }, + { 0x12368, 0x0 }, + { 0x12468, 0x0 }, + { 0x12568, 0x0 }, + { 0x12668, 0x0 }, + { 0x12768, 0x0 }, + { 0x12868, 0x0 }, + { 0x13068, 0x0 }, + { 0x13168, 0x0 }, + { 0x13268, 0x0 }, + { 0x13368, 0x0 }, + { 0x13468, 0x0 }, + { 0x13568, 0x0 }, + { 0x13668, 0x0 }, + { 0x13768, 0x0 }, + { 0x13868, 0x0 }, + { 0x10069, 0x0 }, + { 0x10169, 0x0 }, + { 0x10269, 0x0 }, + { 0x10369, 0x0 }, + { 0x10469, 0x0 }, + { 0x10569, 0x0 }, + { 0x10669, 0x0 }, + { 0x10769, 0x0 }, + { 0x10869, 0x0 }, + { 0x11069, 0x0 }, + { 0x11169, 0x0 }, + { 0x11269, 0x0 }, + { 0x11369, 0x0 }, + { 0x11469, 0x0 }, + { 0x11569, 0x0 }, + { 0x11669, 0x0 }, + { 0x11769, 0x0 }, + { 0x11869, 0x0 }, + { 0x12069, 0x0 }, + { 0x12169, 0x0 }, + { 0x12269, 0x0 }, + { 0x12369, 0x0 }, + { 0x12469, 0x0 }, + { 0x12569, 0x0 }, + { 0x12669, 0x0 }, + { 0x12769, 0x0 }, + { 0x12869, 0x0 }, + { 0x13069, 0x0 }, + { 0x13169, 0x0 }, + { 0x13269, 0x0 }, + { 0x13369, 0x0 }, + { 0x13469, 0x0 }, + { 0x13569, 0x0 }, + { 0x13669, 0x0 }, + { 0x13769, 0x0 }, + { 0x13869, 0x0 }, + { 0x1008c, 0x0 }, + { 0x11008c, 0x0 }, + { 0x21008c, 0x0 }, + { 0x1018c, 0x0 }, + { 0x11018c, 0x0 }, + { 0x21018c, 0x0 }, + { 0x1108c, 0x0 }, + { 0x11108c, 0x0 }, + { 0x21108c, 0x0 }, + { 0x1118c, 0x0 }, + { 0x11118c, 0x0 }, + { 0x21118c, 0x0 }, + { 0x1208c, 0x0 }, + { 0x11208c, 0x0 }, + { 0x21208c, 0x0 }, + { 0x1218c, 0x0 }, + { 0x11218c, 0x0 }, + { 0x21218c, 0x0 }, + { 0x1308c, 0x0 }, + { 0x11308c, 0x0 }, + { 0x21308c, 0x0 }, + { 0x1318c, 0x0 }, + { 0x11318c, 0x0 }, + { 0x21318c, 0x0 }, + { 0x1008d, 0x0 }, + { 0x11008d, 0x0 }, + { 0x21008d, 0x0 }, + { 0x1018d, 0x0 }, + { 0x11018d, 0x0 }, + { 0x21018d, 0x0 }, + { 0x1108d, 0x0 }, + { 0x11108d, 0x0 }, + { 0x21108d, 0x0 }, + { 0x1118d, 0x0 }, + { 0x11118d, 0x0 }, + { 0x21118d, 0x0 }, + { 0x1208d, 0x0 }, + { 0x11208d, 0x0 }, + { 0x21208d, 0x0 }, + { 0x1218d, 0x0 }, + { 0x11218d, 0x0 }, + { 0x21218d, 0x0 }, + { 0x1308d, 0x0 }, + { 0x11308d, 0x0 }, + { 0x21308d, 0x0 }, + { 0x1318d, 0x0 }, + { 0x11318d, 0x0 }, + { 0x21318d, 0x0 }, + { 0x100c0, 0x0 }, + { 0x1100c0, 0x0 }, + { 0x2100c0, 0x0 }, + { 0x101c0, 0x0 }, + { 0x1101c0, 0x0 }, + { 0x2101c0, 0x0 }, + { 0x102c0, 0x0 }, + { 0x1102c0, 0x0 }, + { 0x2102c0, 0x0 }, + { 0x103c0, 0x0 }, + { 0x1103c0, 0x0 }, + { 0x2103c0, 0x0 }, + { 0x104c0, 0x0 }, + { 0x1104c0, 0x0 }, + { 0x2104c0, 0x0 }, + { 0x105c0, 0x0 }, + { 0x1105c0, 0x0 }, + { 0x2105c0, 0x0 }, + { 0x106c0, 0x0 }, + { 0x1106c0, 0x0 }, + { 0x2106c0, 0x0 }, + { 0x107c0, 0x0 }, + { 0x1107c0, 0x0 }, + { 0x2107c0, 0x0 }, + { 0x108c0, 0x0 }, + { 0x1108c0, 0x0 }, + { 0x2108c0, 0x0 }, + { 0x110c0, 0x0 }, + { 0x1110c0, 0x0 }, + { 0x2110c0, 0x0 }, + { 0x111c0, 0x0 }, + { 0x1111c0, 0x0 }, + { 0x2111c0, 0x0 }, + { 0x112c0, 0x0 }, + { 0x1112c0, 0x0 }, + { 0x2112c0, 0x0 }, + { 0x113c0, 0x0 }, + { 0x1113c0, 0x0 }, + { 0x2113c0, 0x0 }, + { 0x114c0, 0x0 }, + { 0x1114c0, 0x0 }, + { 0x2114c0, 0x0 }, + { 0x115c0, 0x0 }, + { 0x1115c0, 0x0 }, + { 0x2115c0, 0x0 }, + { 0x116c0, 0x0 }, + { 0x1116c0, 0x0 }, + { 0x2116c0, 0x0 }, + { 0x117c0, 0x0 }, + { 0x1117c0, 0x0 }, + { 0x2117c0, 0x0 }, + { 0x118c0, 0x0 }, + { 0x1118c0, 0x0 }, + { 0x2118c0, 0x0 }, + { 0x120c0, 0x0 }, + { 0x1120c0, 0x0 }, + { 0x2120c0, 0x0 }, + { 0x121c0, 0x0 }, + { 0x1121c0, 0x0 }, + { 0x2121c0, 0x0 }, + { 0x122c0, 0x0 }, + { 0x1122c0, 0x0 }, + { 0x2122c0, 0x0 }, + { 0x123c0, 0x0 }, + { 0x1123c0, 0x0 }, + { 0x2123c0, 0x0 }, + { 0x124c0, 0x0 }, + { 0x1124c0, 0x0 }, + { 0x2124c0, 0x0 }, + { 0x125c0, 0x0 }, + { 0x1125c0, 0x0 }, + { 0x2125c0, 0x0 }, + { 0x126c0, 0x0 }, + { 0x1126c0, 0x0 }, + { 0x2126c0, 0x0 }, + { 0x127c0, 0x0 }, + { 0x1127c0, 0x0 }, + { 0x2127c0, 0x0 }, + { 0x128c0, 0x0 }, + { 0x1128c0, 0x0 }, + { 0x2128c0, 0x0 }, + { 0x130c0, 0x0 }, + { 0x1130c0, 0x0 }, + { 0x2130c0, 0x0 }, + { 0x131c0, 0x0 }, + { 0x1131c0, 0x0 }, + { 0x2131c0, 0x0 }, + { 0x132c0, 0x0 }, + { 0x1132c0, 0x0 }, + { 0x2132c0, 0x0 }, + { 0x133c0, 0x0 }, + { 0x1133c0, 0x0 }, + { 0x2133c0, 0x0 }, + { 0x134c0, 0x0 }, + { 0x1134c0, 0x0 }, + { 0x2134c0, 0x0 }, + { 0x135c0, 0x0 }, + { 0x1135c0, 0x0 }, + { 0x2135c0, 0x0 }, + { 0x136c0, 0x0 }, + { 0x1136c0, 0x0 }, + { 0x2136c0, 0x0 }, + { 0x137c0, 0x0 }, + { 0x1137c0, 0x0 }, + { 0x2137c0, 0x0 }, + { 0x138c0, 0x0 }, + { 0x1138c0, 0x0 }, + { 0x2138c0, 0x0 }, + { 0x100c1, 0x0 }, + { 0x1100c1, 0x0 }, + { 0x2100c1, 0x0 }, + { 0x101c1, 0x0 }, + { 0x1101c1, 0x0 }, + { 0x2101c1, 0x0 }, + { 0x102c1, 0x0 }, + { 0x1102c1, 0x0 }, + { 0x2102c1, 0x0 }, + { 0x103c1, 0x0 }, + { 0x1103c1, 0x0 }, + { 0x2103c1, 0x0 }, + { 0x104c1, 0x0 }, + { 0x1104c1, 0x0 }, + { 0x2104c1, 0x0 }, + { 0x105c1, 0x0 }, + { 0x1105c1, 0x0 }, + { 0x2105c1, 0x0 }, + { 0x106c1, 0x0 }, + { 0x1106c1, 0x0 }, + { 0x2106c1, 0x0 }, + { 0x107c1, 0x0 }, + { 0x1107c1, 0x0 }, + { 0x2107c1, 0x0 }, + { 0x108c1, 0x0 }, + { 0x1108c1, 0x0 }, + { 0x2108c1, 0x0 }, + { 0x110c1, 0x0 }, + { 0x1110c1, 0x0 }, + { 0x2110c1, 0x0 }, + { 0x111c1, 0x0 }, + { 0x1111c1, 0x0 }, + { 0x2111c1, 0x0 }, + { 0x112c1, 0x0 }, + { 0x1112c1, 0x0 }, + { 0x2112c1, 0x0 }, + { 0x113c1, 0x0 }, + { 0x1113c1, 0x0 }, + { 0x2113c1, 0x0 }, + { 0x114c1, 0x0 }, + { 0x1114c1, 0x0 }, + { 0x2114c1, 0x0 }, + { 0x115c1, 0x0 }, + { 0x1115c1, 0x0 }, + { 0x2115c1, 0x0 }, + { 0x116c1, 0x0 }, + { 0x1116c1, 0x0 }, + { 0x2116c1, 0x0 }, + { 0x117c1, 0x0 }, + { 0x1117c1, 0x0 }, + { 0x2117c1, 0x0 }, + { 0x118c1, 0x0 }, + { 0x1118c1, 0x0 }, + { 0x2118c1, 0x0 }, + { 0x120c1, 0x0 }, + { 0x1120c1, 0x0 }, + { 0x2120c1, 0x0 }, + { 0x121c1, 0x0 }, + { 0x1121c1, 0x0 }, + { 0x2121c1, 0x0 }, + { 0x122c1, 0x0 }, + { 0x1122c1, 0x0 }, + { 0x2122c1, 0x0 }, + { 0x123c1, 0x0 }, + { 0x1123c1, 0x0 }, + { 0x2123c1, 0x0 }, + { 0x124c1, 0x0 }, + { 0x1124c1, 0x0 }, + { 0x2124c1, 0x0 }, + { 0x125c1, 0x0 }, + { 0x1125c1, 0x0 }, + { 0x2125c1, 0x0 }, + { 0x126c1, 0x0 }, + { 0x1126c1, 0x0 }, + { 0x2126c1, 0x0 }, + { 0x127c1, 0x0 }, + { 0x1127c1, 0x0 }, + { 0x2127c1, 0x0 }, + { 0x128c1, 0x0 }, + { 0x1128c1, 0x0 }, + { 0x2128c1, 0x0 }, + { 0x130c1, 0x0 }, + { 0x1130c1, 0x0 }, + { 0x2130c1, 0x0 }, + { 0x131c1, 0x0 }, + { 0x1131c1, 0x0 }, + { 0x2131c1, 0x0 }, + { 0x132c1, 0x0 }, + { 0x1132c1, 0x0 }, + { 0x2132c1, 0x0 }, + { 0x133c1, 0x0 }, + { 0x1133c1, 0x0 }, + { 0x2133c1, 0x0 }, + { 0x134c1, 0x0 }, + { 0x1134c1, 0x0 }, + { 0x2134c1, 0x0 }, + { 0x135c1, 0x0 }, + { 0x1135c1, 0x0 }, + { 0x2135c1, 0x0 }, + { 0x136c1, 0x0 }, + { 0x1136c1, 0x0 }, + { 0x2136c1, 0x0 }, + { 0x137c1, 0x0 }, + { 0x1137c1, 0x0 }, + { 0x2137c1, 0x0 }, + { 0x138c1, 0x0 }, + { 0x1138c1, 0x0 }, + { 0x2138c1, 0x0 }, + { 0x10020, 0x0 }, + { 0x110020, 0x0 }, + { 0x210020, 0x0 }, + { 0x11020, 0x0 }, + { 0x111020, 0x0 }, + { 0x211020, 0x0 }, + { 0x12020, 0x0 }, + { 0x112020, 0x0 }, + { 0x212020, 0x0 }, + { 0x13020, 0x0 }, + { 0x113020, 0x0 }, + { 0x213020, 0x0 }, + { 0x20072, 0x0 }, + { 0x20073, 0x0 }, + { 0x20074, 0x0 }, + { 0x100aa, 0x0 }, + { 0x110aa, 0x0 }, + { 0x120aa, 0x0 }, + { 0x130aa, 0x0 }, + { 0x20010, 0x0 }, + { 0x120010, 0x0 }, + { 0x220010, 0x0 }, + { 0x20011, 0x0 }, + { 0x120011, 0x0 }, + { 0x220011, 0x0 }, + { 0x100ae, 0x0 }, + { 0x1100ae, 0x0 }, + { 0x2100ae, 0x0 }, + { 0x100af, 0x0 }, + { 0x1100af, 0x0 }, + { 0x2100af, 0x0 }, + { 0x110ae, 0x0 }, + { 0x1110ae, 0x0 }, + { 0x2110ae, 0x0 }, + { 0x110af, 0x0 }, + { 0x1110af, 0x0 }, + { 0x2110af, 0x0 }, + { 0x120ae, 0x0 }, + { 0x1120ae, 0x0 }, + { 0x2120ae, 0x0 }, + { 0x120af, 0x0 }, + { 0x1120af, 0x0 }, + { 0x2120af, 0x0 }, + { 0x130ae, 0x0 }, + { 0x1130ae, 0x0 }, + { 0x2130ae, 0x0 }, + { 0x130af, 0x0 }, + { 0x1130af, 0x0 }, + { 0x2130af, 0x0 }, + { 0x20020, 0x0 }, + { 0x120020, 0x0 }, + { 0x220020, 0x0 }, + { 0x100a0, 0x0 }, + { 0x100a1, 0x0 }, + { 0x100a2, 0x0 }, + { 0x100a3, 0x0 }, + { 0x100a4, 0x0 }, + { 0x100a5, 0x0 }, + { 0x100a6, 0x0 }, + { 0x100a7, 0x0 }, + { 0x110a0, 0x0 }, + { 0x110a1, 0x0 }, + { 0x110a2, 0x0 }, + { 0x110a3, 0x0 }, + { 0x110a4, 0x0 }, + { 0x110a5, 0x0 }, + { 0x110a6, 0x0 }, + { 0x110a7, 0x0 }, + { 0x120a0, 0x0 }, + { 0x120a1, 0x0 }, + { 0x120a2, 0x0 }, + { 0x120a3, 0x0 }, + { 0x120a4, 0x0 }, + { 0x120a5, 0x0 }, + { 0x120a6, 0x0 }, + { 0x120a7, 0x0 }, + { 0x130a0, 0x0 }, + { 0x130a1, 0x0 }, + { 0x130a2, 0x0 }, + { 0x130a3, 0x0 }, + { 0x130a4, 0x0 }, + { 0x130a5, 0x0 }, + { 0x130a6, 0x0 }, + { 0x130a7, 0x0 }, + { 0x2007c, 0x0 }, + { 0x12007c, 0x0 }, + { 0x22007c, 0x0 }, + { 0x2007d, 0x0 }, + { 0x12007d, 0x0 }, + { 0x22007d, 0x0 }, + { 0x400fd, 0x0 }, + { 0x400c0, 0x0 }, + { 0x90201, 0x0 }, + { 0x190201, 0x0 }, + { 0x290201, 0x0 }, + { 0x90202, 0x0 }, + { 0x190202, 0x0 }, + { 0x290202, 0x0 }, + { 0x90203, 0x0 }, + { 0x190203, 0x0 }, + { 0x290203, 0x0 }, + { 0x90204, 0x0 }, + { 0x190204, 0x0 }, + { 0x290204, 0x0 }, + { 0x90205, 0x0 }, + { 0x190205, 0x0 }, + { 0x290205, 0x0 }, + { 0x90206, 0x0 }, + { 0x190206, 0x0 }, + { 0x290206, 0x0 }, + { 0x90207, 0x0 }, + { 0x190207, 0x0 }, + { 0x290207, 0x0 }, + { 0x90208, 0x0 }, + { 0x190208, 0x0 }, + { 0x290208, 0x0 }, + { 0x10062, 0x0 }, + { 0x10162, 0x0 }, + { 0x10262, 0x0 }, + { 0x10362, 0x0 }, + { 0x10462, 0x0 }, + { 0x10562, 0x0 }, + { 0x10662, 0x0 }, + { 0x10762, 0x0 }, + { 0x10862, 0x0 }, + { 0x11062, 0x0 }, + { 0x11162, 0x0 }, + { 0x11262, 0x0 }, + { 0x11362, 0x0 }, + { 0x11462, 0x0 }, + { 0x11562, 0x0 }, + { 0x11662, 0x0 }, + { 0x11762, 0x0 }, + { 0x11862, 0x0 }, + { 0x12062, 0x0 }, + { 0x12162, 0x0 }, + { 0x12262, 0x0 }, + { 0x12362, 0x0 }, + { 0x12462, 0x0 }, + { 0x12562, 0x0 }, + { 0x12662, 0x0 }, + { 0x12762, 0x0 }, + { 0x12862, 0x0 }, + { 0x13062, 0x0 }, + { 0x13162, 0x0 }, + { 0x13262, 0x0 }, + { 0x13362, 0x0 }, + { 0x13462, 0x0 }, + { 0x13562, 0x0 }, + { 0x13662, 0x0 }, + { 0x13762, 0x0 }, + { 0x13862, 0x0 }, + { 0x20077, 0x0 }, + { 0x10001, 0x0 }, + { 0x11001, 0x0 }, + { 0x12001, 0x0 }, + { 0x13001, 0x0 }, + { 0x10040, 0x0 }, + { 0x10140, 0x0 }, + { 0x10240, 0x0 }, + { 0x10340, 0x0 }, + { 0x10440, 0x0 }, + { 0x10540, 0x0 }, + { 0x10640, 0x0 }, + { 0x10740, 0x0 }, + { 0x10840, 0x0 }, + { 0x10030, 0x0 }, + { 0x10130, 0x0 }, + { 0x10230, 0x0 }, + { 0x10330, 0x0 }, + { 0x10430, 0x0 }, + { 0x10530, 0x0 }, + { 0x10630, 0x0 }, + { 0x10730, 0x0 }, + { 0x10830, 0x0 }, + { 0x11040, 0x0 }, + { 0x11140, 0x0 }, + { 0x11240, 0x0 }, + { 0x11340, 0x0 }, + { 0x11440, 0x0 }, + { 0x11540, 0x0 }, + { 0x11640, 0x0 }, + { 0x11740, 0x0 }, + { 0x11840, 0x0 }, + { 0x11030, 0x0 }, + { 0x11130, 0x0 }, + { 0x11230, 0x0 }, + { 0x11330, 0x0 }, + { 0x11430, 0x0 }, + { 0x11530, 0x0 }, + { 0x11630, 0x0 }, + { 0x11730, 0x0 }, + { 0x11830, 0x0 }, + { 0x12040, 0x0 }, + { 0x12140, 0x0 }, + { 0x12240, 0x0 }, + { 0x12340, 0x0 }, + { 0x12440, 0x0 }, + { 0x12540, 0x0 }, + { 0x12640, 0x0 }, + { 0x12740, 0x0 }, + { 0x12840, 0x0 }, + { 0x12030, 0x0 }, + { 0x12130, 0x0 }, + { 0x12230, 0x0 }, + { 0x12330, 0x0 }, + { 0x12430, 0x0 }, + { 0x12530, 0x0 }, + { 0x12630, 0x0 }, + { 0x12730, 0x0 }, + { 0x12830, 0x0 }, + { 0x13040, 0x0 }, + { 0x13140, 0x0 }, + { 0x13240, 0x0 }, + { 0x13340, 0x0 }, + { 0x13440, 0x0 }, + { 0x13540, 0x0 }, + { 0x13640, 0x0 }, + { 0x13740, 0x0 }, + { 0x13840, 0x0 }, + { 0x13030, 0x0 }, + { 0x13130, 0x0 }, + { 0x13230, 0x0 }, + { 0x13330, 0x0 }, + { 0x13430, 0x0 }, + { 0x13530, 0x0 }, + { 0x13630, 0x0 }, + { 0x13730, 0x0 }, + { 0x13830, 0x0 }, +}; + +/* P0 message block paremeter for training firmware */ +static struct dram_cfg_param lpddr4_fsp0_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x0 }, + { 0x54003, 0xbb8 }, // 3000 + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x131f }, + { 0x54009, 0xc8 }, // LPDDR4_HDT_CTL_3200_1D + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x2dd4 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0xd400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0xd400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param lpddr4_fsp1_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x101 }, + { 0x54003, 0x190 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },/* PHY Ron/Rtt */ + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x84 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x84 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0x8400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0x8400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P1 message block paremeter for training firmware */ +static struct dram_cfg_param lpddr4_fsp2_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x102 }, + { 0x54003, 0x64 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x121f }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x0 }, + { 0x54010, 0x0 }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x84 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x84 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0x8400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0x8400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x3100 & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* P0 2D message block paremeter for training firmware */ +static struct dram_cfg_param lpddr4_fsp0_2d_cfg[] = { + { 0xd0000, 0x0 }, + { 0x54000, 0x0 }, + { 0x54001, 0x0 }, + { 0x54002, 0x0 }, + { 0x54003, 0xbb8 }, + { 0x54004, 0x2 }, + { 0x54005, ((LPDDR4_PHY_RON << 8) | LPDDR4_PHY_RTT) },//PHY Ron/Rtt + { 0x54006, LPDDR4_PHY_VREF_VALUE }, + { 0x54007, 0x0 }, + { 0x54008, 0x61 }, + { 0x54009, 0xc8 }, + { 0x5400a, 0x0 }, + { 0x5400b, 0x2 }, + { 0x5400c, 0x0 }, + { 0x5400d, 0x0 }, + { 0x5400e, 0x0 }, + { 0x5400f, 0x100 }, + { 0x54010, 0x1f7f }, + { 0x54011, 0x0 }, + { 0x54012, (LPDDR4_CS << 8) | (0x110 & 0xff) }, + { 0x54013, 0x0 }, + { 0x54014, 0x0 }, + { 0x54015, 0x0 }, + { 0x54016, 0x0 }, + { 0x54017, 0x0 }, + { 0x54018, 0x0 }, + { 0x54019, 0x2dd4 }, + { 0x5401a, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x5401b, 0x4d66 }, + { 0x5401c, 0x4d08 }, + { 0x5401d, 0x0 }, + { 0x5401e, LPDDR4_MR22_RANK0/*0x16*/ }, + { 0x5401f, 0x2dd4 }, + { 0x54020, (0x31 & 0xff00) | LPDDR4_MR3 }, + { 0x54021, 0x4d66 }, + { 0x54022, 0x4d08 }, + { 0x54023, 0x0 }, + { 0x54024, LPDDR4_MR22_RANK1/*0x16*/ }, + { 0x54025, 0x0 }, + { 0x54026, 0x0 }, + { 0x54027, 0x0 }, + { 0x54028, 0x0 }, + { 0x54029, 0x0 }, + { 0x5402a, 0x0 }, + { 0x5402b, 0x1000 }, + { 0x5402c, LPDDR4_CS }, + { 0x5402d, 0x0 }, + { 0x5402e, 0x0 }, + { 0x5402f, 0x0 }, + { 0x54030, 0x0 }, + { 0x54031, 0x0 }, + { 0x54032, 0xd400 }, + { 0x54033, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x54034, 0x6600 }, + { 0x54035, 0x84d }, + { 0x54036, 0x4d }, + { 0x54037, (LPDDR4_MR22_RANK0 << 8)/*0x1600*/ }, + { 0x54038, 0xd400 }, + { 0x54039, (LPDDR4_MR3 << 8) | (0x312d & 0xff) }, + { 0x5403a, 0x6600 }, + { 0x5403b, 0x84d }, + { 0x5403c, 0x4d }, + { 0x5403d, (LPDDR4_MR22_RANK1 << 8)/*0x1600*/ }, + { 0x5403e, 0x0 }, + { 0x5403f, 0x0 }, + { 0x54040, 0x0 }, + { 0x54041, 0x0 }, + { 0x54042, 0x0 }, + { 0x54043, 0x0 }, + { 0x54044, 0x0 }, + { 0xd0000, 0x1 }, +}; + +/* DRAM PHY init engine image */ +static struct dram_cfg_param lpddr4_phy_pie[] = { + { 0xd0000, 0x0 }, + { 0x90000, 0x10 }, + { 0x90001, 0x400 }, + { 0x90002, 0x10e }, + { 0x90003, 0x0 }, + { 0x90004, 0x0 }, + { 0x90005, 0x8 }, + { 0x90029, 0xb }, + { 0x9002a, 0x480 }, + { 0x9002b, 0x109 }, + { 0x9002c, 0x8 }, + { 0x9002d, 0x448 }, + { 0x9002e, 0x139 }, + { 0x9002f, 0x8 }, + { 0x90030, 0x478 }, + { 0x90031, 0x109 }, + { 0x90032, 0x0 }, + { 0x90033, 0xe8 }, + { 0x90034, 0x109 }, + { 0x90035, 0x2 }, + { 0x90036, 0x10 }, + { 0x90037, 0x139 }, + { 0x90038, 0xf }, + { 0x90039, 0x7c0 }, + { 0x9003a, 0x139 }, + { 0x9003b, 0x44 }, + { 0x9003c, 0x630 }, + { 0x9003d, 0x159 }, + { 0x9003e, 0x14f }, + { 0x9003f, 0x630 }, + { 0x90040, 0x159 }, + { 0x90041, 0x47 }, + { 0x90042, 0x630 }, + { 0x90043, 0x149 }, + { 0x90044, 0x4f }, + { 0x90045, 0x630 }, + { 0x90046, 0x179 }, + { 0x90047, 0x8 }, + { 0x90048, 0xe0 }, + { 0x90049, 0x109 }, + { 0x9004a, 0x0 }, + { 0x9004b, 0x7c8 }, + { 0x9004c, 0x109 }, + { 0x9004d, 0x0 }, + { 0x9004e, 0x1 }, + { 0x9004f, 0x8 }, + { 0x90050, 0x0 }, + { 0x90051, 0x45a }, + { 0x90052, 0x9 }, + { 0x90053, 0x0 }, + { 0x90054, 0x448 }, + { 0x90055, 0x109 }, + { 0x90056, 0x40 }, + { 0x90057, 0x630 }, + { 0x90058, 0x179 }, + { 0x90059, 0x1 }, + { 0x9005a, 0x618 }, + { 0x9005b, 0x109 }, + { 0x9005c, 0x40c0 }, + { 0x9005d, 0x630 }, + { 0x9005e, 0x149 }, + { 0x9005f, 0x8 }, + { 0x90060, 0x4 }, + { 0x90061, 0x48 }, + { 0x90062, 0x4040 }, + { 0x90063, 0x630 }, + { 0x90064, 0x149 }, + { 0x90065, 0x0 }, + { 0x90066, 0x4 }, + { 0x90067, 0x48 }, + { 0x90068, 0x40 }, + { 0x90069, 0x630 }, + { 0x9006a, 0x149 }, + { 0x9006b, 0x10 }, + { 0x9006c, 0x4 }, + { 0x9006d, 0x18 }, + { 0x9006e, 0x0 }, + { 0x9006f, 0x4 }, + { 0x90070, 0x78 }, + { 0x90071, 0x549 }, + { 0x90072, 0x630 }, + { 0x90073, 0x159 }, + { 0x90074, 0xd49 }, + { 0x90075, 0x630 }, + { 0x90076, 0x159 }, + { 0x90077, 0x94a }, + { 0x90078, 0x630 }, + { 0x90079, 0x159 }, + { 0x9007a, 0x441 }, + { 0x9007b, 0x630 }, + { 0x9007c, 0x149 }, + { 0x9007d, 0x42 }, + { 0x9007e, 0x630 }, + { 0x9007f, 0x149 }, + { 0x90080, 0x1 }, + { 0x90081, 0x630 }, + { 0x90082, 0x149 }, + { 0x90083, 0x0 }, + { 0x90084, 0xe0 }, + { 0x90085, 0x109 }, + { 0x90086, 0xa }, + { 0x90087, 0x10 }, + { 0x90088, 0x109 }, + { 0x90089, 0x9 }, + { 0x9008a, 0x3c0 }, + { 0x9008b, 0x149 }, + { 0x9008c, 0x9 }, + { 0x9008d, 0x3c0 }, + { 0x9008e, 0x159 }, + { 0x9008f, 0x18 }, + { 0x90090, 0x10 }, + { 0x90091, 0x109 }, + { 0x90092, 0x0 }, + { 0x90093, 0x3c0 }, + { 0x90094, 0x109 }, + { 0x90095, 0x18 }, + { 0x90096, 0x4 }, + { 0x90097, 0x48 }, + { 0x90098, 0x18 }, + { 0x90099, 0x4 }, + { 0x9009a, 0x58 }, + { 0x9009b, 0xa }, + { 0x9009c, 0x10 }, + { 0x9009d, 0x109 }, + { 0x9009e, 0x2 }, + { 0x9009f, 0x10 }, + { 0x900a0, 0x109 }, + { 0x900a1, 0x5 }, + { 0x900a2, 0x7c0 }, + { 0x900a3, 0x109 }, + { 0x900a4, 0x10 }, + { 0x900a5, 0x10 }, + { 0x900a6, 0x109 }, + { 0x40000, 0x811 }, + { 0x40020, 0x880 }, + { 0x40040, 0x0 }, + { 0x40060, 0x0 }, + { 0x40001, 0x4008 }, + { 0x40021, 0x83 }, + { 0x40041, 0x4f }, + { 0x40061, 0x0 }, + { 0x40002, 0x4040 }, + { 0x40022, 0x83 }, + { 0x40042, 0x51 }, + { 0x40062, 0x0 }, + { 0x40003, 0x811 }, + { 0x40023, 0x880 }, + { 0x40043, 0x0 }, + { 0x40063, 0x0 }, + { 0x40004, 0x720 }, + { 0x40024, 0xf }, + { 0x40044, 0x1740 }, + { 0x40064, 0x0 }, + { 0x40005, 0x16 }, + { 0x40025, 0x83 }, + { 0x40045, 0x4b }, + { 0x40065, 0x0 }, + { 0x40006, 0x716 }, + { 0x40026, 0xf }, + { 0x40046, 0x2001 }, + { 0x40066, 0x0 }, + { 0x40007, 0x716 }, + { 0x40027, 0xf }, + { 0x40047, 0x2800 }, + { 0x40067, 0x0 }, + { 0x40008, 0x716 }, + { 0x40028, 0xf }, + { 0x40048, 0xf00 }, + { 0x40068, 0x0 }, + { 0x40009, 0x720 }, + { 0x40029, 0xf }, + { 0x40049, 0x1400 }, + { 0x40069, 0x0 }, + { 0x4000a, 0xe08 }, + { 0x4002a, 0xc15 }, + { 0x4004a, 0x0 }, + { 0x4006a, 0x0 }, + { 0x4000b, 0x623 }, + { 0x4002b, 0x15 }, + { 0x4004b, 0x0 }, + { 0x4006b, 0x0 }, + { 0x4000c, 0x4028 }, + { 0x4002c, 0x80 }, + { 0x4004c, 0x0 }, + { 0x4006c, 0x0 }, + { 0x4000d, 0xe08 }, + { 0x4002d, 0xc1a }, + { 0x4004d, 0x0 }, + { 0x4006d, 0x0 }, + { 0x4000e, 0x623 }, + { 0x4002e, 0x1a }, + { 0x4004e, 0x0 }, + { 0x4006e, 0x0 }, + { 0x4000f, 0x4040 }, + { 0x4002f, 0x80 }, + { 0x4004f, 0x0 }, + { 0x4006f, 0x0 }, + { 0x40010, 0x2604 }, + { 0x40030, 0x15 }, + { 0x40050, 0x0 }, + { 0x40070, 0x0 }, + { 0x40011, 0x708 }, + { 0x40031, 0x5 }, + { 0x40051, 0x0 }, + { 0x40071, 0x2002 }, + { 0x40012, 0x8 }, + { 0x40032, 0x80 }, + { 0x40052, 0x0 }, + { 0x40072, 0x0 }, + { 0x40013, 0x2604 }, + { 0x40033, 0x1a }, + { 0x40053, 0x0 }, + { 0x40073, 0x0 }, + { 0x40014, 0x708 }, + { 0x40034, 0xa }, + { 0x40054, 0x0 }, + { 0x40074, 0x2002 }, + { 0x40015, 0x4040 }, + { 0x40035, 0x80 }, + { 0x40055, 0x0 }, + { 0x40075, 0x0 }, + { 0x40016, 0x60a }, + { 0x40036, 0x15 }, + { 0x40056, 0x1200 }, + { 0x40076, 0x0 }, + { 0x40017, 0x61a }, + { 0x40037, 0x15 }, + { 0x40057, 0x1300 }, + { 0x40077, 0x0 }, + { 0x40018, 0x60a }, + { 0x40038, 0x1a }, + { 0x40058, 0x1200 }, + { 0x40078, 0x0 }, + { 0x40019, 0x642 }, + { 0x40039, 0x1a }, + { 0x40059, 0x1300 }, + { 0x40079, 0x0 }, + { 0x4001a, 0x4808 }, + { 0x4003a, 0x880 }, + { 0x4005a, 0x0 }, + { 0x4007a, 0x0 }, + { 0x900a7, 0x0 }, + { 0x900a8, 0x790 }, + { 0x900a9, 0x11a }, + { 0x900aa, 0x8 }, + { 0x900ab, 0x7aa }, + { 0x900ac, 0x2a }, + { 0x900ad, 0x10 }, + { 0x900ae, 0x7b2 }, + { 0x900af, 0x2a }, + { 0x900b0, 0x0 }, + { 0x900b1, 0x7c8 }, + { 0x900b2, 0x109 }, + { 0x900b3, 0x10 }, + { 0x900b4, 0x2a8 }, + { 0x900b5, 0x129 }, + { 0x900b6, 0x8 }, + { 0x900b7, 0x370 }, + { 0x900b8, 0x129 }, + { 0x900b9, 0xa }, + { 0x900ba, 0x3c8 }, + { 0x900bb, 0x1a9 }, + { 0x900bc, 0xc }, + { 0x900bd, 0x408 }, + { 0x900be, 0x199 }, + { 0x900bf, 0x14 }, + { 0x900c0, 0x790 }, + { 0x900c1, 0x11a }, + { 0x900c2, 0x8 }, + { 0x900c3, 0x4 }, + { 0x900c4, 0x18 }, + { 0x900c5, 0xe }, + { 0x900c6, 0x408 }, + { 0x900c7, 0x199 }, + { 0x900c8, 0x8 }, + { 0x900c9, 0x8568 }, + { 0x900ca, 0x108 }, + { 0x900cb, 0x18 }, + { 0x900cc, 0x790 }, + { 0x900cd, 0x16a }, + { 0x900ce, 0x8 }, + { 0x900cf, 0x1d8 }, + { 0x900d0, 0x169 }, + { 0x900d1, 0x10 }, + { 0x900d2, 0x8558 }, + { 0x900d3, 0x168 }, + { 0x900d4, 0x70 }, + { 0x900d5, 0x788 }, + { 0x900d6, 0x16a }, + { 0x900d7, 0x1ff8 }, + { 0x900d8, 0x85a8 }, + { 0x900d9, 0x1e8 }, + { 0x900da, 0x50 }, + { 0x900db, 0x798 }, + { 0x900dc, 0x16a }, + { 0x900dd, 0x60 }, + { 0x900de, 0x7a0 }, + { 0x900df, 0x16a }, + { 0x900e0, 0x8 }, + { 0x900e1, 0x8310 }, + { 0x900e2, 0x168 }, + { 0x900e3, 0x8 }, + { 0x900e4, 0xa310 }, + { 0x900e5, 0x168 }, + { 0x900e6, 0xa }, + { 0x900e7, 0x408 }, + { 0x900e8, 0x169 }, + { 0x900e9, 0x6e }, + { 0x900ea, 0x0 }, + { 0x900eb, 0x68 }, + { 0x900ec, 0x0 }, + { 0x900ed, 0x408 }, + { 0x900ee, 0x169 }, + { 0x900ef, 0x0 }, + { 0x900f0, 0x8310 }, + { 0x900f1, 0x168 }, + { 0x900f2, 0x0 }, + { 0x900f3, 0xa310 }, + { 0x900f4, 0x168 }, + { 0x900f5, 0x1ff8 }, + { 0x900f6, 0x85a8 }, + { 0x900f7, 0x1e8 }, + { 0x900f8, 0x68 }, + { 0x900f9, 0x798 }, + { 0x900fa, 0x16a }, + { 0x900fb, 0x78 }, + { 0x900fc, 0x7a0 }, + { 0x900fd, 0x16a }, + { 0x900fe, 0x68 }, + { 0x900ff, 0x790 }, + { 0x90100, 0x16a }, + { 0x90101, 0x8 }, + { 0x90102, 0x8b10 }, + { 0x90103, 0x168 }, + { 0x90104, 0x8 }, + { 0x90105, 0xab10 }, + { 0x90106, 0x168 }, + { 0x90107, 0xa }, + { 0x90108, 0x408 }, + { 0x90109, 0x169 }, + { 0x9010a, 0x58 }, + { 0x9010b, 0x0 }, + { 0x9010c, 0x68 }, + { 0x9010d, 0x0 }, + { 0x9010e, 0x408 }, + { 0x9010f, 0x169 }, + { 0x90110, 0x0 }, + { 0x90111, 0x8b10 }, + { 0x90112, 0x168 }, + { 0x90113, 0x0 }, + { 0x90114, 0xab10 }, + { 0x90115, 0x168 }, + { 0x90116, 0x0 }, + { 0x90117, 0x1d8 }, + { 0x90118, 0x169 }, + { 0x90119, 0x80 }, + { 0x9011a, 0x790 }, + { 0x9011b, 0x16a }, + { 0x9011c, 0x18 }, + { 0x9011d, 0x7aa }, + { 0x9011e, 0x6a }, + { 0x9011f, 0xa }, + { 0x90120, 0x0 }, + { 0x90121, 0x1e9 }, + { 0x90122, 0x8 }, + { 0x90123, 0x8080 }, + { 0x90124, 0x108 }, + { 0x90125, 0xf }, + { 0x90126, 0x408 }, + { 0x90127, 0x169 }, + { 0x90128, 0xc }, + { 0x90129, 0x0 }, + { 0x9012a, 0x68 }, + { 0x9012b, 0x9 }, + { 0x9012c, 0x0 }, + { 0x9012d, 0x1a9 }, + { 0x9012e, 0x0 }, + { 0x9012f, 0x408 }, + { 0x90130, 0x169 }, + { 0x90131, 0x0 }, + { 0x90132, 0x8080 }, + { 0x90133, 0x108 }, + { 0x90134, 0x8 }, + { 0x90135, 0x7aa }, + { 0x90136, 0x6a }, + { 0x90137, 0x0 }, + { 0x90138, 0x8568 }, + { 0x90139, 0x108 }, + { 0x9013a, 0xb7 }, + { 0x9013b, 0x790 }, + { 0x9013c, 0x16a }, + { 0x9013d, 0x1f }, + { 0x9013e, 0x0 }, + { 0x9013f, 0x68 }, + { 0x90140, 0x8 }, + { 0x90141, 0x8558 }, + { 0x90142, 0x168 }, + { 0x90143, 0xf }, + { 0x90144, 0x408 }, + { 0x90145, 0x169 }, + { 0x90146, 0xc }, + { 0x90147, 0x0 }, + { 0x90148, 0x68 }, + { 0x90149, 0x0 }, + { 0x9014a, 0x408 }, + { 0x9014b, 0x169 }, + { 0x9014c, 0x0 }, + { 0x9014d, 0x8558 }, + { 0x9014e, 0x168 }, + { 0x9014f, 0x8 }, + { 0x90150, 0x3c8 }, + { 0x90151, 0x1a9 }, + { 0x90152, 0x3 }, + { 0x90153, 0x370 }, + { 0x90154, 0x129 }, + { 0x90155, 0x20 }, + { 0x90156, 0x2aa }, + { 0x90157, 0x9 }, + { 0x90158, 0x0 }, + { 0x90159, 0x400 }, + { 0x9015a, 0x10e }, + { 0x9015b, 0x8 }, + { 0x9015c, 0xe8 }, + { 0x9015d, 0x109 }, + { 0x9015e, 0x0 }, + { 0x9015f, 0x8140 }, + { 0x90160, 0x10c }, + { 0x90161, 0x10 }, + { 0x90162, 0x8138 }, + { 0x90163, 0x10c }, + { 0x90164, 0x8 }, + { 0x90165, 0x7c8 }, + { 0x90166, 0x101 }, + { 0x90167, 0x8 }, + { 0x90168, 0x0 }, + { 0x90169, 0x8 }, + { 0x9016a, 0x8 }, + { 0x9016b, 0x448 }, + { 0x9016c, 0x109 }, + { 0x9016d, 0xf }, + { 0x9016e, 0x7c0 }, + { 0x9016f, 0x109 }, + { 0x90170, 0x0 }, + { 0x90171, 0xe8 }, + { 0x90172, 0x109 }, + { 0x90173, 0x47 }, + { 0x90174, 0x630 }, + { 0x90175, 0x109 }, + { 0x90176, 0x8 }, + { 0x90177, 0x618 }, + { 0x90178, 0x109 }, + { 0x90179, 0x8 }, + { 0x9017a, 0xe0 }, + { 0x9017b, 0x109 }, + { 0x9017c, 0x0 }, + { 0x9017d, 0x7c8 }, + { 0x9017e, 0x109 }, + { 0x9017f, 0x8 }, + { 0x90180, 0x8140 }, + { 0x90181, 0x10c }, + { 0x90182, 0x0 }, + { 0x90183, 0x1 }, + { 0x90184, 0x8 }, + { 0x90185, 0x8 }, + { 0x90186, 0x4 }, + { 0x90187, 0x8 }, + { 0x90188, 0x8 }, + { 0x90189, 0x7c8 }, + { 0x9018a, 0x101 }, + { 0x90006, 0x0 }, + { 0x90007, 0x0 }, + { 0x90008, 0x8 }, + { 0x90009, 0x0 }, + { 0x9000a, 0x0 }, + { 0x9000b, 0x0 }, + { 0xd00e7, 0x400 }, + { 0x90017, 0x0 }, + { 0x9001f, 0x2a }, + { 0x90026, 0x6a }, + { 0x400d0, 0x0 }, + { 0x400d1, 0x101 }, + { 0x400d2, 0x105 }, + { 0x400d3, 0x107 }, + { 0x400d4, 0x10f }, + { 0x400d5, 0x202 }, + { 0x400d6, 0x20a }, + { 0x400d7, 0x20b }, + { 0x2003a, 0x2 }, + { 0x2000b, 0x5d }, + { 0x2000c, 0xbb }, + { 0x2000d, 0x753 }, + { 0x2000e, 0x2c }, + { 0x12000b, 0xc }, + { 0x12000c, 0x19 }, + { 0x12000d, 0xfa }, + { 0x12000e, 0x10 }, + { 0x22000b, 0x3 }, + { 0x22000c, 0x6 }, + { 0x22000d, 0x3e }, + { 0x22000e, 0x10 }, + { 0x9000c, 0x0 }, + { 0x9000d, 0x173 }, + { 0x9000e, 0x60 }, + { 0x9000f, 0x6110 }, + { 0x90010, 0x2152 }, + { 0x90011, 0xdfbd }, + { 0x90012, 0x60 }, + { 0x90013, 0x6152 }, + { 0x20010, 0x5a }, + { 0x20011, 0x3 }, + { 0x40080, 0xe0 }, + { 0x40081, 0x12 }, + { 0x40082, 0xe0 }, + { 0x40083, 0x12 }, + { 0x40084, 0xe0 }, + { 0x40085, 0x12 }, + { 0x140080, 0xe0 }, + { 0x140081, 0x12 }, + { 0x140082, 0xe0 }, + { 0x140083, 0x12 }, + { 0x140084, 0xe0 }, + { 0x140085, 0x12 }, + { 0x240080, 0xe0 }, + { 0x240081, 0x12 }, + { 0x240082, 0xe0 }, + { 0x240083, 0x12 }, + { 0x240084, 0xe0 }, + { 0x240085, 0x12 }, + { 0x400fd, 0xf }, + { 0x10011, 0x1 }, + { 0x10012, 0x1 }, + { 0x10013, 0x180 }, + { 0x10018, 0x1 }, + { 0x10002, 0x6209 }, + { 0x100b2, 0x1 }, + { 0x101b4, 0x1 }, + { 0x102b4, 0x1 }, + { 0x103b4, 0x1 }, + { 0x104b4, 0x1 }, + { 0x105b4, 0x1 }, + { 0x106b4, 0x1 }, + { 0x107b4, 0x1 }, + { 0x108b4, 0x1 }, + { 0x11011, 0x1 }, + { 0x11012, 0x1 }, + { 0x11013, 0x180 }, + { 0x11018, 0x1 }, + { 0x11002, 0x6209 }, + { 0x110b2, 0x1 }, + { 0x111b4, 0x1 }, + { 0x112b4, 0x1 }, + { 0x113b4, 0x1 }, + { 0x114b4, 0x1 }, + { 0x115b4, 0x1 }, + { 0x116b4, 0x1 }, + { 0x117b4, 0x1 }, + { 0x118b4, 0x1 }, + { 0x12011, 0x1 }, + { 0x12012, 0x1 }, + { 0x12013, 0x180 }, + { 0x12018, 0x1 }, + { 0x12002, 0x6209 }, + { 0x120b2, 0x1 }, + { 0x121b4, 0x1 }, + { 0x122b4, 0x1 }, + { 0x123b4, 0x1 }, + { 0x124b4, 0x1 }, + { 0x125b4, 0x1 }, + { 0x126b4, 0x1 }, + { 0x127b4, 0x1 }, + { 0x128b4, 0x1 }, + { 0x13011, 0x1 }, + { 0x13012, 0x1 }, + { 0x13013, 0x180 }, + { 0x13018, 0x1 }, + { 0x13002, 0x6209 }, + { 0x130b2, 0x1 }, + { 0x131b4, 0x1 }, + { 0x132b4, 0x1 }, + { 0x133b4, 0x1 }, + { 0x134b4, 0x1 }, + { 0x135b4, 0x1 }, + { 0x136b4, 0x1 }, + { 0x137b4, 0x1 }, + { 0x138b4, 0x1 }, + { 0x2003a, 0x2 }, + { 0xc0080, 0x2 }, + { 0xd0000, 0x1 }, +}; + +static struct dram_fsp_msg lpddr4_dram_fsp_msg[] = { + { + /* P0 3000mts 1D */ + .drate = 3000, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp0_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_cfg), + }, { + /* P1 100mts 1D */ + .drate = 100, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp2_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp2_cfg), + }, { + /* P1 400mts 1D */ + .drate = 400, + .fw_type = FW_1D_IMAGE, + .fsp_cfg = lpddr4_fsp1_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp1_cfg), + }, { + /* P0 3000mts 2D */ + .drate = 3000, + .fw_type = FW_2D_IMAGE, + .fsp_cfg = lpddr4_fsp0_2d_cfg, + .fsp_cfg_num = ARRAY_SIZE(lpddr4_fsp0_2d_cfg), + }, +}; + +/* lpddr4 timing config params on EVK board */ +struct dram_timing_info prt8mm_dram_timing = { + .ddrc_cfg = lpddr4_ddrc_cfg, + .ddrc_cfg_num = ARRAY_SIZE(lpddr4_ddrc_cfg), + .ddrphy_cfg = lpddr4_ddrphy_cfg, + .ddrphy_cfg_num = ARRAY_SIZE(lpddr4_ddrphy_cfg), + .fsp_msg = lpddr4_dram_fsp_msg, + .fsp_msg_num = ARRAY_SIZE(lpddr4_dram_fsp_msg), + .ddrphy_trained_csr = lpddr4_ddrphy_trained_csr, + .ddrphy_trained_csr_num = ARRAY_SIZE(lpddr4_ddrphy_trained_csr), + .ddrphy_pie = lpddr4_phy_pie, + .ddrphy_pie_num = ARRAY_SIZE(lpddr4_phy_pie), +}; diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 795087f41b..d8799aaa72 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -92,6 +92,7 @@ lwl-$(CONFIG_MACH_PROTONIC_IMX6) += \ imx6qp-prtwd3.dtb.o \ imx6qp-vicutp.dtb.o \ imx6ul-prti6g.dtb.o +lwl-$(CONFIG_MACH_PROTONIC_IMX8M) += imx8mm-prt8mm.dtb.o lwl-$(CONFIG_MACH_RADXA_ROCK) += rk3188-radxarock.dtb.o lwl-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += rk3288-phycore-som.dtb.o lwl-$(CONFIG_MACH_REALQ7) += imx6q-dmo-edmqmx6.dtb.o diff --git a/arch/arm/dts/imx8mm-prt8mm.dts b/arch/arm/dts/imx8mm-prt8mm.dts new file mode 100644 index 0000000000..bdcdd08062 --- /dev/null +++ b/arch/arm/dts/imx8mm-prt8mm.dts @@ -0,0 +1,251 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +/* + * Copyright 2020 Protonic Holland + * Copyright 2019 NXP + */ + +/dts-v1/; + +#include + +/ { + model = "Protonic PRT8MM"; + compatible = "prt,prt8mm", "fsl,imx8mm"; + + chosen { + stdout-path = &uart4; + + environment-sd { + compatible = "barebox,environment"; + device-path = &part_env_sd; + status = "disabled"; + }; + environment-emmc { + compatible = "barebox,environment"; + device-path = &part_env_emmc; + status = "disabled"; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + status = "okay"; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; +}; + +&i2c3 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "okay"; +}; + +&usbotg1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usbotg1>; + dr_mode = "host"; + power-active-high; + over-current-active-low; + status = "okay"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MM_CLK_USDHC2>; + assigned-clock-rates = <100000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + bus-width = <4>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + part_env_sd: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; +}; + +&usdhc3 { + assigned-clocks = <&clk IMX8MM_CLK_USDHC3_ROOT>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + no-sdio; + no-sd; + status = "okay"; + + #address-cells = <1>; + #size-cells = <1>; + + part_env_emmc: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MM_IOMUXC_I2C1_SCL_I2C1_SCL 0x400000c3 + MX8MM_IOMUXC_I2C1_SDA_I2C1_SDA 0x400000c3 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400000c3 + MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400000c3 + >; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = < + MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL 0x400000c3 + MX8MM_IOMUXC_I2C3_SDA_I2C3_SDA 0x400000c3 + >; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = < + MX8MM_IOMUXC_UART4_RXD_UART4_DCE_RX 0x040 + MX8MM_IOMUXC_UART4_TXD_UART4_DCE_TX 0x040 + >; + }; + + pinctrl_usdhc2_gpio: usdhc2grpgpio { + fsl,pins = < + MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x0d4 + >; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 + >; + }; + + pinctrl_usdhc2_100mhz: usdhc2grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 + >; + }; + + pinctrl_usdhc2_200mhz: usdhc2grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 + MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 + MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 + MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 + MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 + MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x190 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d0 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d0 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d0 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d0 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d0 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d0 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d0 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d0 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d0 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x190 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x194 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d4 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d4 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d4 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d4 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d4 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d4 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d4 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d4 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d4 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { + fsl,pins = < + MX8MM_IOMUXC_NAND_WE_B_USDHC3_CLK 0x196 + MX8MM_IOMUXC_NAND_WP_B_USDHC3_CMD 0x1d6 + MX8MM_IOMUXC_NAND_DATA04_USDHC3_DATA0 0x1d6 + MX8MM_IOMUXC_NAND_DATA05_USDHC3_DATA1 0x1d6 + MX8MM_IOMUXC_NAND_DATA06_USDHC3_DATA2 0x1d6 + MX8MM_IOMUXC_NAND_DATA07_USDHC3_DATA3 0x1d6 + MX8MM_IOMUXC_NAND_RE_B_USDHC3_DATA4 0x1d6 + MX8MM_IOMUXC_NAND_CE2_B_USDHC3_DATA5 0x1d6 + MX8MM_IOMUXC_NAND_CE3_B_USDHC3_DATA6 0x1d6 + MX8MM_IOMUXC_NAND_CLE_USDHC3_DATA7 0x1d6 + MX8MM_IOMUXC_NAND_CE1_B_USDHC3_STROBE 0x196 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0xc6 + >; + }; + + pinctrl_usbotg1: usbotg1grp { + fsl,pins = < + MX8MM_IOMUXC_GPIO1_IO12_USB1_OTG_PWR 0x000 + MX8MM_IOMUXC_GPIO1_IO13_USB1_OTG_OC 0x000 + >; + }; +}; diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 5f5b762ce5..fa373f9a7c 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -345,6 +345,16 @@ config MACH_PROTONIC_IMX6 select ARCH_IMX6UL select ARM_USE_COMPRESSED_DTB +config MACH_PROTONIC_IMX8M + bool "Protonic-Holland i.MX8Mx based boards" + select ARCH_IMX8MM + select FIRMWARE_IMX_LPDDR4_PMU_TRAIN + select FIRMWARE_IMX8MM_ATF + select ARM_SMCCC + select MCI_IMX_ESDHC_PBL + select IMX8M_DRAM + select USB_GADGET_DRIVER_ARC_PBL + config MACH_KONTRON_SAMX6I bool "Kontron sAMX6i" select ARCH_IMX6 diff --git a/images/Makefile.imx b/images/Makefile.imx index 0ee12786b5..dd927aba55 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -420,6 +420,11 @@ CFG_start_nxp_imx8mm_evk.pblb.imximg = $(board)/nxp-imx8mm-evk/flash-header-imx8 FILE_barebox-nxp-imx8mm-evk.img = start_nxp_imx8mm_evk.pblb.pimximg image-$(CONFIG_MACH_NXP_IMX8MM_EVK) += barebox-nxp-imx8mm-evk.img +pblb-$(CONFIG_MACH_PROTONIC_IMX8M) += start_prt_prt8mm +CFG_start_prt_prt8mm.pblb.imximg = $(board)/protonic-imx8m/flash-header-prt8mm.imxcfg +FILE_barebox-prt-prt8mm.img = start_prt_prt8mm.pblb.pimximg +image-$(CONFIG_MACH_PROTONIC_IMX8M) += barebox-prt-prt8mm.img + # ----------------------- i.MX8mp based boards -------------------------- pblb-$(CONFIG_MACH_NXP_IMX8MP_EVK) += start_nxp_imx8mp_evk CFG_start_nxp_imx8mp_evk.pblb.imximg = $(board)/nxp-imx8mp-evk/flash-header-imx8mp-evk.imxcfg -- cgit v1.2.3 From 20e6d94ed3eef078726d8452b623b5cdb98f247b Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Fri, 28 May 2021 15:30:40 +0200 Subject: ARM: imx_v8_defconfig: enable PRT8MM board Signed-off-by: Lucas Stach Link: https://lore.barebox.org/20210528133041.1109923-3-l.stach@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/configs/imx_v8_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/configs/imx_v8_defconfig b/arch/arm/configs/imx_v8_defconfig index 06d79f594d..db097d1675 100644 --- a/arch/arm/configs/imx_v8_defconfig +++ b/arch/arm/configs/imx_v8_defconfig @@ -1,5 +1,6 @@ CONFIG_ARCH_IMX=y CONFIG_IMX_MULTI_BOARDS=y +CONFIG_MACH_PROTONIC_IMX8M=y CONFIG_MACH_ZII_IMX8MQ_DEV=y CONFIG_MACH_NXP_IMX8MM_EVK=y CONFIG_MACH_NXP_IMX8MP_EVK=y -- cgit v1.2.3 From 47edadb956dd22f8afbd714dc22343d0021552c0 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Fri, 28 May 2021 15:30:41 +0200 Subject: ARM: imx_v8_defconfig: enable EHCI The i.MX8MM USB host controller uses the standard EHCI interface. Enable support in the defconfig to make this work out of the box. Signed-off-by: Lucas Stach Link: https://lore.barebox.org/20210528133041.1109923-4-l.stach@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/configs/imx_v8_defconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm') diff --git a/arch/arm/configs/imx_v8_defconfig b/arch/arm/configs/imx_v8_defconfig index db097d1675..e1e7b0f91e 100644 --- a/arch/arm/configs/imx_v8_defconfig +++ b/arch/arm/configs/imx_v8_defconfig @@ -105,6 +105,7 @@ CONFIG_MTD_DATAFLASH=y CONFIG_MTD_M25P80=y CONFIG_USB_HOST=y CONFIG_USB_IMX_CHIPIDEA=y +CONFIG_USB_EHCI=y CONFIG_USB_STORAGE=y CONFIG_USB_GADGET=y CONFIG_USB_GADGET_SERIAL=y -- cgit v1.2.3 From dfc7e4d1b2809c0300655fa817582fcaf196e609 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Mon, 7 Jun 2021 14:13:54 +0200 Subject: ARM: dts: protonic: define state partition Define one common state partition for all Protonic related boards Signed-off-by: Oleksij Rempel Link: https://lore.barebox.org/20210607121354.31183-1-o.rempel@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6qdl-prti6q-emmc.dtsi | 70 ++++++++++++++++++++++++++++++++++- 1 file changed, 69 insertions(+), 1 deletion(-) (limited to 'arch/arm') diff --git a/arch/arm/dts/imx6qdl-prti6q-emmc.dtsi b/arch/arm/dts/imx6qdl-prti6q-emmc.dtsi index 4fc7bd6473..094b0b09d7 100644 --- a/arch/arm/dts/imx6qdl-prti6q-emmc.dtsi +++ b/arch/arm/dts/imx6qdl-prti6q-emmc.dtsi @@ -1,6 +1,10 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT / { + aliases { + state = &state_emmc; + }; + chosen { stdout-path = &uart4; @@ -10,6 +14,70 @@ }; }; + state_emmc: state { + magic = <0x292D3A3C>; + compatible = "barebox,state"; + backend-type = "raw"; + backend = <&state_backend_emmc>; + backend-stridesize = <0x400>; + #address-cells = <1>; + #size-cells = <1>; + + bootstate { + #address-cells = <1>; + #size-cells = <1>; + + system0 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts { + reg = <0x0 0x4>; + type = "uint32"; + default = <3>; + }; + + priority { + reg = <0x4 0x4>; + type = "uint32"; + default = <21>; + }; + }; + + system1 { + #address-cells = <1>; + #size-cells = <1>; + + remaining_attempts { + reg = <0x10 0x4>; + type = "uint32"; + default = <3>; + }; + + priority { + reg = <0x14 0x4>; + type = "uint32"; + default = <20>; + }; + }; + + last_chosen { + reg = <0x20 0x4>; + type = "uint32"; + }; + }; + + blobs { + #address-cells = <1>; + #size-cells = <1>; + + data_partitions { + reg = <0x26 0x100>; + type = "string"; + }; + }; + }; + reserved-memory { #address-cells = <1>; #size-cells = <1>; @@ -42,7 +110,7 @@ reg = <0x40000 0x80000>; }; - partition@c0000 { + state_backend_emmc: partition@c0000 { label = "state"; reg = <0xc0000 0x40000>; }; -- cgit v1.2.3