From d23f9ea539b9abd1102eeab18cf0323c9a440d90 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Fri, 19 Nov 2021 10:54:24 +0100 Subject: flash-header-phytec-pcl063: Set SOC voltage to 1.25 V during boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit To increase stability during boot in cold conditions (< -30 °C) increase the SOC voltage from 1.15 V to 1.25 V in DCD. The ARM voltage is left unchanged at its default 1.15 V. Signed-off-by: Stefan Riedmueller Signed-off-by: Andrej Picej Link: https://lore.barebox.org/20211119095429.1905473-2-andrej.picej@norik.com Signed-off-by: Sascha Hauer --- arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm') diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063.h b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063.h index 9a8f5f18e1..8e0ab6f585 100644 --- a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063.h +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcl063.h @@ -3,6 +3,8 @@ loadaddr 0x80000000 soc imx6 ivtofs 0x400 +wm 32 0x020c8140 0x00580012 + wm 32 0x020c4068 0xffffffff wm 32 0x020c406c 0xffffffff wm 32 0x020c4070 0xffffffff -- cgit v1.2.3