From 91435aa96af6dbc66c9e306d31eb3cfa7d835615 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Wed, 9 Aug 2017 17:51:31 +0200 Subject: MIPS: ath79: add TP-Link WDR4300 board support This provides low level initialization of pll and ddr2. Resulting binary should work from SRAM, DDR2 and SPI flash. If started from DDR2 RAM level initialization will skipped. Signed-off-by: Oleksij Rempel Signed-off-by: Lucas Stach --- arch/mips/boards/tplink-wdr4300/Makefile | 1 + arch/mips/boards/tplink-wdr4300/board.c | 28 ++++++++++ .../tplink-wdr4300/include/board/board_pbl_start.h | 62 ++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 arch/mips/boards/tplink-wdr4300/Makefile create mode 100644 arch/mips/boards/tplink-wdr4300/board.c create mode 100644 arch/mips/boards/tplink-wdr4300/include/board/board_pbl_start.h (limited to 'arch/mips/boards') diff --git a/arch/mips/boards/tplink-wdr4300/Makefile b/arch/mips/boards/tplink-wdr4300/Makefile new file mode 100644 index 0000000000..dcfc2937d3 --- /dev/null +++ b/arch/mips/boards/tplink-wdr4300/Makefile @@ -0,0 +1 @@ +obj-y += board.o diff --git a/arch/mips/boards/tplink-wdr4300/board.c b/arch/mips/boards/tplink-wdr4300/board.c new file mode 100644 index 0000000000..d6126fcb6d --- /dev/null +++ b/arch/mips/boards/tplink-wdr4300/board.c @@ -0,0 +1,28 @@ +/* + * Copyright (C) 2017 Oleksij Rempel + * Copyright (C) 2014 Antony Pavlov + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include + +static int model_hostname_init(void) +{ + barebox_set_hostname("wdr4300"); + + return 0; +} +postcore_initcall(model_hostname_init); diff --git a/arch/mips/boards/tplink-wdr4300/include/board/board_pbl_start.h b/arch/mips/boards/tplink-wdr4300/include/board/board_pbl_start.h new file mode 100644 index 0000000000..7d4ee4baba --- /dev/null +++ b/arch/mips/boards/tplink-wdr4300/include/board/board_pbl_start.h @@ -0,0 +1,62 @@ +/* + * Copyright (C) 2017 Oleksij Rempel + * + * This file is part of barebox. + * See file CREDITS for list of people who contributed to this project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include +#include + + .macro board_pbl_start + .set push + .set noreorder + + mips_barebox_10h + + debug_ll_ar9344_init + + debug_ll_outc '1' + + hornet_mips24k_cp0_setup + debug_ll_outc '2' + + /* test if we are in the SRAM */ + pbl_blt 0xbd000000 1f t8 + debug_ll_outc '3' + b skip_flash_test + nop +1: + /* test if we are in the flash */ + pbl_blt 0xbf000000 skip_pll_ram_config t8 + debug_ll_outc '4' +skip_flash_test: + + pbl_ar9344_v11_pll_config + debug_ll_outc '5' + + pbl_ar9344_v11_ddr2_config + +skip_pll_ram_config: + debug_ll_outc '6' + debug_ll_outnl + + mips_nmon + + copy_to_link_location pbl_start + + .set pop + .endm -- cgit v1.2.3