From fdf48169087cfd3dd29d84f5e59efaef7255b8f3 Mon Sep 17 00:00:00 2001 From: Renaud Barbier Date: Thu, 17 May 2012 17:49:51 +0100 Subject: Minimal P2020RDB platform support and configuration file This is limited board support for the Freescale P2020RDB in single CPU mode. The DDR is configured for a memory bus running at 667Mhz. The system boots from NOR flash and provides the console at 115200 bauds, no other drivers are included. Finally, the PPC Kconfig and make file make the building of the P2020RDB platform firmware possible. Signed-off-by: Renaud Barbier Signed-off-by: Sascha Hauer --- arch/ppc/configs/p2020rdb_defconfig | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 arch/ppc/configs/p2020rdb_defconfig (limited to 'arch/ppc/configs') diff --git a/arch/ppc/configs/p2020rdb_defconfig b/arch/ppc/configs/p2020rdb_defconfig new file mode 100644 index 0000000000..f8a0687251 --- /dev/null +++ b/arch/ppc/configs/p2020rdb_defconfig @@ -0,0 +1,23 @@ +CONFIG_ARCH_MPC85XX=y +CONFIG_P2020RDB=y +CONFIG_P2020=y +CONFIG_LONGHELP=y +CONFIG_GLOB=y +CONFIG_CMDLINE_EDITING=y +CONFIG_AUTO_COMPLETE=y +CONFIG_CMD_SLEEP=y +CONFIG_CMD_FLASH=y +CONFIG_CMD_RESET=y +CONFIG_CMD_GO=y +CONFIG_FSL_ELBC=y +CONFIG_DRIVER_CFI=y +CONFIG_DRIVER_CFI_AMD=y +CONFIG_DRIVER_CFI_INTEL=n +CONFIG_DRIVER_CFI_BANK_WIDTH_1=n +CONFIG_DRIVER_CFI_BANK_WIDTH_2=y +CONFIG_DRIVER_CFI_BANK_WIDTH_4=n +CONFIG_MTD=y +CONFIG_MALLOC_SIZE=0x200000 +CONFIG_BAUDRATE=115200 +CONFIG_DRIVER_SERIAL_NS16550=y +CONFIG_RELOCATABLE=y -- cgit v1.2.3