From 3ae5e01aff4c21ab379cfa488711970eb46bd900 Mon Sep 17 00:00:00 2001 From: Steffen Trumtrar Date: Fri, 26 Aug 2022 08:49:56 +0200 Subject: ARM: Socfpga: Achilles: Enable ARM errata Signed-off-by: Steffen Trumtrar Link: https://lore.barebox.org/20220826064956.507125-4-s.trumtrar@pengutronix.de Signed-off-by: Sascha Hauer --- arch/arm/boards/reflex-achilles/lowlevel.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch') diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c index f5efb961a1..511b41fd01 100644 --- a/arch/arm/boards/reflex-achilles/lowlevel.c +++ b/arch/arm/boards/reflex-achilles/lowlevel.c @@ -16,6 +16,7 @@ #include #include #include +#include #include "pll-config-arria10.c" #include "pinmux-config-arria10.c" #include @@ -41,6 +42,7 @@ ENTRY_FUNCTION_WITHSTACK(start_socfpga_achilles_xload, ARRIA10_STACKTOP, r0, r1, int bitstream = 0; arm_cpu_lowlevel_init(); + arria10_cpu_lowlevel_init(); relocate_to_current_adr(); setup_c(); @@ -93,6 +95,7 @@ ENTRY_FUNCTION_WITHSTACK(start_socfpga_achilles_bringup, ARRIA10_STACKTOP, r0, r void *fdt; arm_cpu_lowlevel_init(); + arria10_cpu_lowlevel_init(); relocate_to_current_adr(); setup_c(); -- cgit v1.2.3