From 52fdd510dee79de704bda50b9cfaad926706bec4 Mon Sep 17 00:00:00 2001 From: Stefan Christ Date: Wed, 27 Apr 2016 12:04:40 +0200 Subject: ARM: dts: pfla02: use long enough reset for ethernet phy Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a small percentage of modules have 'transmission timeouts' errors like barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0 warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3 eth0: 1000Mbps full duplex link detected eth0: transmission timeout T eth0: transmission timeout T eth0: transmission timeout T eth0: transmission timeout T eth0: transmission timeout Signed-off-by: Stefan Christ Signed-off-by: Christian Hemp Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6qdl-phytec-pfla02.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index b67048f010..7da4e29d9d 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -85,6 +85,7 @@ &fec { phy-handle = <ðphy>; + phy-reset-duration = <10>; /* in msecs */ mdio { #address-cells = <1>; -- cgit v1.2.3