From 679ded140710b6149fcd1c318d799fe91dd3cb30 Mon Sep 17 00:00:00 2001
From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Wed, 14 Sep 2016 08:52:33 +0200
Subject: ARM: i.MX6: Sabrelite: Add PBL console support

Add PBL console support to allow for better debugging.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
---
 arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c | 57 +++++++++++++++++++---
 1 file changed, 49 insertions(+), 8 deletions(-)

(limited to 'arch')

diff --git a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
index abfb77a157..3b51e016e6 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/lowlevel.c
@@ -3,29 +3,70 @@
 #include <mach/generic.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/barebox-arm.h>
+#include <mach/imx6-regs.h>
+#include <io.h>
+#include <mach/debug_ll.h>
+#include <mach/esdctl.h>
+#include <asm/cache.h>
 
 extern char __dtb_imx6q_sabrelite_start[];
 
-ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+static noinline void imx6q_sabrelite_start(void)
 {
-	void *fdt;
+	void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+	void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+	writel(0x4, iomuxbase + 0x0bc);
+
+	imx6_ungate_all_peripherals();
+	imx6_uart_setup(uart);
+	pbl_set_putc(imx_uart_putc, uart);
 
+	pr_debug("Freescale i.MX6q SabreLite\n");
+
+	imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6q_sabrelite, r0, r1, r2)
+{
 	imx6_cpu_lowlevel_init();
 
-	fdt = __dtb_imx6q_sabrelite_start - get_runtime_offset();
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+	barrier();
 
-	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+	imx6q_sabrelite_start();
 }
 
 extern char __dtb_imx6dl_sabrelite_start[];
 
-ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+static noinline void imx6dl_sabrelite_start(void)
 {
-	void *fdt;
+	void __iomem *iomuxbase = IOMEM(MX6_IOMUXC_BASE_ADDR);
+	void __iomem *uart = IOMEM(MX6_UART2_BASE_ADDR);
+
+	writel(0x4, iomuxbase + 0x16c);
+
+	imx6_ungate_all_peripherals();
+	imx6_uart_setup(uart);
+	pbl_set_putc(imx_uart_putc, uart);
 
+	pr_debug("Freescale i.MX6q SabreLite\n");
+
+	imx6q_barebox_entry(__dtb_imx6q_sabrelite_start);
+}
+
+ENTRY_FUNCTION(start_imx6dl_sabrelite, r0, r1, r2)
+{
 	imx6_cpu_lowlevel_init();
 
-	fdt = __dtb_imx6dl_sabrelite_start - get_runtime_offset();
+	arm_early_mmu_cache_invalidate();
+
+	relocate_to_current_adr();
+	setup_c();
+	barrier();
 
-	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+	imx6dl_sabrelite_start();
 }
-- 
cgit v1.2.3