From fd5b60241bd072b9020baf159f63adade54ac1dd Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Tue, 10 Mar 2020 09:03:23 +0100 Subject: ARM: at91: add support for SAM9 SoC reset System reset wasn't supported on the sama5 so far. Add a driver to remedy this. Reviewed-by: Sam Ravnborg Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- arch/arm/mach-at91/Kconfig | 5 +++ arch/arm/mach-at91/Makefile | 1 + arch/arm/mach-at91/at91sam9_rst.c | 72 +++++++++++++++++++++++++++++++++++++++ 3 files changed, 78 insertions(+) create mode 100644 arch/arm/mach-at91/at91sam9_rst.c (limited to 'arch') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 5267102bf9..0eb5410664 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -41,12 +41,16 @@ config AT91SAM926X_BOARD_INIT config AT91SAM9_SMC bool +config HAVE_AT91SAM9_RST + bool + config SOC_AT91SAM9 bool select CPU_ARM926T select AT91SAM9_SMC select CLOCKSOURCE_ATMEL_PIT select PINCTRL + select HAVE_AT91SAM9_RST select HAVE_AT91_SMD select HAVE_AT91_USB_CLK select HAVE_AT91_UTMI @@ -54,6 +58,7 @@ config SOC_AT91SAM9 config SOC_SAMA5 bool + select HAVE_AT91SAM9_RST select CPU_V7 config SOC_SAMA5D2 diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 66d0b700f6..89aff54b8a 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -13,6 +13,7 @@ obj-y += at91sam9_reset.o obj-y += at91sam9g45_reset.o obj-$(CONFIG_AT91SAM9_SMC) += sam9_smc.o +obj-$(CONFIG_HAVE_AT91SAM9_RST) += at91sam9_rst.o # CPU-specific support obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o at91rm9200_time.o at91rm9200_devices.o diff --git a/arch/arm/mach-at91/at91sam9_rst.c b/arch/arm/mach-at91/at91sam9_rst.c new file mode 100644 index 0000000000..8f03576e69 --- /dev/null +++ b/arch/arm/mach-at91/at91sam9_rst.c @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2019 Pengutronix, Ahmad Fatoum + */ + +#include +#include +#include +#include +#include +#include + +struct at91sam9x_rst { + struct restart_handler restart; + void __iomem *base; +}; + +static void __noreturn at91sam9x_restart_soc(struct restart_handler *rst) +{ + struct at91sam9x_rst *priv = container_of(rst, struct at91sam9x_rst, restart); + + writel(AT91_RSTC_PROCRST + | AT91_RSTC_PERRST + | AT91_RSTC_EXTRST + | AT91_RSTC_KEY, + priv->base + AT91_RSTC_CR); + + hang(); +} + +static int at91sam9x_rst_probe(struct device_d *dev) +{ + struct at91sam9x_rst *priv; + struct resource *iores; + struct clk *clk; + + iores = dev_request_mem_resource(dev, 0); + if (IS_ERR(iores)) { + dev_err(dev, "could not get reset memory region\n"); + return PTR_ERR(iores); + } + + priv = xzalloc(sizeof(*priv)); + priv->base = IOMEM(iores->start); + + clk = clk_get(dev, NULL); + if (IS_ERR(clk)) { + release_region(iores); + free(priv); + return PTR_ERR(clk); + } + + clk_enable(clk); + + priv->restart.name = "at91sam9x-rst"; + priv->restart.restart = at91sam9x_restart_soc; + + return restart_handler_register(&priv->restart); +} + +static const __maybe_unused struct of_device_id at91sam9x_rst_dt_ids[] = { + { .compatible = "atmel,at91sam9g45-rstc", }, + { .compatible = "atmel,sama5d3-rstc", }, + { /* sentinel */ }, +}; + +static struct driver_d at91sam9x_rst_driver = { + .name = "at91sam9x-rst", + .of_compatible = DRV_OF_COMPAT(at91sam9x_rst_dt_ids), + .probe = at91sam9x_rst_probe, +}; +device_platform_driver(at91sam9x_rst_driver); -- cgit v1.2.3 From f5ac186c973856752fac2b7eee210afd94135f1c Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Tue, 10 Mar 2020 09:03:24 +0100 Subject: ARM: at91: sama5d27-som1: clean up lowlevel.c In ARM, stack decrements before storing values, so decrementing a number from the stack base is unnecessary. Existing instances of this were removed in 6b3dc4abd8 ("ARM: Cleanup stack offset cargo cult"), but the sama5d27-som1 board was added later than that. Fix the cargo cult here as well and while at it, turn a macro that doesn't need to be one into a static inline function. Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- arch/arm/boards/sama5d27-som1/lowlevel.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c index 7df5a4772d..6907dcf812 100644 --- a/arch/arm/boards/sama5d27-som1/lowlevel.c +++ b/arch/arm/boards/sama5d27-som1/lowlevel.c @@ -22,8 +22,10 @@ /* PCK = 492MHz, MCK = 164MHz */ #define MASTER_CLOCK 164000000 -#define sama5d2_pmc_enable_periph_clock(clk) \ - at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk) +static inline void sama5d2_pmc_enable_periph_clock(int clk) +{ + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk); +} static void ek_turn_led(unsigned color) { @@ -69,7 +71,7 @@ ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2) arm_cpu_lowlevel_init(); - arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE - 16); + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE); if (IS_ENABLED(CONFIG_DEBUG_LL)) ek_dbgu_init(); -- cgit v1.2.3 From 829bbd381f335297632220921b0b291d54e4a3d5 Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Tue, 10 Mar 2020 09:03:25 +0100 Subject: ARM: at91: sama5d27-som1: branch to noinline function after stack setup We need to branch out as soon as possible after setting up the stack. Do this and thereby avoid an access violation we now run into using OSELAS.Toolchain-2019.09.1. Fixes: 8bfb1852cf6a ("ARM: at91: add basic sama5d2-som1-ek1 support") Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- arch/arm/boards/sama5d27-som1/lowlevel.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/sama5d27-som1/lowlevel.c b/arch/arm/boards/sama5d27-som1/lowlevel.c index 6907dcf812..62d35be912 100644 --- a/arch/arm/boards/sama5d27-som1/lowlevel.c +++ b/arch/arm/boards/sama5d27-som1/lowlevel.c @@ -65,14 +65,10 @@ static void ek_dbgu_init(void) extern char __dtb_z_at91_sama5d27_som1_ek_start[]; -ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2) +static noinline void som1_entry(void) { void *fdt; - arm_cpu_lowlevel_init(); - - arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE); - if (IS_ENABLED(CONFIG_DEBUG_LL)) ek_dbgu_init(); @@ -81,3 +77,12 @@ ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2) ek_turn_led(RGB_LED_GREEN); barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt); } + +ENTRY_FUNCTION(start_sama5d27_som1_ek, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE); + + som1_entry(); +} -- cgit v1.2.3 From 34201fc37526f8e83ec65a026c55c3d3a15a45e4 Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Tue, 10 Mar 2020 09:03:26 +0100 Subject: ARM: at91: add sama5d27-based Groboards Giant Board support The Groboards Giant Board is a ATSAMA5D27C-D1G SiP-based SBC. The board features a 500MHz ARM Cortex-A5 and 128MB DDR2 SDRAM in the SiP as well as a MicroSD slot on the PCB. barebox doesn't yet support the sama5d2 SDHCI-variant, so board support is limited to toggling the LED and interfacing with the UART, but add this now till the rest may follow. Device tree is based on the vendor's device-tree available at https://github.com/Groboards/giantboard-tools Acked-by: Sam Ravnborg Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- arch/arm/boards/Makefile | 1 + arch/arm/boards/sama5d27-giantboard/Makefile | 1 + arch/arm/boards/sama5d27-giantboard/lowlevel.c | 63 ++++++ arch/arm/dts/Makefile | 1 + arch/arm/dts/at91-sama5d27_giantboard.dts | 299 +++++++++++++++++++++++++ arch/arm/mach-at91/Kconfig | 8 + images/Makefile.at91 | 4 + 7 files changed, 377 insertions(+) create mode 100644 arch/arm/boards/sama5d27-giantboard/Makefile create mode 100644 arch/arm/boards/sama5d27-giantboard/lowlevel.c create mode 100644 arch/arm/dts/at91-sama5d27_giantboard.dts (limited to 'arch') diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile index 6cb40d084b..edc600b41e 100644 --- a/arch/arm/boards/Makefile +++ b/arch/arm/boards/Makefile @@ -112,6 +112,7 @@ obj-$(CONFIG_MACH_RPI_COMMON) += raspberry-pi/ obj-$(CONFIG_MACH_SABRELITE) += freescale-mx6-sabrelite/ obj-$(CONFIG_MACH_SABRESD) += freescale-mx6-sabresd/ obj-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += freescale-mx6sx-sabresdb/ +obj-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += sama5d27-giantboard/ obj-$(CONFIG_MACH_SAMA5D27_SOM1) += sama5d27-som1/ obj-$(CONFIG_MACH_SAMA5D3XEK) += sama5d3xek/ obj-$(CONFIG_MACH_SAMA5D3_XPLAINED) += sama5d3_xplained/ diff --git a/arch/arm/boards/sama5d27-giantboard/Makefile b/arch/arm/boards/sama5d27-giantboard/Makefile new file mode 100644 index 0000000000..b08c4a93ca --- /dev/null +++ b/arch/arm/boards/sama5d27-giantboard/Makefile @@ -0,0 +1 @@ +lwl-y += lowlevel.o diff --git a/arch/arm/boards/sama5d27-giantboard/lowlevel.c b/arch/arm/boards/sama5d27-giantboard/lowlevel.c new file mode 100644 index 0000000000..0236c424c1 --- /dev/null +++ b/arch/arm/boards/sama5d27-giantboard/lowlevel.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2019 Ahmad Fatoum, Pengutronix + */ + +#include +#include + +#include +#include +#include + +#include +#include +#include +#include + +/* PCK = 492MHz, MCK = 164MHz */ +#define MASTER_CLOCK 164000000 + +static inline void sama5d2_pmc_enable_periph_clock(int clk) +{ + at91_pmc_sam9x5_enable_periph_clock(IOMEM(SAMA5D2_BASE_PMC), clk); +} + +static void dbgu_init(void) +{ + unsigned mck = MASTER_CLOCK / 2; + + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_PIOD); + + at91_mux_pio4_set_A_periph(IOMEM(SAMA5D2_BASE_PIOD), + pin_to_mask(AT91_PIN_PD3)); /* DBGU TXD */ + + sama5d2_pmc_enable_periph_clock(SAMA5D2_ID_UART1); + + at91_dbgu_setup_ll(IOMEM(SAMA5D2_BASE_UART1), mck, 115200); + + putc_ll('>'); +} + +extern char __dtb_z_at91_sama5d27_giantboard_start[]; + +static noinline void giantboard_entry(void) +{ + void *fdt; + + if (IS_ENABLED(CONFIG_DEBUG_LL)) + dbgu_init(); + + fdt = __dtb_z_at91_sama5d27_giantboard_start + get_runtime_offset(); + + barebox_arm_entry(SAMA5_DDRCS, SZ_128M, fdt); +} + +ENTRY_FUNCTION(start_sama5d27_giantboard, r0, r1, r2) +{ + arm_cpu_lowlevel_init(); + + arm_setup_stack(SAMA5D2_SRAM_BASE + SAMA5D2_SRAM_SIZE); + + giantboard_entry(); +} diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index e8dca0b851..20eafb6afd 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -137,6 +137,7 @@ lwl-dtb-$(CONFIG_MACH_ZII_VF610_DEV) += \ lwl-dtb-$(CONFIG_MACH_AT91SAM9263EK_DT) += at91sam9263ek.dtb.o lwl-dtb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += at91-microchip-ksz9477-evb.dtb.o lwl-dtb-$(CONFIG_MACH_SAMA5D27_SOM1) += at91-sama5d27_som1_ek.dtb.o +lwl-dtb-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += at91-sama5d27_giantboard.dtb.o lwl-dtb-$(CONFIG_MACH_AT91SAM9X5EK) += at91sam9x5ek.dtb.o lwl-dtb-$(CONFIG_MACH_XILINX_ZCU104) += zynqmp-zcu104-revA.dtb.o diff --git a/arch/arm/dts/at91-sama5d27_giantboard.dts b/arch/arm/dts/at91-sama5d27_giantboard.dts new file mode 100644 index 0000000000..940379e430 --- /dev/null +++ b/arch/arm/dts/at91-sama5d27_giantboard.dts @@ -0,0 +1,299 @@ +// SPDX-License-Identifer: GPL-2.0-or-later OR X11 +/* + * at91-sama5d27_giantboard.dts - Device Tree file for SAMA5D27 Giant Board + * + * Copyright (c) 2017, Microchip Technology Inc. + * 2016 Nicolas Ferre + * 2017 Cristian Birsan + * 2017 Claudiu Beznea + * 2019 Ahmad Fatoum + */ + +/dts-v1/; + +#include +#include +#include +#include +#include + +/ { + model = "Giant Board"; + compatible = "groboards,sama5d27-giantboard", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5"; + + chosen { + stdout-path = &uart1; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_led_gpio_default>; + + orange { + label = "orange"; + gpios = <&pioA PIN_PA6 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "mmc0"; + }; + }; + + memory { + reg = <0x20000000 0x8000000>; + }; +}; + +&slow_xtal { + clock-frequency = <32768>; +}; + +&main_xtal { + clock-frequency = <24000000>; +}; + +&usb0 { + status = "okay"; +}; + +&sdmmc1 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sdmmc1_default>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_spi0_default>; + status = "disabled"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1_default>; + atmel,use-dma-rx; + atmel,use-dma-tx; + status = "okay"; +}; + +&shutdown_controller { + atmel,shdwc-debouncer = <976>; + atmel,wakeup-rtc-timer; + + input@0 { + reg = <0>; + atmel,wakeup-type = "low"; + }; +}; + +&watchdog { + status = "okay"; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_default>; + dmas = <0>, <0>; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1_default>; + dmas = <0>, <0>; + i2c-sda-hold-time-ns = <350>; + status = "okay"; + + pmic@5b { + compatible = "active-semi,act8945a"; + reg = <0x5b>; + active-semi,vsel-low; + + regulators { + vdd_1v8_reg: REG_DCDC1 { + regulator-name = "VDD_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-min-microvolt=<1850000>; + regulator-suspend-max-microvolt=<1850000>; + regulator-changeable-in-suspend; + regulator-mode=; + }; + }; + + vdd_1v2_reg: REG_DCDC2 { + regulator-name = "VDD_1V2"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1300000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_3v3_reg: REG_DCDC3 { + regulator-name = "VDD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_fuse_reg: REG_LDO1 { + regulator-name = "VDD_FUSE"; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_3v3_lp_reg: REG_LDO2 { + regulator-name = "VDD_3V3_LP"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_led_reg: REG_LDO3 { + regulator-name = "VDD_LED"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_sdhc_1v8_reg: REG_LDO4 { + regulator-name = "VDD_SDHC_1V8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-allowed-modes = , + ; + regulator-initial-mode = ; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + charger { + compatible = "active-semi,act8945a-charger"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; + interrupt-parent = <&pioA>; + interrupts = ; + + active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>; + active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>; + active-semi,input-voltage-threshold-microvolt = <6600>; + active-semi,precondition-timeout = <40>; + active-semi,total-timeout = <3>; + }; + }; +}; + +&adc { + vddana-supply = <&vdd_3v3_reg>; + vref-supply = <&vdd_3v3_reg>; + status = "disabled"; +}; + +&pioA { + pinctrl_i2c0_default: i2c0_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_i2c1_default: i2c1_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_led_gpio_default: led_gpio_default { + pinmux = ; + bias-pull-down; + }; + + pinctrl_sdmmc1_default: sdmmc1_default { + cmd_data { + pinmux = , + , + , + , + ; + bias-pull-up; + }; + + conf-ck_cd { + pinmux = , + ; + bias-disable; + }; + }; + + pinctrl_spi0_default: spi0_default { + pinmux = , + , + ; + bias-disable; + }; + + pinctrl_uart1_default: uart1_default { + pinmux = , + ; + bias-disable; + }; + + pinctrl_charger_chglev: charger_chglev { + pinmux = ; + bias-disable; + }; + + pinctrl_charger_irq: charger_irq { + pinmux = ; + bias-disable; + }; + + pinctrl_charger_lbo: charger_lbo { + pinmux = ; + bias-pull-up; + }; +}; diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 0eb5410664..eb14cd2c28 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -587,6 +587,14 @@ config MACH_SAMA5D27_SOM1 help Select this if you are using Microchip's sama5d27 SoM evaluation kit +config MACH_SAMA5D27_GIANTBOARD + bool "Groboards SAMA5D27 Giant Board" + select SOC_SAMA5D2 + select OFDEVICE + select COMMON_CLK_OF_PROVIDER + help + Select this if you are using the Groboards sama5d27 Giantboard + endif comment "AT91 Board Options" diff --git a/images/Makefile.at91 b/images/Makefile.at91 index f321bdec36..448d71fb98 100644 --- a/images/Makefile.at91 +++ b/images/Makefile.at91 @@ -17,3 +17,7 @@ image-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += barebox-microchip-ksz9477-evb.img pblb-$(CONFIG_MACH_SAMA5D27_SOM1) += start_sama5d27_som1_ek FILE_barebox-sama5d27-som1-ek.img = start_sama5d27_som1_ek.pblb image-$(CONFIG_MACH_SAMA5D27_SOM1) += barebox-sama5d27-som1-ek.img + +pblb-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += start_sama5d27_giantboard +FILE_barebox-groboards-sama5d27-giantboard.img = start_sama5d27_giantboard.pblb +image-$(CONFIG_MACH_SAMA5D27_GIANTBOARD) += barebox-groboards-sama5d27-giantboard.img -- cgit v1.2.3