From a4c192afe05376a9423608e93fb5c5b56f2c4fd0 Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Thu, 19 Dec 2019 10:13:10 +0100 Subject: ARM: cache_64: invalidate icache in arm_early_mmu_cache_flush So far arm_early_mmu_cache_flush has only been used in preparation for executing newly-written code. For this reason, on ARMv7 and below, it had always invalidate the icache after the dcache flush. We don't do this on ARM64, but sync_caches_for_execution depends on this, which had this comment that didn't hold true for ARM64: > Despite the name arm_early_mmu_cache_flush not only flushes the > data cache, but also invalidates the instruction cache. It might be worthwhile to decouple dcache flushing from icache invalidation, but for now, align what we do on ARM64 with what we do for 32-bit ARMs. This fixes a potential read of stale instructions when loading second-stage barebox from the PBL with MMU disabled. Signed-off-by: Ahmad Fatoum Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/cpu/cache_64.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/cpu/cache_64.c b/arch/arm/cpu/cache_64.c index 81c37e1c34..6e18d981a4 100644 --- a/arch/arm/cpu/cache_64.c +++ b/arch/arm/cpu/cache_64.c @@ -27,6 +27,7 @@ int arm_set_cache_functions(void) void arm_early_mmu_cache_flush(void) { v8_flush_dcache_all(); + v8_invalidate_icache_all(); } void arm_early_mmu_cache_invalidate(void) -- cgit v1.2.3