From 7f0ddb29984982f294adc2990da14954d4874974 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:15 +0100 Subject: ARM: dts: imx6: pcaaxl3: Order nodes alphabetically Bring the device tree nodes in alphabetical order and in this context also remove the deprecated iomux group. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi | 182 ++++++++++++++++----------------- 1 file changed, 90 insertions(+), 92 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi index 66b547ad8e..db986f87ef 100644 --- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi +++ b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi @@ -17,104 +17,16 @@ compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q"; chosen { - environment-sd3 { - compatible = "barebox,environment"; - device-path = &environment_usdhc3; - status = "disabled"; - }; - environment-nand { compatible = "barebox,environment"; device-path = &environment_nand; status = "disabled"; }; - }; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - - eeprom: m24c32@50 { - compatible = "st,24c32", "at24"; - reg = <0x50>; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - - imx6q-phytec-pcaaxl3 { - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 - MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 - MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 - MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpmigrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - >; - }; - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ - >; + environment-sd3 { + compatible = "barebox,environment"; + device-path = &environment_usdhc3; + status = "disabled"; }; }; }; @@ -154,6 +66,92 @@ }; }; +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + + eeprom: m24c32@50 { + compatible = "st,24c32", "at24"; + reg = <0x50>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 + MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpmigrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ + >; + }; +}; + &ocotp { barebox,provide-mac-address = <&fec 0x620>; }; -- cgit v1.2.3 From 56788fcbde4d53983dcc2e063646fbb41ff2c8b4 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:16 +0100 Subject: ARM: dts: imx6: pcaaxl3: Update license and model description Make use of SPDX license identifiers and update copyright notices and model descriptions of the phyCARD-i.MX 6 SOM. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6q-phytec-pbaa03.dts | 13 ++++--------- arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi | 13 ++++--------- 2 files changed, 8 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/imx6q-phytec-pbaa03.dts b/arch/arm/dts/imx6q-phytec-pbaa03.dts index 5216a2dfe3..8034f90804 100644 --- a/arch/arm/dts/imx6q-phytec-pbaa03.dts +++ b/arch/arm/dts/imx6q-phytec-pbaa03.dts @@ -1,12 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) /* - * Copyright 2014 Christian Hemp, Phytec Messtechnik GmbH - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp */ /dts-v1/; @@ -16,7 +11,7 @@ #include "imx6q-phytec-pcaaxl3.dtsi" / { - model = "Phytec phyCARD-i.MX6 Quad Carrier-Board"; + model = "PHYTEC phyCARD-i.MX6 Quad"; compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q"; chosen { diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi index db986f87ef..0dbd5419ba 100644 --- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi +++ b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi @@ -1,19 +1,14 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) /* - * Copyright 2014444 Christian Hemp, Phytec Messtechnik GmbH - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp */ #include #include "imx6q.dtsi" / { - model = "Phytec phyCARD-i.MX6 Quad"; + model = "PHYTEC phyCARD-i.MX6 Quad"; compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q"; chosen { -- cgit v1.2.3 From 207e33d4e037c51dcdbf83a79565b96a3a1b4da0 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:17 +0100 Subject: ARM: dts: imx6: pcaaxl3: Make use of the simpler name phycard Use the simpler name phycard instead of the article number pcaaxl3 for device tree file names and image names of the phyCARD-i.MX 6. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/boards/phytec-som-imx6/lowlevel.c | 6 +- arch/arm/dts/Makefile | 2 +- arch/arm/dts/imx6q-phytec-pbaa03.dts | 32 ----- arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi | 177 --------------------------- arch/arm/dts/imx6q-phytec-phycard.dts | 36 ++++++ arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 171 ++++++++++++++++++++++++++ images/Makefile.imx | 6 +- 7 files changed, 214 insertions(+), 216 deletions(-) delete mode 100644 arch/arm/dts/imx6q-phytec-pbaa03.dts delete mode 100644 arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi create mode 100644 arch/arm/dts/imx6q-phytec-phycard.dts create mode 100644 arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi (limited to 'arch') diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 2de84169c6..900aa19c19 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -90,9 +90,9 @@ static void __noreturn start_imx6_phytec_common(uint32_t size, __dtb_##fdt_name##_start); \ } -PHYTEC_ENTRY(start_phytec_pbaa03_1gib, imx6q_phytec_pbaa03, SZ_1G, true); -PHYTEC_ENTRY(start_phytec_pbaa03_1gib_1bank, imx6q_phytec_pbaa03, SZ_1G, true); -PHYTEC_ENTRY(start_phytec_pbaa03_2gib, imx6q_phytec_pbaa03, SZ_2G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib, imx6q_phytec_phycard, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_1gib_1bank, imx6q_phytec_phycard, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycard_imx6q_2gib, imx6q_phytec_phycard, SZ_2G, true); PHYTEC_ENTRY(start_phytec_pbab01_512mb_1bank, imx6q_phytec_pbab01, SZ_512M, true); PHYTEC_ENTRY(start_phytec_pbab01_1gib, imx6q_phytec_pbab01, SZ_1G, true); diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5c9a311c5f..e8dca0b851 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -52,7 +52,7 @@ lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += am335x-phytec-phyflex-som.dtb.o am33 am335x-phytec-phycore-som-nand-no-eeprom.dtb.o am335x-phytec-phycore-som-nand-no-spi-no-eeprom.dtb.o \ am335x-phytec-phycore-som-emmc.dtb.o \ am335x-phytec-phycard-som.dtb.o am335x-phytec-phycard-som-mlo.dtb.o -lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-pbaa03.dtb.o \ +lwl-dtb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += imx6q-phytec-phycard.dtb.o \ imx6s-phytec-pbab01.dtb.o \ imx6dl-phytec-pbab01.dtb.o \ imx6q-phytec-pbab01.dtb.o \ diff --git a/arch/arm/dts/imx6q-phytec-pbaa03.dts b/arch/arm/dts/imx6q-phytec-pbaa03.dts deleted file mode 100644 index 8034f90804..0000000000 --- a/arch/arm/dts/imx6q-phytec-pbaa03.dts +++ /dev/null @@ -1,32 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later) -/* - * Copyright (C) 2014 PHYTEC Messtechnik GmbH - * Author: Christian Hemp - */ - -/dts-v1/; -#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY -#include CONFIG_BOOTM_FITIMAGE_PUBKEY -#endif -#include "imx6q-phytec-pcaaxl3.dtsi" - -/ { - model = "PHYTEC phyCARD-i.MX6 Quad"; - compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q"; - - chosen { - stdout-path = &uart3; - }; -}; - -&fec { - status = "okay"; -}; - -&uart3 { - status = "okay"; -}; - -&usdhc3 { - status = "okay"; -}; diff --git a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi b/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi deleted file mode 100644 index 0dbd5419ba..0000000000 --- a/arch/arm/dts/imx6q-phytec-pcaaxl3.dtsi +++ /dev/null @@ -1,177 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0-or-later) -/* - * Copyright (C) 2014 PHYTEC Messtechnik GmbH - * Author: Christian Hemp - */ - -#include -#include "imx6q.dtsi" - -/ { - model = "PHYTEC phyCARD-i.MX6 Quad"; - compatible = "phytec,imx6q-pcaaxl3", "fsl,imx6q"; - - chosen { - environment-nand { - compatible = "barebox,environment"; - device-path = &environment_nand; - status = "disabled"; - }; - - environment-sd3 { - compatible = "barebox,environment"; - device-path = &environment_usdhc3; - status = "disabled"; - }; - }; -}; - -&fec { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_enet>; - phy-mode = "mii"; - status = "disabled"; -}; - -&gpmi { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_gpmi_nand>; - nand-on-flash-bbt; - status = "okay"; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0x400000>; - }; - - environment_nand: partition@400000 { - label = "barebox-environment"; - reg = <0x400000 0x20000>; - }; - - partition@420000 { - label = "root"; - reg = <0x420000 0x0>; - }; - }; -}; - -&i2c1 { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_i2c1>; - - eeprom: m24c32@50 { - compatible = "st,24c32", "at24"; - reg = <0x50>; - }; -}; - -&iomuxc { - pinctrl-names = "default"; - - pinctrl_enet: enetgrp { - fsl,pins = < - MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 - MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 - MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 - MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 - MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 - MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 - MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 - MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 - MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 - MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 - MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 - MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 - MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 - MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 - >; - }; - - pinctrl_gpmi_nand: gpmigrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; - - pinctrl_i2c1: i2c1grp { - fsl,pins = < - MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 - MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 - >; - }; - - pinctrl_uart3: uart3grp { - fsl,pins = < - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 - >; - }; - - pinctrl_usdhc3: usdhc3grp { - fsl,pins = < - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 - MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ - >; - }; -}; - -&ocotp { - barebox,provide-mac-address = <&fec 0x620>; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart3>; - status = "disabled"; -}; - -&usdhc3 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc3>; - cd-gpios = <&gpio5 22 0>; - status = "disabled"; - - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "barebox"; - reg = <0x0 0xe0000>; - }; - environment_usdhc3: partition@e0000 { - label = "barebox-environment"; - reg = <0xe0000 0x20000>; - }; -}; diff --git a/arch/arm/dts/imx6q-phytec-phycard.dts b/arch/arm/dts/imx6q-phytec-phycard.dts new file mode 100644 index 0000000000..09106f7d4d --- /dev/null +++ b/arch/arm/dts/imx6q-phytec-phycard.dts @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) +/* + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp + */ + +/dts-v1/; + +#ifdef CONFIG_BOOTM_FITIMAGE_PUBKEY +#include CONFIG_BOOTM_FITIMAGE_PUBKEY +#endif + +#include +#include "imx6q.dtsi" +#include "imx6qdl-phytec-phycard-som.dtsi" + +/ { + model = "PHYTEC phyCARD-i.MX6 Quad"; + compatible = "phytec,imx6q-pbaa03", "phytec,imx6q-pcaaxl3", "fsl,imx6q"; + + chosen { + stdout-path = &uart3; + }; +}; + +&fec { + status = "okay"; +}; + +&uart3 { + status = "okay"; +}; + +&usdhc3 { + status = "okay"; +}; diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi new file mode 100644 index 0000000000..6d963f1910 --- /dev/null +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later) +/* + * Copyright (C) 2014 PHYTEC Messtechnik GmbH + * Author: Christian Hemp + */ + +/ { + chosen { + environment-nand { + compatible = "barebox,environment"; + device-path = &environment_nand; + status = "disabled"; + }; + + environment-sd3 { + compatible = "barebox,environment"; + device-path = &environment_usdhc3; + status = "disabled"; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "mii"; + status = "disabled"; +}; + +&gpmi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpmi_nand>; + nand-on-flash-bbt; + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0x400000>; + }; + + environment_nand: partition@400000 { + label = "barebox-environment"; + reg = <0x400000 0x20000>; + }; + + partition@420000 { + label = "root"; + reg = <0x420000 0x0>; + }; + }; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + + eeprom: m24c32@50 { + compatible = "st,24c32", "at24"; + reg = <0x50>; + }; +}; + +&iomuxc { + pinctrl-names = "default"; + + pinctrl_enet: enetgrp { + fsl,pins = < + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0 + MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0 + MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0 + MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0 + MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0 + MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0 + MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b0 + MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0 + >; + }; + + pinctrl_gpmi_nand: gpmigrp { + fsl,pins = < + MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 + MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 + MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 + MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 + MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 + MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 + MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 + MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 + MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 + MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 + MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 + MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 + MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 + MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 + MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 + MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 + MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 + >; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = < + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 + MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 /* CD */ + >; + }; +}; + +&ocotp { + barebox,provide-mac-address = <&fec 0x620>; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + status = "disabled"; +}; + +&usdhc3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc3>; + cd-gpios = <&gpio5 22 0>; + status = "disabled"; + + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + environment_usdhc3: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; +}; diff --git a/images/Makefile.imx b/images/Makefile.imx index 24d3536d36..71ff2962b5 100644 --- a/images/Makefile.imx +++ b/images/Makefile.imx @@ -273,11 +273,11 @@ $(call build_imx_habv4img, CONFIG_MACH_EMBEST_MARSBOARD, start_imx6q_marsboard, $(call build_imx_habv4img, CONFIG_MACH_EMBEST_RIOTBOARD, start_imx6s_riotboard, embest-riotboard/flash-header-embest-riotboard, embest-imx6s-riotboard) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-pbaa03-1gib) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib, phytec-phycard-imx6q-1gib) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-pbaa03-1gib-1bank) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_1gib_1bank, phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank, phytec-phycard-imx6q-1gib-1bank) -$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_pbaa03_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-pbaa03-2gib) +$(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycard_imx6q_2gib, phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib, phytec-phycard-imx6q-2gib) $(call build_imx_habv4img, CONFIG_MACH_PHYTEC_SOM_IMX6, start_phytec_phycore_imx6q_som_nand_1gib, phytec-som-imx6/flash-header-phytec-pcm058-1gib, phytec-phycore-imx6q-som-nand-1gib) -- cgit v1.2.3 From f976ce025e69a4607cdcab8670c32ae7e8d057c7 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:18 +0100 Subject: ARM: dts: imx6: phycard: Make eeprom configurable The EEPROM is a configurable option. So make it configurable from the dts file. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6q-phytec-phycard.dts | 4 ++++ arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 1 + 2 files changed, 5 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/imx6q-phytec-phycard.dts b/arch/arm/dts/imx6q-phytec-phycard.dts index 09106f7d4d..c06461c2c7 100644 --- a/arch/arm/dts/imx6q-phytec-phycard.dts +++ b/arch/arm/dts/imx6q-phytec-phycard.dts @@ -23,6 +23,10 @@ }; }; +&eeprom { + status = "okay"; +}; + &fec { status = "okay"; }; diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi index 6d963f1910..f1a5e59623 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -63,6 +63,7 @@ eeprom: m24c32@50 { compatible = "st,24c32", "at24"; reg = <0x50>; + status = "disabled"; }; }; -- cgit v1.2.3 From caadc725fd5bf139e3537ea63fb664bcd3a00d79 Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:19 +0100 Subject: ARM: dts: imx6: phycard: Switch to new partitions binding The SD card interface is still using the legacy partition binding. Change this by switching to the new bindings. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 22 +++++++++++++--------- 1 file changed, 13 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi index f1a5e59623..f17ba7bf80 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -158,15 +158,19 @@ cd-gpios = <&gpio5 22 0>; status = "disabled"; - #address-cells = <1>; - #size-cells = <1>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; - partition@0 { - label = "barebox"; - reg = <0x0 0xe0000>; - }; - environment_usdhc3: partition@e0000 { - label = "barebox-environment"; - reg = <0xe0000 0x20000>; + partition@0 { + label = "barebox"; + reg = <0x0 0xe0000>; + }; + + environment_usdhc3: partition@e0000 { + label = "barebox-environment"; + reg = <0xe0000 0x20000>; + }; }; }; -- cgit v1.2.3 From c1e22c7c8d93c4cd58de7626375d459b539af3bb Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:20 +0100 Subject: ARM: dts: imx6: phycard: Use gpio binding constants Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi index f17ba7bf80..892bce1fc0 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -4,6 +4,8 @@ * Author: Christian Hemp */ +#include + / { chosen { environment-nand { @@ -155,7 +157,7 @@ &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; - cd-gpios = <&gpio5 22 0>; + cd-gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; status = "disabled"; partitions { -- cgit v1.2.3 From 5fd7ab2cefd0e6b11e450deb89200216aef2934b Mon Sep 17 00:00:00 2001 From: Stefan Riedmueller Date: Wed, 11 Dec 2019 11:59:21 +0100 Subject: ARM: dts: imx6: phytec: Increase NAND barebox partition size For NAND flash with eraseblock size 1 MB and more the current barebox partition size is not sufficient. The 4 FCB copies alone occupy the 4 MB partition size. Increase the partition size to 16 MB to be fit for the future and leaving some blocks for bad block handling as well. Signed-off-by: Stefan Riedmueller Signed-off-by: Sascha Hauer --- arch/arm/dts/imx6qdl-phytec-pfla02.dtsi | 6 +++--- arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi | 6 +++--- arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi | 6 +++--- 3 files changed, 9 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index 846ebbe6b1..841ad653b2 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -98,17 +98,17 @@ partition@0 { label = "barebox"; - reg = <0x0 0x400000>; + reg = <0x0 0x1000000>; }; partition@400000 { label = "barebox-environment"; - reg = <0x400000 0x100000>; + reg = <0x1000000 0x100000>; }; partition@500000 { label = "root"; - reg = <0x500000 0x0>; + reg = <0x1100000 0x0>; }; }; }; diff --git a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi index 892bce1fc0..5d287258bb 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycard-som.dtsi @@ -42,17 +42,17 @@ partition@0 { label = "barebox"; - reg = <0x0 0x400000>; + reg = <0x0 0x1000000>; }; environment_nand: partition@400000 { label = "barebox-environment"; - reg = <0x400000 0x20000>; + reg = <0x1000000 0x100000>; }; partition@420000 { label = "root"; - reg = <0x420000 0x0>; + reg = <0x1100000 0x0>; }; }; }; diff --git a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi index 69f252b423..918b62f794 100644 --- a/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-phycore-som.dtsi @@ -50,17 +50,17 @@ partition@0 { label = "barebox"; - reg = <0x0 0x400000>; + reg = <0x0 0x1000000>; }; partition@400000 { label = "barebox-environment"; - reg = <0x400000 0x100000>; + reg = <0x1000000 0x100000>; }; partition@500000 { label = "root"; - reg = <0x500000 0x0>; + reg = <0x1100000 0x0>; }; }; }; -- cgit v1.2.3 From 113645deeb0b16a14c6197d94e52c9247bd49de6 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:18:52 +0100 Subject: ARM: zii-imx8mq-dev: make eMMC update target the default We only have a single update target, so make it the default. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx8mq-dev/board.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c index 144adb9cef..dcf945db49 100644 --- a/arch/arm/boards/zii-imx8mq-dev/board.c +++ b/arch/arm/boards/zii-imx8mq-dev/board.c @@ -19,7 +19,8 @@ static int zii_imx8mq_dev_init(void) barebox_set_hostname("imx8mq-zii-rdu3"); - imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", 0); + imx8mq_bbu_internal_mmcboot_register_handler("eMMC", "/dev/mmc0", + BBU_HANDLER_FLAG_DEFAULT); if (bootsource_get_instance() == 0) of_device_enable_path("/chosen/environment-emmc"); -- cgit v1.2.3 From 496b4132d8a0cfc04cbfaf3991111466ee308be1 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:18:53 +0100 Subject: ARM: zii-imx8mq-dev: add DT fixups There are only two fixups we need to apply at the moment: - The 27" RMB3 based unit has a eGalax Touchscreen instead of Synaptics. - The 10.1" SCU/CCU unit has no DEB and thus no switch, but instead the i210 ethernet is routed to the external connector directly. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx8mq-dev/board.c | 138 +++++++++++++++++++++++++++++++++ arch/arm/dts/imx8mq-zii-ultra.dtsi | 10 +++ 2 files changed, 148 insertions(+) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c index dcf945db49..7326dcd2dc 100644 --- a/arch/arm/boards/zii-imx8mq-dev/board.c +++ b/arch/arm/boards/zii-imx8mq-dev/board.c @@ -11,6 +11,15 @@ #include #include #include +#include "../zii-common/pn-fixup.h" + +#define LRU_FLAG_EGALAX BIT(0) +#define LRU_FLAG_NO_DEB BIT(1) + +struct zii_imx8mq_dev_lru_fixup { + struct zii_pn_fixup fixup; + unsigned int flags; +}; static int zii_imx8mq_dev_init(void) { @@ -32,3 +41,132 @@ static int zii_imx8mq_dev_init(void) return 0; } device_initcall(zii_imx8mq_dev_init); + +static int zii_imx8mq_dev_fixup_egalax_ts(struct device_node *root, void *ctx) +{ + struct device_node *np; + + /* + * The 27" unit has a EETI eGalax touchscreen instead of the + * Synaptics RMI4 found on other units. + */ + pr_info("Enabling eGalax touchscreen instead of RMI4\n"); + + np = of_find_compatible_node(root, NULL, "syna,rmi4-i2c"); + if (!np) + return -ENODEV; + + of_device_disable(np); + + np = of_find_compatible_node(root, NULL, "eeti,exc3000"); + if (!np) + return -ENODEV; + + of_device_enable(np); + + return 0; +} + +static int zii_imx8mq_dev_fixup_deb_internal(void) +{ + struct device_node *np, *aliases; + struct device_d *dev; + + /* + * In the internal DT remove the complete FEC hierarchy and move the + * i210 to be the eth0 interface to allow network boot to work without + * rewriting all the boot scripts. + */ + aliases = of_find_node_by_path("/aliases"); + if (!aliases) + return -ENODEV; + + np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-fec"); + if (!np) + return -ENODEV; + + of_device_disable(np); + + of_property_write_string(aliases, "ethernet1", np->full_name); + + dev = of_find_device_by_node(np); + if (!dev) + return -ENODEV; + + unregister_device(dev); + + np = of_find_node_by_name(NULL, "i210@0"); + if (!np) + return -ENODEV; + + of_property_write_string(aliases, "ethernet0", np->full_name); + + /* Refresh the internal aliases list from the patched DT */ + of_alias_scan(); + + return 0; +} + +static int zii_imx8mq_dev_fixup_deb(struct device_node *root, void *ctx) +{ + struct device_node *np; + + /* + * In the kernel DT remove all devices from the DEB, which isn't + * present on this system. + */ + np = of_find_compatible_node(root, NULL, "marvell,mv88e6085"); + if (!np) + return -ENODEV; + + of_device_disable(np); + + np = of_find_compatible_node(root, NULL, "zii,rave-wdt"); + if (!np) + return -ENODEV; + + of_device_disable(np); + + return 0; +} + +static void zii_imx8mq_dev_lru_fixup(const struct zii_pn_fixup *context) +{ + const struct zii_imx8mq_dev_lru_fixup *fixup = + container_of(context, struct zii_imx8mq_dev_lru_fixup, fixup); + + if (fixup->flags & LRU_FLAG_EGALAX) + of_register_fixup(zii_imx8mq_dev_fixup_egalax_ts, NULL); + + if (fixup->flags & LRU_FLAG_NO_DEB) { + zii_imx8mq_dev_fixup_deb_internal(); + of_register_fixup(zii_imx8mq_dev_fixup_deb, NULL); + } +} + +#define ZII_IMX8MQ_DEV_LRU_FIXUP(__pn, __flags) \ + { \ + { __pn, zii_imx8mq_dev_lru_fixup }, \ + __flags \ + } + +static const struct zii_imx8mq_dev_lru_fixup zii_imx8mq_dev_lru_fixups[] = { + ZII_IMX8MQ_DEV_LRU_FIXUP("00-5131-02", LRU_FLAG_EGALAX), + ZII_IMX8MQ_DEV_LRU_FIXUP("00-5131-03", LRU_FLAG_EGALAX), + ZII_IMX8MQ_DEV_LRU_FIXUP("00-5170-01", LRU_FLAG_NO_DEB), +}; + +/* + * This initcall needs to be executed before coredevices, so we have a chance + * to fix up the devices with the correct information. + */ +static int zii_imx8mq_dev_process_fixups(void) +{ + if (!of_machine_is_compatible("zii,imx8mq-ultra")) + return 0; + + zii_process_lru_fixups(zii_imx8mq_dev_lru_fixups); + + return 0; +} +postmmu_initcall(zii_imx8mq_dev_process_fixups); diff --git a/arch/arm/dts/imx8mq-zii-ultra.dtsi b/arch/arm/dts/imx8mq-zii-ultra.dtsi index 6180f21ab0..50bad9b1a2 100644 --- a/arch/arm/dts/imx8mq-zii-ultra.dtsi +++ b/arch/arm/dts/imx8mq-zii-ultra.dtsi @@ -22,6 +22,11 @@ }; }; + device-info { + nvmem-cells = <&lru_part_number>; + nvmem-cell-names = "lru-part-number"; + }; + aliases { ethernet0 = &fec1; ethernet1 = &i210; @@ -64,6 +69,11 @@ &uart2 { rave-sp { eeprom@a4 { + lru_part_number: lru-part-number@21 { + reg = <0x21 15>; + read-only; + }; + mac_address_0: mac-address@180 { reg = <0x180 6>; }; -- cgit v1.2.3 From a176cfb82a91af942385907da6843132a6d76dc7 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:18:54 +0100 Subject: ARM: zii-imx8mq-dev: fixup touchscreen and ethernet switch alias Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx8mq-dev/board.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx8mq-dev/board.c b/arch/arm/boards/zii-imx8mq-dev/board.c index 7326dcd2dc..ac455990b0 100644 --- a/arch/arm/boards/zii-imx8mq-dev/board.c +++ b/arch/arm/boards/zii-imx8mq-dev/board.c @@ -44,7 +44,7 @@ device_initcall(zii_imx8mq_dev_init); static int zii_imx8mq_dev_fixup_egalax_ts(struct device_node *root, void *ctx) { - struct device_node *np; + struct device_node *np, * aliases; /* * The 27" unit has a EETI eGalax touchscreen instead of the @@ -64,6 +64,12 @@ static int zii_imx8mq_dev_fixup_egalax_ts(struct device_node *root, void *ctx) of_device_enable(np); + aliases = of_find_node_by_path_from(root, "/aliases"); + if (!aliases) + return -ENODEV; + + of_property_write_string(aliases, "touchscreen0", np->full_name); + return 0; } @@ -109,7 +115,8 @@ static int zii_imx8mq_dev_fixup_deb_internal(void) static int zii_imx8mq_dev_fixup_deb(struct device_node *root, void *ctx) { - struct device_node *np; + struct device_node *np, *aliases; + struct property *pp; /* * In the kernel DT remove all devices from the DEB, which isn't @@ -127,6 +134,16 @@ static int zii_imx8mq_dev_fixup_deb(struct device_node *root, void *ctx) of_device_disable(np); + aliases = of_find_node_by_path_from(root, "/aliases"); + if (!aliases) + return -ENODEV; + + pp = of_find_property(aliases, "ethernet-switch0", NULL); + if (!pp) + return -ENODEV; + + of_delete_property(pp); + return 0; } -- cgit v1.2.3 From 6b6db657d89c47855d2b099ce1d5121672986c01 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:22:38 +0100 Subject: ARM: rdu-common: restart machine after fixing i210 device ID For the iNVM change to take effect we need to reset the i210 adapter. As this is not really possible in isolation in Barebox, we just go through a full machine reset cycle. As this should only happen once during the lifetime of each device there is no need for a more elaborate solution. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-common/board.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/zii-common/board.c b/arch/arm/boards/zii-common/board.c index eafb5a3aa8..7bd3a6cabc 100644 --- a/arch/arm/boards/zii-common/board.c +++ b/arch/arm/boards/zii-common/board.c @@ -13,11 +13,12 @@ */ #include +#include #include #include -#include -#include #include +#include +#include static int rdu_eth_register_ethaddr(struct device_node *np) { @@ -129,6 +130,9 @@ static int rdu_i210_invm(void) val = I210_CFGWORD_PCIID_157B; pwrite(fd, &val, sizeof(val), 0); + shutdown_barebox(); + restart_machine(); + return 0; } late_initcall(rdu_i210_invm); -- cgit v1.2.3 From 1f9dc37467f98c06d2f07a60bbe6d885c3cc0229 Mon Sep 17 00:00:00 2001 From: "Ruslan V. Sushko" Date: Tue, 17 Dec 2019 12:28:14 +0100 Subject: RDU2: add support to boot from SD card autonomously Signed-off-by: Ruslan Sushko Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default index f391d91eba..e3406d5543 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default +++ b/arch/arm/boards/zii-imx6q-rdu2/defaultenv-rdu2/boot/rdu-default @@ -2,6 +2,10 @@ backlight0.brightness=0 if [ "$bootsource" = "spi-nor" ]; then + echo Boot source is SPI NOR, booting SD card firmware with rootfs on SD card + boot mmc1 +elif [ "$bootsource" = "mmc" ] && [ "$bootsource_instance" = "1" ]; then + echo Boot source is SD card, booting SD card firmware with rootfs on SD card boot mmc1 else detect mmc3 -- cgit v1.2.3 From 081a6560791b21692d007af4e8d088545c59277a Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:28:15 +0100 Subject: ARM: rdu2: don't reduce i2c frequency for eGalax touch The electrical issues that caused the i2c bus to lock up at higher frequencies has been tracked down and solved by a improved i2c pin configuration, so it's no longer required to reduce the bus frequency. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx6q-rdu2/board.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c index 63367a419a..c06c5ebd9a 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/board.c +++ b/arch/arm/boards/zii-imx6q-rdu2/board.c @@ -180,8 +180,6 @@ static int rdu2_fixup_egalax_ts(struct device_node *root, void *context) return -ENODEV; of_device_enable(np); - of_property_write_u32(np->parent, "clock-frequency", 200000); - return 0; } -- cgit v1.2.3 From 1bd65bc9ef952698ac832c87aeccf925e8cdec38 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:28:16 +0100 Subject: ARM: rdu2: fixup touchscreen alias Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx6q-rdu2/board.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boards/zii-imx6q-rdu2/board.c b/arch/arm/boards/zii-imx6q-rdu2/board.c index c06c5ebd9a..d41609bfae 100644 --- a/arch/arm/boards/zii-imx6q-rdu2/board.c +++ b/arch/arm/boards/zii-imx6q-rdu2/board.c @@ -1,3 +1,4 @@ + /* * Copyright (C) 2016 Zodiac Inflight Innovation * Author: Andrey Smirnov @@ -161,7 +162,7 @@ device_initcall(rdu2_devices_init); static int rdu2_fixup_egalax_ts(struct device_node *root, void *context) { - struct device_node *np; + struct device_node *np, *aliases; /* * The 32" unit has a EETI eGalax touchscreen instead of the @@ -181,6 +182,12 @@ static int rdu2_fixup_egalax_ts(struct device_node *root, void *context) of_device_enable(np); + aliases = of_find_node_by_path_from(root, "/aliases"); + if (!aliases) + return -ENODEV; + + of_property_write_string(aliases, "touchscreen0", np->full_name); + return 0; } -- cgit v1.2.3 From 1d033bd90e08598e0870982a857134f8d18cc872 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 17 Dec 2019 12:40:42 +0100 Subject: ARM: rdu1: add default environment Adds scripts for network detection in development case and autoboot from the SD card. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/zii-imx51-rdu1/Makefile | 1 + arch/arm/boards/zii-imx51-rdu1/board.c | 3 +++ .../boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net | 24 ++++++++++++++++++++++ .../boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs | 6 ++++++ .../defaultenv-rdu1/boot/rdu-default | 14 +++++++++++++ .../defaultenv-rdu1/network/eth0-discover | 4 ++++ .../defaultenv-rdu1/nv/autoboot_abort_key | 1 + .../zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default | 1 + 8 files changed, 54 insertions(+) create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key create mode 100644 arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default (limited to 'arch') diff --git a/arch/arm/boards/zii-imx51-rdu1/Makefile b/arch/arm/boards/zii-imx51-rdu1/Makefile index 01c7a259e9..7f2569bda3 100644 --- a/arch/arm/boards/zii-imx51-rdu1/Makefile +++ b/arch/arm/boards/zii-imx51-rdu1/Makefile @@ -1,2 +1,3 @@ obj-y += board.o lwl-y += lowlevel.o +bbenv-y += defaultenv-rdu1 diff --git a/arch/arm/boards/zii-imx51-rdu1/board.c b/arch/arm/boards/zii-imx51-rdu1/board.c index f739f3b7b4..640bb0d1b7 100644 --- a/arch/arm/boards/zii-imx51-rdu1/board.c +++ b/arch/arm/boards/zii-imx51-rdu1/board.c @@ -16,6 +16,7 @@ */ #include +#include #include #include #include @@ -49,6 +50,8 @@ static int zii_rdu1_init(void) BBU_HANDLER_FLAG_DEFAULT | IMX_BBU_FLAG_PARTITION_STARTS_AT_HEADER); + defaultenv_append_directory(defaultenv_rdu1); + return 0; } coredevice_initcall(zii_rdu1_init); diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net new file mode 100644 index 0000000000..4be8e1e2d7 --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/net @@ -0,0 +1,24 @@ +#!/bin/sh + +path="/mnt/tftp" + +# clear seat network config +global.linux.bootargs.rdu_network= + +global.bootm.image="${path}/${global.user}-linux-${global.hostname}" + +oftree="${path}/${global.user}-oftree-${global.hostname}" +if [ -f "${oftree}" ]; then + global.bootm.oftree="$oftree" +fi + +nfsroot="/home/${global.user}/nfsroot/${global.hostname}" + +ip_route_get -b ${global.net.server} global.linux.bootargs.dyn.ip + +initramfs="${path}/${global.user}-initramfs-${global.hostname}" +if [ -f "${initramfs}" ]; then + global.bootm.initrd="$initramfs" +else + global.linux.bootargs.dyn.root="root=/dev/nfs nfsroot=$nfsroot,v3,tcp" +fi diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs new file mode 100644 index 0000000000..0a2fa07b16 --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/nfs @@ -0,0 +1,6 @@ +#!/bin/sh + +# clear seat network config (not implemented on RDU1 yet) +#global.linux.bootargs.rdu_network= + +boot /mnt/nfs diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default new file mode 100644 index 0000000000..97cc1dcdea --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/boot/rdu-default @@ -0,0 +1,14 @@ +#!/bin/sh + +sp.usb_power=1 +usb +if [ "$bootsource" = "spi" ]; then + boot disk1.0 || boot disk2.0 +else + detect mmc0 + if [ "$mmc0.boot" = "boot0" ]; then + boot mmc0.0 + else + boot mmc0.1 + fi +fi diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover new file mode 100644 index 0000000000..ce35613ef1 --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/network/eth0-discover @@ -0,0 +1,4 @@ +#!/bin/sh + +sp.usb_power=1 +usb diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key new file mode 100644 index 0000000000..55920c9a58 --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/autoboot_abort_key @@ -0,0 +1 @@ +ctrl-c \ No newline at end of file diff --git a/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default new file mode 100644 index 0000000000..9076a1e64e --- /dev/null +++ b/arch/arm/boards/zii-imx51-rdu1/defaultenv-rdu1/nv/boot.default @@ -0,0 +1 @@ +rdu-default \ No newline at end of file -- cgit v1.2.3 From 35ad0b89aa563d74fd53c9b9aef086c43de1f23e Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 19 Dec 2019 16:19:26 +0100 Subject: ARM: nxp-imx8mq-evk: switch to SPDX license header Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index 9d060fb589..d2042bffca 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -1,13 +1,4 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * General Public License for more details. - */ +// SPDX-License-Identifier: GPL-2.0 #include #include -- cgit v1.2.3 From 8f37c5c20b96790cc9fd8432cb3cf6a01e75bad2 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 19 Dec 2019 16:19:27 +0100 Subject: ARM: nxp-imx8mq-evk: switch the PBL memcpy parameters to common variables Use the variables defined in sections.h, instead of hand rolling the same computation. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index d2042bffca..c2f3071e3a 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -90,7 +90,8 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR in * EL2. Copy ourselves there. */ - memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, _text, __bss_start - _text); + memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, + __image_start, barebox_pbl_size); imx8mq_atf_load_bl31(bl31, bl31_size); /* not reached */ } -- cgit v1.2.3 From a25da7f9196b66259d0cdb9e8265fcaffa65343a Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 19 Dec 2019 16:19:28 +0100 Subject: ARM: nxp-imx8mq-evk: clean up nxp_imx8mq_evk_start Mostly cosmetic changes: - reduce scope of local variabes - wrap comment to fir 80 char limit - check return value from imx8_esdhc_load_piggy - drop intermediate function that only wraps a single other function Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index c2f3071e3a..213ab70682 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -42,11 +42,6 @@ static void setup_uart(void) putc_ll('>'); } -static void nxp_imx8mq_evk_sram_setup(void) -{ - ddr_init(); -} - /* * Power-on execution flow of start_nxp_imx8mq_evk() might not be * obvious for a very first read, so here's, hopefully helpful, @@ -72,8 +67,6 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) enum bootsource src = BOOTSOURCE_UNKNOWN; int instance = BOOTSOURCE_INSTANCE_UNKNOWN; int ret = -ENOTSUPP; - const u8 *bl31; - size_t bl31_size; if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); @@ -84,14 +77,18 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) * to DRAM in EL2. */ if (current_el() == 3) { - nxp_imx8mq_evk_sram_setup(); - get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); + const u8 *bl31; + size_t bl31_size; + + ddr_init(); /* - * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR in - * EL2. Copy ourselves there. + * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR + * in EL2. Copy ourselves there. */ memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, __image_start, barebox_pbl_size); + + get_builtin_firmware(imx8mq_bl31_bin, &bl31, &bl31_size); imx8mq_atf_load_bl31(bl31, bl31_size); /* not reached */ } @@ -100,8 +97,9 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) if (src == BOOTSOURCE_MMC) ret = imx8_esdhc_load_piggy(instance); - else - BUG_ON(ret); + + BUG_ON(ret); + /* * Standard entry we hit once we initialized both DDR and ATF */ -- cgit v1.2.3 From 7fb7358a41a656ac3f0ffdbba2bdc1927218706d Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 19 Dec 2019 16:19:29 +0100 Subject: ARM: nxp-imx8mq-evk: fix bootflow comment The comment above nxp_imx8mq_evk_start is no longer accurate, as there is no trampoline in DRAM anymore. Change the comment to reflect the current boot flow. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index 213ab70682..eb96c08051 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -48,14 +48,13 @@ static void setup_uart(void) * summary: * * 1. MaskROM uploads PBL into OCRAM and that's where this function is - * executed for the first time + * executed for the first time. At entry the exception level is EL3. * - * 2. DDR is initialized and the TF-A trampoline is installed in the - * DRAM. + * 2. DDR is initialized and the PBL is copied from OCRAM to the TF-A return + * address in DRAM. * - * 3. TF-A is executed and exits into the trampoline in RAM, which enters the - * PBL for the second time. DRAM setup done is indicated by a one in register - * x0 by the trampoline + * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us + * from EL3 to EL2. * * 4. The piggydata is loaded from the SD card and copied to the expected * location in the DRAM. -- cgit v1.2.3 From 9cede726c6f74af359090fe2c602f244be343c02 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 7 Jan 2020 11:25:13 +0100 Subject: esdhc-pbl: allow to skip starting i.MX8 image Add an option that allows to just load the image into memory, but return to the calling function instead of directly jumping to the loaded image. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/phytec-som-imx8mq/lowlevel.c | 2 +- arch/arm/boards/zii-imx8mq-dev/lowlevel.c | 2 +- arch/arm/mach-imx/include/mach/xload.h | 2 +- drivers/mci/imx-esdhc-pbl.c | 22 +++++++++++++--------- 4 files changed, 16 insertions(+), 12 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c index 4e52b92ad3..4cacabb1fb 100644 --- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c @@ -56,7 +56,7 @@ static void phytec_imx8mq_som_sram_setup(void) imx8_get_boot_source(&src, &instance); if (src == BOOTSOURCE_MMC) - ret = imx8_esdhc_start_image(instance); + ret = imx8_esdhc_load_image(instance, true); BUG_ON(ret); } diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c index 795c98cb66..f12d79ee6e 100644 --- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c +++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c @@ -78,7 +78,7 @@ static void zii_imx8mq_dev_sram_setup(void) imx8_get_boot_source(&src, &instance); if (src == BOOTSOURCE_MMC) - ret = imx8_esdhc_start_image(instance); + ret = imx8_esdhc_load_image(instance, true); BUG_ON(ret); } diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index a605e76339..a9b9d93f24 100644 --- a/arch/arm/mach-imx/include/mach/xload.h +++ b/arch/arm/mach-imx/include/mach/xload.h @@ -5,7 +5,7 @@ int imx53_nand_start_image(void); int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int len); int imx6_spi_start_image(int instance); int imx6_esdhc_start_image(int instance); -int imx8_esdhc_start_image(int instance); +int imx8_esdhc_load_image(int instance, bool start); int imx8_esdhc_load_piggy(int instance); int imx_image_size(void); diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index c0d27fb7eb..a1daf32d8b 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -121,8 +121,8 @@ static int esdhc_search_header(struct fsl_esdhc_host *host, } static int -esdhc_start_image(struct fsl_esdhc_host *host, ptrdiff_t address, ptrdiff_t entry, - u32 offset) +esdhc_load_image(struct fsl_esdhc_host *host, ptrdiff_t address, + ptrdiff_t entry, u32 offset, bool start) { void *buf = (void *)address; @@ -177,6 +177,9 @@ esdhc_start_image(struct fsl_esdhc_host *host, ptrdiff_t address, ptrdiff_t entr pr_debug("Image loaded successfully\n"); + if (!start) + return 0; + bb = buf + ofs; sync_caches_for_execution(); @@ -254,22 +257,23 @@ int imx6_esdhc_start_image(int instance) imx_esdhc_init(&host, &data); - return esdhc_start_image(&host, 0x10000000, 0x10000000, 0); + return esdhc_load_image(&host, 0x10000000, 0x10000000, 0, true); } /** - * imx8_esdhc_start_image - Load and start an image from USDHC controller + * imx8_esdhc_load_image - Load and optionally start an image from USDHC controller * @instance: The USDHC controller instance (0..2) + * @start: Whether to directly start the loaded image * * This uses esdhc_start_image() to load an image from SD/MMC. It is * assumed that the image is the currently running barebox image (This * information is used to calculate the length of the image). The * image is started afterwards. * - * Return: If successful, this function does not return. A negative error - * code is returned when this function fails. + * Return: If successful, this function does not return (if directly started) + * or 0. A negative error code is returned when this function fails. */ -int imx8_esdhc_start_image(int instance) +int imx8_esdhc_load_image(int instance, bool start) { struct esdhc_soc_data data; struct fsl_esdhc_host host; @@ -279,8 +283,8 @@ int imx8_esdhc_start_image(int instance) if (ret) return ret; - return esdhc_start_image(&host, MX8MQ_DDR_CSD1_BASE_ADDR, - MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K); + return esdhc_load_image(&host, MX8MQ_DDR_CSD1_BASE_ADDR, + MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K, start); } int imx8_esdhc_load_piggy(int instance) -- cgit v1.2.3 From e973ec56e7117c601e3b69c9d3c8e0bf206977f3 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 7 Jan 2020 11:25:14 +0100 Subject: ARM: nxp-imx8mq-evk: fix second stage booting If the whole image already resides in DRAM, e.g. by starting the image via the bootm handler we try to load the piggydata from storage, which may well be different from our expected piggydata, already present in DRAM. Fix this by avoiding the special piggydata load function, but instead load the whole image after DRAM is up and just replace the PBL part to ensure we are still running the HAB validated code after TF-A hands back control to our code in DRAM. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/boards/nxp-imx8mq-evk/lowlevel.c | 37 +++++++++++++++---------------- 1 file changed, 18 insertions(+), 19 deletions(-) (limited to 'arch') diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c index eb96c08051..101ce607a5 100644 --- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c +++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c @@ -50,23 +50,16 @@ static void setup_uart(void) * 1. MaskROM uploads PBL into OCRAM and that's where this function is * executed for the first time. At entry the exception level is EL3. * - * 2. DDR is initialized and the PBL is copied from OCRAM to the TF-A return - * address in DRAM. + * 2. DDR is initialized and the image is loaded from storage into DRAM. The PBL + * part is copied from OCRAM to the TF-A return address in DRAM. * * 3. TF-A is executed and exits into the PBL code in DRAM. TF-A has taken us * from EL3 to EL2. * - * 4. The piggydata is loaded from the SD card and copied to the expected - * location in the DRAM. - * - * 5. Standard barebox boot flow continues + * 4. Standard barebox boot flow continues */ static __noreturn noinline void nxp_imx8mq_evk_start(void) { - enum bootsource src = BOOTSOURCE_UNKNOWN; - int instance = BOOTSOURCE_INSTANCE_UNKNOWN; - int ret = -ENOTSUPP; - if (IS_ENABLED(CONFIG_DEBUG_LL)) setup_uart(); @@ -76,14 +69,27 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) * to DRAM in EL2. */ if (current_el() == 3) { - const u8 *bl31; + enum bootsource src = BOOTSOURCE_UNKNOWN; + int instance = BOOTSOURCE_INSTANCE_UNKNOWN; + int ret = -ENOTSUPP; size_t bl31_size; + const u8 *bl31; ddr_init(); + /* * On completion the TF-A will jump to MX8MQ_ATF_BL33_BASE_ADDR - * in EL2. Copy ourselves there. + * in EL2. Copy the image there, but replace the PBL part of + * that image with ourselves. On a high assurance boot only the + * currently running code is validated and contains the checksum + * for the piggy data, so we need to ensure that we are running + * the same code in DRAM. */ + imx8_get_boot_source(&src, &instance); + if (src == BOOTSOURCE_MMC) + ret = imx8_esdhc_load_image(instance, false); + BUG_ON(ret); + memcpy((void *)MX8MQ_ATF_BL33_BASE_ADDR, __image_start, barebox_pbl_size); @@ -92,13 +98,6 @@ static __noreturn noinline void nxp_imx8mq_evk_start(void) /* not reached */ } - imx8_get_boot_source(&src, &instance); - - if (src == BOOTSOURCE_MMC) - ret = imx8_esdhc_load_piggy(instance); - - BUG_ON(ret); - /* * Standard entry we hit once we initialized both DDR and ATF */ -- cgit v1.2.3 From 917c6716f68249565cf8aa4d6e01ef5545247c34 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 7 Jan 2020 11:25:15 +0100 Subject: esdhc-pbl: remove now unused imx8_esdhc_load_piggy Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- arch/arm/mach-imx/include/mach/xload.h | 1 - drivers/mci/imx-esdhc-pbl.c | 42 ---------------------------------- 2 files changed, 43 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-imx/include/mach/xload.h b/arch/arm/mach-imx/include/mach/xload.h index a9b9d93f24..9709b13dfb 100644 --- a/arch/arm/mach-imx/include/mach/xload.h +++ b/arch/arm/mach-imx/include/mach/xload.h @@ -6,7 +6,6 @@ int imx6_spi_load_image(int instance, unsigned int flash_offset, void *buf, int int imx6_spi_start_image(int instance); int imx6_esdhc_start_image(int instance); int imx8_esdhc_load_image(int instance, bool start); -int imx8_esdhc_load_piggy(int instance); int imx_image_size(void); int piggydata_size(void); diff --git a/drivers/mci/imx-esdhc-pbl.c b/drivers/mci/imx-esdhc-pbl.c index a1daf32d8b..2579cfd9d1 100644 --- a/drivers/mci/imx-esdhc-pbl.c +++ b/drivers/mci/imx-esdhc-pbl.c @@ -286,48 +286,6 @@ int imx8_esdhc_load_image(int instance, bool start) return esdhc_load_image(&host, MX8MQ_DDR_CSD1_BASE_ADDR, MX8MQ_ATF_BL33_BASE_ADDR, SZ_32K, start); } - -int imx8_esdhc_load_piggy(int instance) -{ - void *buf, *piggy; - struct imx_flash_header_v2 *hdr = NULL; - struct esdhc_soc_data data; - struct fsl_esdhc_host host; - int ret, len; - int offset = SZ_32K; - - ret = imx8_esdhc_init(&host, &data, instance); - if (ret) - return ret; - - /* - * We expect to be running at MX8MQ_ATF_BL33_BASE_ADDR where the atf - * has jumped to. Use a temporary buffer where we won't overwrite - * ourselves. - */ - buf = (void *)MX8MQ_ATF_BL33_BASE_ADDR + SZ_32M; - - ret = esdhc_search_header(&host, &hdr, buf, &offset); - if (ret) - return ret; - - len = offset + hdr->boot_data.size + piggydata_size(); - len = ALIGN(len, SECTOR_SIZE); - - ret = esdhc_read_blocks(&host, buf, len); - - /* - * Calculate location of the piggydata at the offset loaded into RAM - */ - piggy = buf + offset + hdr->boot_data.size; - - /* - * Copy the piggydata where the uncompressing code expects it - */ - memcpy(input_data, piggy, piggydata_size()); - - return ret; -} #endif #ifdef CONFIG_ARCH_LS1046 -- cgit v1.2.3