From b66a9383421805c705654ce9456ec28c202819fb Mon Sep 17 00:00:00 2001
From: Rafal Jaworowski <raj@pollux.denx.de>
Date: Wed, 29 Mar 2006 13:17:09 +0200
Subject: Set SDelay register in the DDR controller for the MPC5200B chip.

---
 cpu/mpc5xxx/cpu.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

(limited to 'cpu')

diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 2d695d12eb..8d1e7c6377 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -38,7 +38,7 @@ int checkcpu (void)
 	ulong clock = gd->cpu_clk;
 	char buf[32];
 #ifndef CONFIG_MGT5100
-	uint svr;
+	uint svr, pvr;
 #endif
 
 	puts ("CPU:   ");
@@ -47,7 +47,8 @@ int checkcpu (void)
 	puts   (CPU_ID_STR);
 	printf (" (JTAG ID %08lx)", *(vu_long *)MPC5XXX_CDM_JTAGID);
 #else
-	svr = get_svr ();
+	svr = get_svr();
+	pvr = get_pvr();
 	switch (SVR_VER (svr)) {
 	case SVR_MPC5200:
 		printf ("MPC5200");
@@ -57,11 +58,10 @@ int checkcpu (void)
 		break;
 	}
 
-	printf (" v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr));
+	printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr), 
+		PVR_MAJ(pvr), PVR_MIN(pvr));
 #endif
-
 	printf (" at %s MHz\n", strmhz (buf, clock));
-
 	return 0;
 }
 
-- 
cgit v1.2.3