From 9339b5f05484b5e9f4a7e0b08b2c6ca6599aca6d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 11 Mar 2019 09:27:08 +0100 Subject: clk: divider: pass divider flags The generic clk divider needs clock flags and divider flags. Fix prototypes to take both as separate arguments. Signed-off-by: Sascha Hauer --- drivers/clk/clk-divider.c | 28 +++++++++++++++++----------- 1 file changed, 17 insertions(+), 11 deletions(-) (limited to 'drivers/clk/clk-divider.c') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 7b1bdde1ce..407aae78ea 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -249,7 +249,8 @@ struct clk_ops clk_divider_ops = { }; struct clk *clk_divider_alloc(const char *name, const char *parent, - void __iomem *reg, u8 shift, u8 width, unsigned flags) + unsigned clk_flags, void __iomem *reg, u8 shift, + u8 width, unsigned div_flags) { struct clk_divider *div = xzalloc(sizeof(*div)); @@ -257,9 +258,10 @@ struct clk *clk_divider_alloc(const char *name, const char *parent, div->reg = reg; div->width = width; div->parent = parent; + div->flags = div_flags; div->clk.ops = &clk_divider_ops; div->clk.name = name; - div->clk.flags = flags; + div->clk.flags = clk_flags; div->clk.parent_names = &div->parent; div->clk.num_parents = 1; @@ -273,13 +275,14 @@ void clk_divider_free(struct clk *clk) free(d); } -struct clk *clk_divider(const char *name, const char *parent, - void __iomem *reg, u8 shift, u8 width, unsigned flags) +struct clk *clk_divider(const char *name, const char *parent, unsigned clk_flags, + void __iomem *reg, u8 shift, u8 width, unsigned div_flags) { struct clk *d; int ret; - d = clk_divider_alloc(name , parent, reg, shift, width, flags); + d = clk_divider_alloc(name , parent, clk_flags, reg, shift, width, + div_flags); ret = clk_register(d); if (ret) { @@ -291,12 +294,13 @@ struct clk *clk_divider(const char *name, const char *parent, } struct clk *clk_divider_one_based(const char *name, const char *parent, - void __iomem *reg, u8 shift, u8 width, unsigned flags) + unsigned clk_flags, void __iomem *reg, u8 shift, + u8 width, unsigned div_flags) { struct clk_divider *div; struct clk *clk; - clk = clk_divider(name, parent, reg, shift, width, flags); + clk = clk_divider(name, parent, clk_flags, reg, shift, width, div_flags); if (IS_ERR(clk)) return clk; @@ -306,9 +310,10 @@ struct clk *clk_divider_one_based(const char *name, const char *parent, return clk; } -struct clk *clk_divider_table(const char *name, - const char *parent, void __iomem *reg, u8 shift, u8 width, - const struct clk_div_table *table, unsigned flags) +struct clk *clk_divider_table(const char *name, const char *parent, + unsigned clk_flags, void __iomem *reg, u8 shift, + u8 width, const struct clk_div_table *table, + unsigned div_flags) { struct clk_divider *div = xzalloc(sizeof(*div)); const struct clk_div_table *clkt; @@ -318,9 +323,10 @@ struct clk *clk_divider_table(const char *name, div->reg = reg; div->width = width; div->parent = parent; + div->flags = div_flags; div->clk.ops = &clk_divider_ops; div->clk.name = name; - div->clk.flags = flags; + div->clk.flags = clk_flags; div->clk.parent_names = &div->parent; div->clk.num_parents = 1; div->table = table; -- cgit v1.2.3 From df44d586d0d70c2189103e60807d33f3267e8021 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Mon, 11 Mar 2019 09:31:39 +0100 Subject: clk: divider: Support CLK_DIVIDER_READ_ONLY flag To support a readonly divider add the CLK_DIVIDER_READ_ONLY flag. Signed-off-by: Sascha Hauer --- drivers/clk/clk-divider.c | 7 +++++++ drivers/clk/rockchip/clk-rk3188.c | 1 - drivers/clk/rockchip/clk-rk3288.c | 1 - include/linux/clk.h | 1 + 4 files changed, 8 insertions(+), 2 deletions(-) (limited to 'drivers/clk/clk-divider.c') diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index 407aae78ea..d9d3407e75 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -203,8 +203,12 @@ static int clk_divider_bestdiv(struct clk *clk, unsigned long rate, static long clk_divider_round_rate(struct clk *clk, unsigned long rate, unsigned long *parent_rate) { + struct clk_divider *divider = container_of(clk, struct clk_divider, clk); int div; + if (divider->flags & CLK_DIVIDER_READ_ONLY) + return clk_divider_recalc_rate(clk, *parent_rate); + div = clk_divider_bestdiv(clk, rate, parent_rate); return *parent_rate / div; @@ -217,6 +221,9 @@ static int clk_divider_set_rate(struct clk *clk, unsigned long rate, unsigned int div, value; u32 val; + if (divider->flags & CLK_DIVIDER_READ_ONLY) + return 0; + if (clk->flags & CLK_SET_RATE_PARENT) { unsigned long best_parent_rate = parent_rate; div = clk_divider_bestdiv(clk, rate, &best_parent_rate); diff --git a/drivers/clk/rockchip/clk-rk3188.c b/drivers/clk/rockchip/clk-rk3188.c index 7dda2963e3..8ed3a6d894 100644 --- a/drivers/clk/rockchip/clk-rk3188.c +++ b/drivers/clk/rockchip/clk-rk3188.c @@ -26,7 +26,6 @@ #define RK3188_GRF_SOC_STATUS 0xac #define CLK_SET_RATE_NO_REPARENT 0 -#define CLK_DIVIDER_READ_ONLY 0 enum rk3188_plls { apll, cpll, dpll, gpll, diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c index bb111e1e0b..e7cc9c1b5b 100644 --- a/drivers/clk/rockchip/clk-rk3288.c +++ b/drivers/clk/rockchip/clk-rk3288.c @@ -26,7 +26,6 @@ #define RK3288_GRF_SOC_STATUS1 0x284 #define CLK_SET_RATE_NO_REPARENT 0 -#define CLK_DIVIDER_READ_ONLY 0 enum rk3288_plls { apll, dpll, cpll, gpll, npll, diff --git a/include/linux/clk.h b/include/linux/clk.h index 65d163c78d..2de963e7e9 100644 --- a/include/linux/clk.h +++ b/include/linux/clk.h @@ -341,6 +341,7 @@ struct clk_divider { #define CLK_DIVIDER_POWER_OF_TWO (1 << 1) #define CLK_DIVIDER_HIWORD_MASK (1 << 3) +#define CLK_DIVIDER_READ_ONLY (1 << 5) #define CLK_MUX_HIWORD_MASK (1 << 2) -- cgit v1.2.3