From 3e41e7561a1b3636140214d92401c10e15962d22 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Sun, 2 Nov 2014 21:13:48 +0100 Subject: clk: tegra: slow down MSELECT to 102MHz Don't know where I got the 204MHZ previously, but 102MHz is the official supported maximum. Signed-off-by: Lucas Stach Signed-off-by: Sascha Hauer --- drivers/clk/tegra/clk-tegra124.c | 2 +- drivers/clk/tegra/clk-tegra30.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/clk/tegra') diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 7426b52aac..d597a239b9 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -321,7 +321,7 @@ static struct tegra_clk_init_table init_table[] = { {TEGRA124_CLK_PLL_P_OUT2, TEGRA124_CLK_CLK_MAX, 48000000, 1}, {TEGRA124_CLK_PLL_P_OUT3, TEGRA124_CLK_CLK_MAX, 102000000, 1}, {TEGRA124_CLK_PLL_P_OUT4, TEGRA124_CLK_CLK_MAX, 204000000, 1}, - {TEGRA124_CLK_MSELECT, TEGRA124_CLK_PLL_P, 204000000, 1}, + {TEGRA124_CLK_MSELECT, TEGRA124_CLK_PLL_P, 102000000, 1}, {TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 0, 1}, {TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 0, 1}, {TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 0, 1}, diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c index 9997ab9666..7210053e96 100644 --- a/drivers/clk/tegra/clk-tegra30.c +++ b/drivers/clk/tegra/clk-tegra30.c @@ -351,7 +351,7 @@ static struct tegra_clk_init_table init_table[] = { {TEGRA30_CLK_PLL_P_OUT2, TEGRA30_CLK_CLK_MAX, 48000000, 1}, {TEGRA30_CLK_PLL_P_OUT3, TEGRA30_CLK_CLK_MAX, 102000000, 1}, {TEGRA30_CLK_PLL_P_OUT4, TEGRA30_CLK_CLK_MAX, 204000000, 1}, - {TEGRA30_CLK_MSELECT, TEGRA30_CLK_PLL_P, 204000000, 1}, + {TEGRA30_CLK_MSELECT, TEGRA30_CLK_PLL_P, 102000000, 1}, {TEGRA30_CLK_UARTA, TEGRA30_CLK_PLL_P, 0, 1}, {TEGRA30_CLK_UARTB, TEGRA30_CLK_PLL_P, 0, 1}, {TEGRA30_CLK_UARTC, TEGRA30_CLK_PLL_P, 0, 1}, -- cgit v1.2.3