From a553a4dc731e3f4ce0936361ca508939e76a9dce Mon Sep 17 00:00:00 2001 From: Sebastian Hesselbarth Date: Mon, 20 Apr 2015 22:11:13 +0200 Subject: net: phy: Support Marvell 88E1318S PHY This adds support for the Marvell 88E1318S Gigabit Ethernet PHY. Signed-off-by: Sebastian Hesselbarth Signed-off-by: Sascha Hauer --- drivers/net/phy/marvell.c | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) (limited to 'drivers/net') diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index aaf9f53451..6409f14ae2 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c @@ -35,6 +35,9 @@ #define MII_88E1121_PHY_MSCR_DELAY_MASK \ (MII_88E1121_PHY_MSCR_RX_DELAY | MII_88E1121_PHY_MSCR_TX_DELAY) +#define MII_88E1318S_PHY_MSCR1_REG 16 +#define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6) + #define MII_88E1540_LED_PAGE 0x3 #define MII_88E1540_LED_CONTROL 0x10 @@ -214,6 +217,25 @@ static int m88e1121_config_init(struct phy_device *phydev) return 0; } +static int m88e1318s_config_init(struct phy_device *phydev) +{ + u16 reg; + int ret; + + ret = phy_write(phydev, MII_MARVELL_PHY_PAGE, + MII_88E1121_PHY_MSCR_PAGE); + if (ret < 0) + return ret; + + reg = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG); + reg |= MII_88E1318S_PHY_MSCR1_PAD_ODD; + ret = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, reg); + if (ret < 0) + return ret; + + return m88e1121_config_init(phydev); +} + static struct phy_driver marvell_phys[] = { { .phy_id = MARVELL_PHY_ID_88E1121R, @@ -224,6 +246,15 @@ static struct phy_driver marvell_phys[] = { .config_aneg = genphy_config_aneg, .read_status = marvell_read_status, }, + { + .phy_id = MARVELL_PHY_ID_88E1318S, + .phy_id_mask = MARVELL_PHY_ID_MASK, + .drv.name = "Marvell 88E1318S", + .features = PHY_GBIT_FEATURES, + .config_init = m88e1318s_config_init, + .config_aneg = genphy_config_aneg, + .read_status = marvell_read_status, + }, { .phy_id = MARVELL_PHY_ID_88E1543, .phy_id_mask = MARVELL_PHY_ID_MASK, -- cgit v1.2.3