From ad200f0dc31c1dc89e36e0d2f71707c51e2bc0a1 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Wed, 1 Feb 2017 08:19:43 +0100 Subject: pinctrl: i.MX7: Fix LPSR sel_imput setting The i.MX7 has two pinmux controllers, the regular and the LPSR controller. The LPSR pinmux controller doesn't have any sel_input registers, instead they can be found in the regular pinmux controller. This means whenever we want to apply the the sel_input setting for the LPSR controller, we have to apply them to the regular controller instead. In barebox take the easy way out and just add the difference of the two base addresses to the register offset. The same issue is present in the Kernel aswell, but when the bootloader already configured the pins correctly nobody notices when the Kernel sel_input setup effectively is a no-op. Signed-off-by: Sascha Hauer --- drivers/pinctrl/imx-iomux-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/imx-iomux-v3.c b/drivers/pinctrl/imx-iomux-v3.c index dea4324643..50d7177367 100644 --- a/drivers/pinctrl/imx-iomux-v3.c +++ b/drivers/pinctrl/imx-iomux-v3.c @@ -177,7 +177,7 @@ static int imx_iomux_v3_probe(struct device_d *dev) } static struct imx_iomux_v3_data imx_iomux_imx7_lpsr_data = { - .flags = ZERO_OFFSET_VALID, + .flags = ZERO_OFFSET_VALID | IMX7_PINMUX_LPSR, }; static __maybe_unused struct of_device_id imx_iomux_v3_dt_ids[] = { -- cgit v1.2.3