From 84d7f7d8774ca98ff5fa406994852430cf499abf Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Thu, 8 Dec 2016 10:05:42 +0100 Subject: spi: mvebu: fix register macros for Armada 370/XP clock divider MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Signed-off-by: Sascha Hauer --- drivers/spi/mvebu_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/spi') diff --git a/drivers/spi/mvebu_spi.c b/drivers/spi/mvebu_spi.c index e340686bd6..785dec2e56 100644 --- a/drivers/spi/mvebu_spi.c +++ b/drivers/spi/mvebu_spi.c @@ -43,8 +43,8 @@ #define IF_TRANSFER_2BYTE BIT(5) #define IF_CLK_PRESCALE_POW2 BIT(4) #define IF_CLK_PRESCALE(x) ((x) & 0x0f) -#define IF_CLK_PRE_PRESCALE(x) (((((x) & 0xc) << 1) | ((x) & 0x1)) << 4) -#define IF_CLK_PRESCALE_MASK (IF_CLK_PRESCALE(7) | IF_CLK_PRE_PRESCALE(7)) +#define IF_CLK_PRE_PRESCALE(x) (((((x) & 0x6) << 6) | ((x) & 0x1)) << 4) +#define IF_CLK_PRESCALE_MASK (IF_CLK_PRESCALE(0xf) | IF_CLK_PRE_PRESCALE(7)) #define SPI_DATA_OUT 0x08 #define SPI_DATA_IN 0x0c #define SPI_INT_CAUSE 0x10 -- cgit v1.2.3