From f245581eb865c1ed62fb6b8a382ab7bf6b0f6d38 Mon Sep 17 00:00:00 2001 From: Ahmad Fatoum Date: Wed, 30 Sep 2020 09:19:57 +0200 Subject: watchdog: fix division-by-zero when clock rate == 0 Instead of storing the clk into the driver's device-specific private data, just store the rate and make sure it's != 0 on probe. This aligns us with what Linux does for the STM32 IWDG and DW WDT. Reported-by: clang-analyzer-10 Cc: Oleksij Rempel Signed-off-by: Ahmad Fatoum Signed-off-by: Sascha Hauer --- drivers/watchdog/stm32_iwdg.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/watchdog/stm32_iwdg.c') diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c index 9e38f1a669..4d7a263b7e 100644 --- a/drivers/watchdog/stm32_iwdg.c +++ b/drivers/watchdog/stm32_iwdg.c @@ -157,6 +157,8 @@ static int stm32_iwdg_probe(struct device_d *dev) return ret; wd->rate = clk_get_rate(clk); + if (wd->rate == 0) + return -EINVAL; if (data->has_pclk) { clk = clk_get(dev, "pclk"); -- cgit v1.2.3