From efdeb990d2f6fbc8c4b10e9967fe26d472bcf7bf Mon Sep 17 00:00:00 2001 From: Andrey Gusakov Date: Fri, 23 Mar 2018 20:12:23 +0300 Subject: video: tc358767: set num_modes=0 if no valid mode found Since commit f986661 "video: ipu: register framebuffer, even when no modes are found" value returned from VPL_GET_VIDEOMODES ioctl is ignored. So set valid num_modes in error case to avoid crash in register_framebuffer. Signed-off-by: Andrey Gusakov Signed-off-by: Sascha Hauer --- drivers/video/tc358767.c | 1 + 1 file changed, 1 insertion(+) (limited to 'drivers') diff --git a/drivers/video/tc358767.c b/drivers/video/tc358767.c index f9ca06c62b..69afaa2ba9 100644 --- a/drivers/video/tc358767.c +++ b/drivers/video/tc358767.c @@ -1258,6 +1258,7 @@ static int tc_filter_videomodes(struct tc_data *tc, struct display_timings *timi } while (1); free(timings->modes); + timings->num_modes = 0; timings->modes = NULL; if (!num_modes) { -- cgit v1.2.3 From 27f8b69be29477f4d8f2db7d76bac27254e361ca Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 31 Mar 2018 18:13:55 -0700 Subject: clk: i.MX7: Port NAND clock setup code from Linux Port Linux kernel commit 22039d150f716e4e ("clk: imx7d: create clocks behind rawnand clock gate") in order to correctly initialize clocks necessary for APBH DMA block to be functional on i.MX7 Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- drivers/clk/imx/clk-imx7.c | 5 +++-- drivers/clk/imx/clk.h | 7 +++++++ 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers') diff --git a/drivers/clk/imx/clk-imx7.c b/drivers/clk/imx/clk-imx7.c index b79c8c3016..1025c9d173 100644 --- a/drivers/clk/imx/clk-imx7.c +++ b/drivers/clk/imx/clk-imx7.c @@ -676,7 +676,7 @@ static int imx7_ccm_probe(struct device_d *dev) clks[IMX7D_ENET2_TIME_ROOT_DIV] = imx_clk_divider2("enet2_time_post_div", "enet2_time_pre_div", base + 0xa880, 0, 6); clks[IMX7D_ENET_PHY_REF_ROOT_DIV] = imx_clk_divider2("enet_phy_ref_post_div", "enet_phy_ref_pre_div", base + 0xa900, 0, 6); clks[IMX7D_EIM_ROOT_DIV] = imx_clk_divider2("eim_post_div", "eim_pre_div", base + 0xa980, 0, 6); - clks[IMX7D_NAND_ROOT_DIV] = imx_clk_divider2("nand_post_div", "nand_pre_div", base + 0xaa00, 0, 6); + clks[IMX7D_NAND_ROOT_CLK] = imx_clk_divider2("nand_root_clk", "nand_pre_div", base + 0xaa00, 0, 6); clks[IMX7D_QSPI_ROOT_DIV] = imx_clk_divider2("qspi_post_div", "qspi_pre_div", base + 0xaa80, 0, 6); clks[IMX7D_USDHC1_ROOT_DIV] = imx_clk_divider2("usdhc1_post_div", "usdhc1_pre_div", base + 0xab00, 0, 6); clks[IMX7D_USDHC2_ROOT_DIV] = imx_clk_divider2("usdhc2_post_div", "usdhc2_pre_div", base + 0xab80, 0, 6); @@ -751,7 +751,8 @@ static int imx7_ccm_probe(struct device_d *dev) clks[IMX7D_ENET_PHY_REF_ROOT_CLK] = imx_clk_gate4("enet_phy_ref_root_clk", "enet_phy_ref_post_div", base + 0x4520, 0); clks[IMX7D_EIM_ROOT_CLK] = imx_clk_gate4("eim_root_clk", "eim_post_div", base + 0x4160, 0); - clks[IMX7D_NAND_ROOT_CLK] = imx_clk_gate4("nand_root_clk", "nand_post_div", base + 0x4140, 0); + clks[IMX7D_NAND_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_rawnand_clk", "nand_root_clk", base + 0x4140, 0); + clks[IMX7D_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_usdhc_rawnand_clk", "nand_usdhc_root_clk", base + 0x4140, 0); clks[IMX7D_QSPI_ROOT_CLK] = imx_clk_gate4("qspi_root_clk", "qspi_post_div", base + 0x4150, 0); clks[IMX7D_USB_CTRL_CLK] = imx_clk_gate4("usb_ctrl_clk", "osc", base + 0x4680, 0); clks[IMX7D_USB_PHY1_CLK] = imx_clk_gate4("usbphy1_clk", "osc", base + 0x46a0, 0); diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index c46c2614d9..71c6f459ad 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -80,6 +80,13 @@ static inline struct clk *imx_clk_gate2(const char *name, const char *parent, return clk_gate2(name, parent, reg, shift, 0x3, 0); } +static inline struct clk *imx_clk_gate2_shared2(const char *name, const char *parent, + void __iomem *reg, u8 shift) +{ + return clk_gate2(name, parent, reg, shift, 0x3, + CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE); +} + static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) { -- cgit v1.2.3 From 6eb2ba6f1b206bb7d688036a28c98eb4a89be781 Mon Sep 17 00:00:00 2001 From: Andrey Smirnov Date: Sat, 31 Mar 2018 18:13:57 -0700 Subject: dma: apbh: Enable clock as a part of probing Enable clock as a part of probing in order to avoid problems on SoCs that do not have this block ungated out of reset (e.g. i.MX7). Signed-off-by: Andrey Smirnov Signed-off-by: Sascha Hauer --- drivers/dma/apbh_dma.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'drivers') diff --git a/drivers/dma/apbh_dma.c b/drivers/dma/apbh_dma.c index b84c0f7985..79f25109f9 100644 --- a/drivers/dma/apbh_dma.c +++ b/drivers/dma/apbh_dma.c @@ -17,6 +17,7 @@ #include #include +#include #include #include #include @@ -55,6 +56,7 @@ enum mxs_dma_id { struct apbh_dma { void __iomem *regs; + struct clk *clk; enum mxs_dma_id id; }; @@ -606,6 +608,17 @@ static int apbh_dma_probe(struct device_d *dev) apbh->id = id; + apbh->clk = clk_get(dev, NULL); + if (IS_ERR(apbh->clk)) + return PTR_ERR(apbh->clk); + + ret = clk_enable(apbh->clk); + if (ret) { + dev_err(dev, "Failed to enable clock: %s\n", + strerror(ret)); + return ret; + } + ret = stmp_reset_block(apbh->regs, 0); if (ret) return ret; -- cgit v1.2.3