From 2e9cce8fb1f577088e2b20ae2f461130e13ad190 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Tue, 28 Nov 2017 11:02:14 +0100 Subject: dts: update to v4.15-rc1 Signed-off-by: Sascha Hauer --- dts/Bindings/arm/amlogic/analog-top.txt | 20 ++++++++++++++++++++ dts/Bindings/arm/amlogic/assist.txt | 17 +++++++++++++++++ dts/Bindings/arm/amlogic/bootrom.txt | 17 +++++++++++++++++ dts/Bindings/arm/amlogic/pmu.txt | 18 ++++++++++++++++++ dts/Bindings/arm/amlogic/smp-sram.txt | 32 ++++++++++++++++++++++++++++++++ 5 files changed, 104 insertions(+) create mode 100644 dts/Bindings/arm/amlogic/analog-top.txt create mode 100644 dts/Bindings/arm/amlogic/assist.txt create mode 100644 dts/Bindings/arm/amlogic/bootrom.txt create mode 100644 dts/Bindings/arm/amlogic/pmu.txt create mode 100644 dts/Bindings/arm/amlogic/smp-sram.txt (limited to 'dts/Bindings/arm/amlogic') diff --git a/dts/Bindings/arm/amlogic/analog-top.txt b/dts/Bindings/arm/amlogic/analog-top.txt new file mode 100644 index 0000000000..101dc21014 --- /dev/null +++ b/dts/Bindings/arm/amlogic/analog-top.txt @@ -0,0 +1,20 @@ +Amlogic Meson8 and Meson8b "analog top" registers: +-------------------------------------------------- + +The analog top registers contain information about the so-called +"metal revision" (which encodes the "minor version") of the SoC. + +Required properties: +- reg: the register range of the analog top registers +- compatible: depending on the SoC this should be one of: + - "amlogic,meson8-analog-top" + - "amlogic,meson8b-analog-top" + along with "syscon" + + +Example: + + analog_top: analog-top@81a8 { + compatible = "amlogic,meson8-analog-top", "syscon"; + reg = <0x81a8 0x14>; + }; diff --git a/dts/Bindings/arm/amlogic/assist.txt b/dts/Bindings/arm/amlogic/assist.txt new file mode 100644 index 0000000000..7656812b67 --- /dev/null +++ b/dts/Bindings/arm/amlogic/assist.txt @@ -0,0 +1,17 @@ +Amlogic Meson6/Meson8/Meson8b assist registers: +----------------------------------------------- + +The assist registers contain basic information about the SoC, +for example the encoded SoC part number. + +Required properties: +- reg: the register range of the assist registers +- compatible: should be "amlogic,meson-mx-assist" along with "syscon" + + +Example: + + assist: assist@7c00 { + compatible = "amlogic,meson-mx-assist", "syscon"; + reg = <0x7c00 0x200>; + }; diff --git a/dts/Bindings/arm/amlogic/bootrom.txt b/dts/Bindings/arm/amlogic/bootrom.txt new file mode 100644 index 0000000000..407e27f230 --- /dev/null +++ b/dts/Bindings/arm/amlogic/bootrom.txt @@ -0,0 +1,17 @@ +Amlogic Meson6/Meson8/Meson8b bootrom: +-------------------------------------- + +The bootrom register area can be used to access SoC specific +information, such as the "misc version". + +Required properties: +- reg: the register range of the bootrom registers +- compatible: should be "amlogic,meson-mx-bootrom" along with "syscon" + + +Example: + + bootrom: bootrom@d9040000 { + compatible = "amlogic,meson-mx-bootrom", "syscon"; + reg = <0xd9040000 0x10000>; + }; diff --git a/dts/Bindings/arm/amlogic/pmu.txt b/dts/Bindings/arm/amlogic/pmu.txt new file mode 100644 index 0000000000..72f8d08198 --- /dev/null +++ b/dts/Bindings/arm/amlogic/pmu.txt @@ -0,0 +1,18 @@ +Amlogic Meson8 and Meson8b power-management-unit: +------------------------------------------------- + +The pmu is used to turn off and on different power domains of the SoCs +This includes the power to the CPU cores. + +Required node properties: +- compatible value : depending on the SoC this should be one of: + "amlogic,meson8-pmu" + "amlogic,meson8b-pmu" +- reg : physical base address and the size of the registers window + +Example: + + pmu@c81000e4 { + compatible = "amlogic,meson8b-pmu", "syscon"; + reg = <0xc81000e0 0x18>; + }; diff --git a/dts/Bindings/arm/amlogic/smp-sram.txt b/dts/Bindings/arm/amlogic/smp-sram.txt new file mode 100644 index 0000000000..3473ddaadf --- /dev/null +++ b/dts/Bindings/arm/amlogic/smp-sram.txt @@ -0,0 +1,32 @@ +Amlogic Meson8 and Meson8b SRAM for smp bringup: +------------------------------------------------ + +Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores. +Once the core gets powered up it executes the code that is residing at a +specific location. + +Therefore a reserved section sub-node has to be added to the mmio-sram +declaration. + +Required sub-node properties: +- compatible : depending on the SoC this should be one of: + "amlogic,meson8-smp-sram" + "amlogic,meson8b-smp-sram" + +The rest of the properties should follow the generic mmio-sram discription +found in ../../misc/sram.txt + +Example: + + sram: sram@d9000000 { + compatible = "mmio-sram"; + reg = <0xd9000000 0x20000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0xd9000000 0x20000>; + + smp-sram@1ff80 { + compatible = "amlogic,meson8b-smp-sram"; + reg = <0x1ff80 0x8>; + }; + }; -- cgit v1.2.3